From 31a8c69da9cf369d5a02b2a381288f9e51debf6e Mon Sep 17 00:00:00 2001 From: 0kmg <9137159+0kmg@users.noreply.github.com> Date: Tue, 19 Apr 2022 12:19:24 -0800 Subject: bus/nes: Updated Irem boards. (#9596) - Fixed various minutiae with banking modes, bus conflicts, masks based on pin counts. - Made H3001 a subclass of G101. It's mostly functionally the same with an added IRQ. --- src/devices/bus/nes/irem.cpp | 117 ++++++++++++++++++------------------------- src/devices/bus/nes/irem.h | 39 +++++++++------ 2 files changed, 74 insertions(+), 82 deletions(-) diff --git a/src/devices/bus/nes/irem.cpp b/src/devices/bus/nes/irem.cpp index 7684850f6b9..d0bc4d48857 100644 --- a/src/devices/bus/nes/irem.cpp +++ b/src/devices/bus/nes/irem.cpp @@ -40,28 +40,33 @@ DEFINE_DEVICE_TYPE(NES_G101, nes_g101_device, "nes_g101", "NES Cart DEFINE_DEVICE_TYPE(NES_H3001, nes_h3001_device, "ns_h3001", "NES Cart Irem H-3001 PCB") -nes_lrog017_device::nes_lrog017_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) +nes_lrog017_device::nes_lrog017_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : nes_nrom_device(mconfig, NES_LROG017, tag, owner, clock) { } -nes_holydivr_device::nes_holydivr_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) +nes_holydivr_device::nes_holydivr_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : nes_nrom_device(mconfig, NES_HOLYDIVR, tag, owner, clock) { } -nes_tam_s1_device::nes_tam_s1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) +nes_tam_s1_device::nes_tam_s1_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : nes_nrom_device(mconfig, NES_TAM_S1, tag, owner, clock) { } -nes_g101_device::nes_g101_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : nes_nrom_device(mconfig, NES_G101, tag, owner, clock), m_latch(0) +nes_g101_device::nes_g101_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u8 prg_mask) + : nes_nrom_device(mconfig, type, tag, owner, clock), m_latch(0), m_reg(0), m_prg_mask(prg_mask) { } -nes_h3001_device::nes_h3001_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : nes_nrom_device(mconfig, NES_H3001, tag, owner, clock), m_irq_count(0), m_irq_count_latch(0), m_irq_enable(0), irq_timer(nullptr) +nes_g101_device::nes_g101_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) + : nes_g101_device(mconfig, NES_G101, tag, owner, clock, 0x1f) +{ +} + +nes_h3001_device::nes_h3001_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) + : nes_g101_device(mconfig, NES_H3001, tag, owner, clock, 0x3f), m_irq_count(0), m_irq_count_latch(0), m_irq_enable(0), irq_timer(nullptr) { } @@ -79,7 +84,6 @@ void nes_lrog017_device::pcb_reset() void nes_holydivr_device::pcb_reset() { - m_chr_source = m_vrom_chunks ? CHRROM : CHRRAM; prg16_89ab(0); prg16_cdef(m_prg_chunks - 1); chr8(0, m_chr_source); @@ -87,31 +91,30 @@ void nes_holydivr_device::pcb_reset() void nes_tam_s1_device::pcb_reset() { - m_chr_source = m_vrom_chunks ? CHRROM : CHRRAM; prg16_89ab(m_prg_chunks - 1); prg16_cdef(0); - chr8(0, m_chr_source); } void nes_g101_device::device_start() { common_start(); save_item(NAME(m_latch)); + save_item(NAME(m_reg)); } void nes_g101_device::pcb_reset() { - m_chr_source = m_vrom_chunks ? CHRROM : CHRRAM; prg16_89ab(0); prg16_cdef(m_prg_chunks - 1); chr8(0, m_chr_source); m_latch = 0; + m_reg = 0; } void nes_h3001_device::device_start() { - common_start(); + nes_g101_device::device_start(); irq_timer = timer_alloc(TIMER_IRQ); irq_timer->adjust(attotime::zero, 0, clocks_to_attotime(1)); @@ -122,11 +125,7 @@ void nes_h3001_device::device_start() void nes_h3001_device::pcb_reset() { - m_chr_source = m_vrom_chunks ? CHRROM : CHRRAM; - prg16_89ab(0); - prg16_cdef(m_prg_chunks - 1); - chr8(0, m_chr_source); - + nes_g101_device::pcb_reset(); m_irq_enable = 0; m_irq_count = 0; m_irq_count_latch = 0; @@ -151,7 +150,7 @@ void nes_h3001_device::pcb_reset() -------------------------------------------------*/ -void nes_lrog017_device::write_h(offs_t offset, uint8_t data) +void nes_lrog017_device::write_h(offs_t offset, u8 data) { LOG_MMC(("lrog017 write_h, offset: %04x, data: %02x\n", offset, data)); @@ -170,7 +169,7 @@ void nes_lrog017_device::write_h(offs_t offset, uint8_t data) -------------------------------------------------*/ -void nes_holydivr_device::write_h(offs_t offset, uint8_t data) +void nes_holydivr_device::write_h(offs_t offset, u8 data) { LOG_MMC(("holy diver write_h, offset: %04x, data: %02x\n", offset, data)); @@ -190,19 +189,16 @@ void nes_holydivr_device::write_h(offs_t offset, uint8_t data) iNES: mapper 97 - In MESS: Supported. + In MAME: Supported. -------------------------------------------------*/ -void nes_tam_s1_device::write_h(offs_t offset, uint8_t data) +void nes_tam_s1_device::write_h(offs_t offset, u8 data) { LOG_MMC(("tam s1 write_h, offset: %04x, data: %02x\n", offset, data)); if (offset < 0x4000) { - // this pcb is subject to bus conflict - data = account_bus_conflict(offset, data); - set_nt_mirroring(BIT(data, 7) ? PPU_MIRROR_VERT : PPU_MIRROR_HORZ); prg16_cdef(data); } @@ -212,40 +208,41 @@ void nes_tam_s1_device::write_h(offs_t offset, uint8_t data) Irem G-101 board emulation - Major League uses hardwired mirroring + Major League has hardwired mirroring and PRG mode latch iNES: mapper 32 -------------------------------------------------*/ -void nes_g101_device::write_h(offs_t offset, uint8_t data) +void nes_g101_device::set_prg() +{ + prg8_x(0 ^ m_latch, m_reg); + prg8_x(2 ^ m_latch, m_prg_mask - 1); +} + +void nes_g101_device::write_h(offs_t offset, u8 data) { LOG_MMC(("g101 write_h, offset: %04x, data: %02x\n", offset, data)); switch (offset & 0x7000) { case 0x0000: - if (m_latch) - { - prg8_89(0xfe); - prg8_cd(data & 0x1f); - } - else - { - prg8_89(data & 0x1f); - prg8_cd(0xfe); - } + m_reg = data & m_prg_mask; + set_prg(); break; case 0x1000: - m_latch = BIT(data, 1); if (m_pcb_ctrl_mirror) + { + m_latch = data & 0x02; + set_prg(); set_nt_mirroring(BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); + } break; case 0x2000: - prg8_ab(data & 0x1f); + prg8_ab(data & m_prg_mask); break; case 0x3000: - chr1_x(offset & 0x07, data & 0x7f, CHRROM); + chr1_x(offset & 0x07, data, CHRROM); break; } } @@ -259,11 +256,10 @@ void nes_g101_device::write_h(offs_t offset, uint8_t data) iNES: mapper 65 - In MESS: Supported. + In MAME: Supported. -------------------------------------------------*/ - void nes_h3001_device::device_timer(emu_timer &timer, device_timer_id id, int param) { if (id == TIMER_IRQ) @@ -272,7 +268,7 @@ void nes_h3001_device::device_timer(emu_timer &timer, device_timer_id id, int pa { // 16bit counter, IRQ fired when the counter reaches 0 // after firing, the counter is *not* reloaded and does not wrap - if (m_irq_count > 0) + if (m_irq_count) m_irq_count--; if (!m_irq_count) @@ -284,52 +280,39 @@ void nes_h3001_device::device_timer(emu_timer &timer, device_timer_id id, int pa } } -void nes_h3001_device::write_h(offs_t offset, uint8_t data) +void nes_h3001_device::write_h(offs_t offset, u8 data) { LOG_MMC(("h3001 write_h, offset %04x, data: %02x\n", offset, data)); - switch (offset & 0x7fff) + switch (offset & 0x7007) { - case 0x0000: - prg8_89(data); + default: + nes_g101_device::write_h(offset, data); + break; + case 0x1000: + m_latch = (data & 0x80) >> 6; + set_prg(); break; - case 0x1001: - set_nt_mirroring(BIT(data, 7) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); + set_nt_mirroring(BIT(data, 6) ? PPU_MIRROR_LOW : (BIT(data, 7) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT)); + break; + case 0x1002: break; - case 0x1003: m_irq_enable = data & 0x80; set_irq_line(CLEAR_LINE); break; - case 0x1004: m_irq_count = m_irq_count_latch; set_irq_line(CLEAR_LINE); break; - case 0x1005: m_irq_count_latch = (m_irq_count_latch & 0x00ff) | (data << 8); break; - case 0x1006: m_irq_count_latch = (m_irq_count_latch & 0xff00) | data; break; - - case 0x2000: - prg8_ab(data); - break; - - case 0x3000: case 0x3001: case 0x3002: case 0x3003: - case 0x3004: case 0x3005: case 0x3006: case 0x3007: - chr1_x(offset & 0x07, data, CHRROM); - break; - - case 0x4000: - prg8_cd(data); - break; - - default: + case 0x1007: break; } } diff --git a/src/devices/bus/nes/irem.h b/src/devices/bus/nes/irem.h index 4f3cd576e5a..7aa6c47a11f 100644 --- a/src/devices/bus/nes/irem.h +++ b/src/devices/bus/nes/irem.h @@ -14,9 +14,9 @@ class nes_lrog017_device : public nes_nrom_device { public: // construction/destruction - nes_lrog017_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + nes_lrog017_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); - virtual void write_h(offs_t offset, uint8_t data) override; + virtual void write_h(offs_t offset, u8 data) override; virtual void pcb_reset() override; }; @@ -28,9 +28,9 @@ class nes_holydivr_device : public nes_nrom_device { public: // construction/destruction - nes_holydivr_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + nes_holydivr_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); - virtual void write_h(offs_t offset, uint8_t data) override; + virtual void write_h(offs_t offset, u8 data) override; virtual void pcb_reset() override; }; @@ -42,9 +42,9 @@ class nes_tam_s1_device : public nes_nrom_device { public: // construction/destruction - nes_tam_s1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + nes_tam_s1_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); - virtual void write_h(offs_t offset, uint8_t data) override; + virtual void write_h(offs_t offset, u8 data) override; virtual void pcb_reset() override; }; @@ -56,29 +56,36 @@ class nes_g101_device : public nes_nrom_device { public: // construction/destruction - nes_g101_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + nes_g101_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); - virtual void write_h(offs_t offset, uint8_t data) override; + virtual void write_h(offs_t offset, u8 data) override; virtual void pcb_reset() override; protected: + // construction/destruction + nes_g101_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u8 prg_mask); + // device-level overrides virtual void device_start() override; - uint8_t m_latch; + void set_prg(); + u8 m_latch; + +private: + u8 m_reg, m_prg_mask; }; // ======================> nes_h3001_device -class nes_h3001_device : public nes_nrom_device +class nes_h3001_device : public nes_g101_device { public: // construction/destruction - nes_h3001_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + nes_h3001_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); - virtual void write_h(offs_t offset, uint8_t data) override; + virtual void write_h(offs_t offset, u8 data) override; virtual void pcb_reset() override; @@ -87,13 +94,15 @@ protected: virtual void device_start() override; virtual void device_timer(emu_timer &timer, device_timer_id id, int param) override; - uint16_t m_irq_count, m_irq_count_latch; - int m_irq_enable; +private: + u16 m_irq_count, m_irq_count_latch; + u8 m_irq_enable; - static const device_timer_id TIMER_IRQ = 0; + static constexpr device_timer_id TIMER_IRQ = 0; emu_timer *irq_timer; }; + // device type definition DECLARE_DEVICE_TYPE(NES_LROG017, nes_lrog017_device) DECLARE_DEVICE_TYPE(NES_HOLYDIVR, nes_holydivr_device) -- cgit v1.2.3