From 3004400859b348aeac6cb4b31ceb35919914d5c2 Mon Sep 17 00:00:00 2001 From: AJR Date: Sun, 20 Jan 2019 18:48:44 -0500 Subject: z8: Mask RP properly for debug register view (nw) --- src/devices/cpu/z8/z8.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/devices/cpu/z8/z8.cpp b/src/devices/cpu/z8/z8.cpp index bc78fb016bc..7cf413ed4a7 100644 --- a/src/devices/cpu/z8/z8.cpp +++ b/src/devices/cpu/z8/z8.cpp @@ -1501,7 +1501,7 @@ void z8_device::state_import(const device_state_entry &entry) case Z8_R0: case Z8_R1: case Z8_R2: case Z8_R3: case Z8_R4: case Z8_R5: case Z8_R6: case Z8_R7: case Z8_R8: case Z8_R9: case Z8_R10: case Z8_R11: case Z8_R12: case Z8_R13: case Z8_R14: case Z8_R15: { auto dis = machine().disable_side_effects(); - register_write(m_rp + (entry.index() - Z8_R0), m_fake_r[entry.index() - Z8_R0]); + register_write((m_rp & 0xf0) + (entry.index() - Z8_R0), m_fake_r[entry.index() - Z8_R0]); break; } @@ -1517,7 +1517,7 @@ void z8_device::state_export(const device_state_entry &entry) case Z8_R0: case Z8_R1: case Z8_R2: case Z8_R3: case Z8_R4: case Z8_R5: case Z8_R6: case Z8_R7: case Z8_R8: case Z8_R9: case Z8_R10: case Z8_R11: case Z8_R12: case Z8_R13: case Z8_R14: case Z8_R15: { auto dis = machine().disable_side_effects(); - m_fake_r[entry.index() - Z8_R0] = register_read(m_rp + (entry.index() - Z8_R0)); + m_fake_r[entry.index() - Z8_R0] = register_read((m_rp & 0xf0) + (entry.index() - Z8_R0)); break; } -- cgit v1.2.3