From 2d3e38c384026fd053534c4c62bddbe7ee41661a Mon Sep 17 00:00:00 2001 From: AJR Date: Wed, 12 Feb 2020 10:30:07 -0500 Subject: Rename Roland drivers (nw) --- scripts/target/mame/mess.lua | 8 +- src/mame/drivers/rcm32p.cpp | 562 -------------------------------------- src/mame/drivers/rd110.cpp | 289 -------------------- src/mame/drivers/rmt32.cpp | 441 ------------------------------ src/mame/drivers/roland_cm32p.cpp | 562 ++++++++++++++++++++++++++++++++++++++ src/mame/drivers/roland_d110.cpp | 289 ++++++++++++++++++++ src/mame/drivers/roland_mt32.cpp | 441 ++++++++++++++++++++++++++++++ src/mame/drivers/roland_sc55.cpp | 86 ++++++ src/mame/drivers/rsc55.cpp | 86 ------ src/mame/mame.lst | 26 +- src/mame/mess.flt | 8 +- 11 files changed, 1399 insertions(+), 1399 deletions(-) delete mode 100644 src/mame/drivers/rcm32p.cpp delete mode 100644 src/mame/drivers/rd110.cpp delete mode 100644 src/mame/drivers/rmt32.cpp create mode 100644 src/mame/drivers/roland_cm32p.cpp create mode 100644 src/mame/drivers/roland_d110.cpp create mode 100644 src/mame/drivers/roland_mt32.cpp create mode 100644 src/mame/drivers/roland_sc55.cpp delete mode 100644 src/mame/drivers/rsc55.cpp diff --git a/scripts/target/mame/mess.lua b/scripts/target/mame/mess.lua index f235d30aa8c..81a2fe0f993 100644 --- a/scripts/target/mame/mess.lua +++ b/scripts/target/mame/mess.lua @@ -3210,10 +3210,10 @@ files { createMESSProjects(_target, _subtarget, "roland") files { - MAME_DIR .. "src/mame/drivers/rmt32.cpp", - MAME_DIR .. "src/mame/drivers/rcm32p.cpp", - MAME_DIR .. "src/mame/drivers/rd110.cpp", - MAME_DIR .. "src/mame/drivers/rsc55.cpp", + MAME_DIR .. "src/mame/drivers/roland_cm32p.cpp", + MAME_DIR .. "src/mame/drivers/roland_d110.cpp", + MAME_DIR .. "src/mame/drivers/roland_mt32.cpp", + MAME_DIR .. "src/mame/drivers/roland_sc55.cpp", MAME_DIR .. "src/mame/drivers/tb303.cpp", MAME_DIR .. "src/mame/drivers/tr606.cpp", } diff --git a/src/mame/drivers/rcm32p.cpp b/src/mame/drivers/rcm32p.cpp deleted file mode 100644 index 9f20c4cc7f9..00000000000 --- a/src/mame/drivers/rcm32p.cpp +++ /dev/null @@ -1,562 +0,0 @@ -// license:BSD-3-Clause -// copyright-holders:Valley Bell -/************************************************************************************************* - - Roland CM-32P driver - - Driver by Valley Bell - - Thanks to KitsuWhooa for the PCB layout diagram and part list. - - -Notes: -- When booting, it does a basic check by writing values 0..0xFF to 0x108A. - It then expects (value & 0x03) to be read back from 0x1080 and (value) to be read back from 0x1081/0x1082. - The routine for doing the check begins at 0x4686. - Succeeding means it ends up at 0x4801. -- When in test mode, the firmware gets stuck in the loop at 0xBB06, waiting for Interrupt #5 (calls 0x4014) to fire. - It gets there by calling function 0xBBBB, which writes text (address w@0x40, num characters b@0x43) to the LCD screen. - This can be worked around by setting b@BB2D = 03. -- The firmware gets also stuck in the loop at 0x7D70, waiting for Interrupt #8 (calls 0x4020). - This might be related to finding the best free voice? - You can exit the loop by setting b@7D80 = 00. -- Test Mode shows the results of 4 checks: - 1. SRAM check - 2. MIDI IN/OUT check - 3. PCM ROM and card check - 4. RCC-CPU check - Errors in check 2 and 3 are "not abnormal". - In order to make check 2 pass successfully, you need to connect MIDI Out with MIDI In, creating a loopback. - Check 3 requires the SN-U110-04 PCM card ("Electric Grand & Clavi") to be inserted in order to succeed. -- In order to access the built-in PCM ROM (IC18), the CPU asks the sound chip to read offsets 0x000000 .. 0x07FFFF. - The PCM card is accessed via offsets 0x080000 .. 0x0FFFFF. - The additional PCM ROMs are mapped to 0x100000 .. 0x17FFFF (IC19) and 0x200000 .. 0x27FFFF according to the sample table in IC18. -- The sound chip has 32 voices. Voice 0 is reserved by the firmware for reading data from the PCM ROM. - The firmware allocates voices from back to front, i.e. voice 31 first. - - -TODO: -- actual sound emulation -- add PCM card support - - -PCB Layout ----------- - -PCM BOARD CM-32P ASSY 79554310 00 - -| OUTPUT | PHONES | INPUT (MT-32) | MIDI IN | MIDI THROUGH | DC 9V | -|----------------------------------------------------------------------| -| JK2 JK4 JK3 JKLI JKRI CN4 JK1I JK1T JK5 | -| | -| SW1 | -| || IC2 IC1 | -| IC35 IC33 IC34 || IC31 IC30 CN0 | -| CN3 ||<--IC32 | -| |----| |----| |----| | -| | | | | | | | -| IC22 || IC24 |IC10| |IC9 | | | | -| || IC25 IC4 | | | | | | | -| ||<--IC23 |SRAM| |ROM | | | | -| |----| |----| |IC3 | X1 | -| |----| | | | -| | IC | |------| | | | -| | 17 | | IC16 | IC12 | | | -| |----| |------| X2 |----| | -| |------| IC13 | -| IC6 |----||----||----| | IC15 | | -| |-||-| | || || | |------| IC14 |------| | -| | || | |IC20||IC19||IC18| | IC8 | | -| |-||-| | || || | |------| | -| IC7 |SMPL||SMPL||SMPL| |------------------| | -| |ROM ||ROM ||ROM | | CN5 | | -| |----||----||----| | | CN1 | -|------------------------------|------------------|--------------------| - | | - -Parts: - -(All parts THT unless otherwise noted.) -|-----------------------------------------------------------------------| -| JK1I, JK1T | DIN 5 | -| JK2, JK4, JKRI, JKLI | 1/4 Mono Jack | -| JK3 | 1/4 Stereo Jack | -| JK5 | DC Barrel Jack (Centre Negative) | -| SW1 | SW PCB DPDT | -| IC1 | 74HC04AP | -| IC2 | TLP552 | -| IC3 | P8098 (CPU) | -| IC4 | M51953AL | -| IC6, IC7 | M5M4464AP-12 | -| IC8 | Roland R15239111 / M60012-0141FP (QFP) | -| IC9 | AM27C512-150DC | -| IC10 | TC5564APL-15 | -| IC12 | 74HC00AP | -| IC13 | 74HC02AP | -| IC14 | 74HC32AP | -| IC15 | Roland R15229894 / MB87419 (QFP) | -| IC16 | Roland R15229895 / MB87420 (QFP) | -| IC17 | Roland P15239126 / 23140-007 (QFP) | -| IC18 | Roland R15179970 / MB834000A-20 3B1 | -| IC19 | Roland R15179971 / MB834000A-20 3B2 | -| IC20 | Roland R15179972 / HN62304BPE98 | -| IC22 | PCM56P | -| IC23 | M5238L | -| IC24 | HD14052BP | -| IC25 | NJM2082D | -| IC30, IC31, IC33, IC34, IC35 | NJM4565DD | -| IC32 | M5207L01 | -| CN0 | 7805A | -| CN1 | LED PCB | -| CN3 | Volume Control PCB | -| CN4 | unpopulated | -| CN5 | PCM Card Slot | -| X1 | Crystal 12MHz | -| X2 | Crystal 32.768KHz | -|-----------------------------------------------------------------------| - - -PCM ROM Tables --------------- -Sample Table (address: 0x00100) ------------- -Pos Len Description -00 02 start offset, bits 0-15 (Little Endian) -02 01 start offset, bits 16-18 (bits 0-2) - PCM card select (bit 3): set for sounds on PCM cards - ROM bank (bits 4-5): - 0 = IC18 - 1 = IC19 - 2 = IC20 - loop mode (bits 6-7): - 0 = normal loop - 1 = no loop - 2 = ping-pong (forwards, backwards, forwards, backwards, ...) -03 02 last sample (sample length = last sample + 1) -05 02 loop length (loop start = sample length - loop length) -07 01 ?? -08 01 reference note (when played back at 32000 Hz) -09 01 ?? --> 0Ah bytes per entry - -Tone List (address: 0x01000) ---------- -Pos Len Description -00 0A sample name -0A 01 tone type - 00 - single - 01 - dual - 02 - detune - 03 - velocity mix - 04 - velocity switch - 05..07 - invalid - 08..0F/10..17/.../78..7F - same as 00..07 - 80..FF - rhythm? -0B 01 ?? -0C 02 ?? -0E 01 ?? -0F 01 ?? -10 0B some note IDs (padded with FF) -1B 0C sample IDs (always one more than number of note IDs, padded with FF) -27 09 ?? -30 0B some note IDs (padded with FF) -3B 0C sample IDs (always one more than number of note IDs, padded with FF) -47 09 ?? --> 50h bytes per entry - -Note: Section 30..4F is only used with tone types 01, 03, 04 - - -CM-32P Firmware Work RAM Layout -------------------------------- -2100..22FF - MIDI data receive buffer - -2344..23C1 - Part 1..6 "Patch temporary area" (see manual page 21, 0x15 bytes per partial) -23C4..23D4 - "System area" settings (see manual page 22, master volume, reverb setting, channel assignments) - 23CE-23D3 - Part 1..6 MIDI channel -23D6..25B5 - Part 1..6 instrument data (0x50 bytes per partial, from PCM ROM at 0x1000/0x1050/0x10A0/...) -25B8..2B57 - Part 1..6 sample table data (0xF0 bytes per partial, from PCM ROM at 0x0100/0x010A/0x0114/...) - -34DC..34E1 - Part 1..6 Modulation (CC #1, initialized with 0) -34E2..34E7 - Part 1..6 Pitch Bend LSB (initialized with 0) -34E8..34ED - Part 1..6 Pitch Bend MSB (initialized with 64) -34EE..34F3 - Part 1..6 Expression setting (CC #11, initialized with 100) -34F4..34F9 - Part 1..6 Sustain setting (CC #64, initialized with 0) -34FA..34FF - Part 1..6 unused (initialized with 0) -3500..3505 - Part 1..6 RPN LSB (CC #98, initialized with 0xFF) -3506..350B - Part 1..6 RPN MSB (CC #99, initialized with 0xFF) -350C..3511 - Part 1..6 NRPN received (initialized with 0xFF, set to 0 when RPN LSB/MSB is received, set to 0xFF when NRPN is received) -3512..3517 - Part 1..6 ?? (initialized with 0) -3518..351D - Part 1..6 Instrument setting -351E - Reverb Mode -351F - Reverb Time -3521 - ?? (initialized with 1) -352A..3889 - voice memory (32 bytes per block) - 35AA..35C9 - some jump table index for interrupt #8 -38DE..394D - more voice memory (32 bytes per block) - -397E..3??? - state of playing notes - 3986 - current panning volume, left speaker (00..1F) - 39A6 - current panning volume, right speaker (00..1F) - 39C6 - target panning volume, left speaker (00..1F) - 39E6 - target panning volume, right speaker (00..1F) - -3D7C..3E84 - SysEx receive data buffer - -Some routine locations ----------------------- -0x4014 LCD related interrupt handler -0x401C serial input (MIDI data) interrupt handler -0x4020 some interrupt handler required while playing notes -0x45CB Initialization (memory clear + checks), external memory is checked from 0x4679 on -0x5024 decide whether or not Test Mode is entered (normal boot == jump to 0x502A) -0x50F5 MIDI handling code -0x65E8 PCM ROM instrument check -0x6650 PCM card instrument check (Note: assumes that the SN-U110-04 PCM card is inserted) -0x6EA4 play a note (parameters: 0040 - part, 0041 = note pitch, 0042 - velocity) -0xB027 load instrument data from PCM ROM (writes to 23D6 + 50*i) -0xB12B load instrument sample data from PCM ROM (reads sample IDs from 23D6+1B + 50*i, writes to 25B8 + F0*i) -0xB1A0 load secondary instrument sample data from PCM ROM (reads sample IDs from 23D6+3B + 50h*i, writes to 25B8+50 + F0*i) -0xB1E8 load 1 sample table entry from PCM ROM -0xB316 PCM ROM signature check -0xBBBB write text to LCD - -*/ - -#include "emu.h" -#include "cpu/mcs96/i8x9x.h" -#include "machine/ram.h" -#include "machine/timer.h" -#include "video/msm6222b.h" -#include "emupal.h" -#include "screen.h" - - -// unscramble address: ROM dump offset -> proper (descrambled) offset -#define UNSCRAMBLE_ADDRESS(_offset) \ - bitswap<19>(_offset,18,17,15,14,16,12,11, 7, 9,13,10, 8, 3, 2, 1, 6, 4, 5, 0) -// scramble address: proper offset -> ROM dump offset -#define SCRAMBLE_ADDRESS(_offset) \ - bitswap<19>(_offset,18,17,14,16,15, 9,13,12, 8,10, 7,11, 3, 1, 2, 6, 5, 4, 0) - -#define UNSCRAMBLE_DATA(_data) \ - bitswap<8>(_data,1,2,7,3,5,0,4,6) - - -static INPUT_PORTS_START( cm32p ) - PORT_START("A7") - PORT_BIT(0x03ff, 0x0000, IPT_DIAL) PORT_NAME("Knob") PORT_SENSITIVITY(50) PORT_KEYDELTA(8) PORT_CODE_DEC(KEYCODE_DOWN) PORT_CODE_INC(KEYCODE_UP) - - PORT_START("SERVICE") // connected to Port 0 of the P8098 CPU. - PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Test Switch") PORT_TOGGLE PORT_CODE(KEYCODE_F2) // SW A (checked during boot) - PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Test: Check/Tune") PORT_CODE(KEYCODE_B) // SW B - - PORT_START("SW") // test switches, accessed by reading from address 0x1300 - PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Test: MSB Adj.") PORT_CODE(KEYCODE_1) // SW 1 - PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Test: THD Check") PORT_CODE(KEYCODE_2) // SW 2 - PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Test: PCM Out: String 1") PORT_CODE(KEYCODE_3) // SW 3 - PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Test: PCM Out: Sax 1") PORT_CODE(KEYCODE_4) // SW 4 - PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Test: PCM + Long Reverb") PORT_CODE(KEYCODE_5) // SW 5 - PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Test: PCM + Short Reverb") PORT_CODE(KEYCODE_6) // SW 6 - PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Test: VCA Down Check") PORT_CODE(KEYCODE_7) // SW 7 - PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Test: VCA Up Check") PORT_CODE(KEYCODE_8) // SW 8 -INPUT_PORTS_END - -class cm32p_state : public driver_device -{ -public: - cm32p_state(const machine_config &mconfig, device_type type, const char *tag); - - void cm32p(machine_config &config); - -protected: - virtual void machine_start() override; - virtual void machine_reset() override; - -private: - required_device cpu; - required_device lcd; - required_device midi_timer; - required_device some_ram; - required_ioport test_sw; - required_ioport service_port; - - void mt32_palette(palette_device &palette) const; - - uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); - - DECLARE_WRITE16_MEMBER(midi_w); - - DECLARE_READ8_MEMBER(lcd_ctrl_r); - DECLARE_WRITE8_MEMBER(lcd_ctrl_w); - DECLARE_WRITE8_MEMBER(lcd_data_w); - DECLARE_READ16_MEMBER(port0_r); - DECLARE_READ8_MEMBER(pcmrom_r); - DECLARE_READ8_MEMBER(dsp_io_r); - DECLARE_WRITE8_MEMBER(dsp_io_w); - DECLARE_READ8_MEMBER(snd_io_r); - DECLARE_WRITE8_MEMBER(snd_io_w); - DECLARE_READ8_MEMBER(test_sw_r); - - TIMER_DEVICE_CALLBACK_MEMBER(midi_timer_cb); - TIMER_DEVICE_CALLBACK_MEMBER(samples_timer_cb); - - void cm32p_map(address_map &map); - - u8 midi; - int midi_pos; - u8 port0; - u8 sound_io_buffer[0x100]; - u8 dsp_io_buffer[0x80]; -}; - -cm32p_state::cm32p_state(const machine_config &mconfig, device_type type, const char *tag) - : driver_device(mconfig, type, tag) - , cpu(*this, "maincpu") - , lcd(*this, "lcd") - , midi_timer(*this, "midi_timer") - , some_ram(*this, "some_ram") - , test_sw(*this, "SW") - , service_port(*this, "SERVICE") -{ -} - - -// screen update function from Roland D-110 -uint32_t cm32p_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) -{ - uint8_t y,ra,gfx; - uint16_t sy=0,x; - const uint8_t *data = lcd->render(); - bitmap.fill(0); - - for (y = 0; y < 2; y++) - { - for (ra = 0; ra < 9; ra++) - { - uint16_t *p = &bitmap.pix16(sy++); - - for (x = 0; x < 16; x++) - { - gfx = 0; - if (ra < 8) - gfx = data[x*16 + y*640 + ra]; - - *p++ = BIT(gfx, 4); - *p++ = BIT(gfx, 3); - *p++ = BIT(gfx, 2); - *p++ = BIT(gfx, 1); - *p++ = BIT(gfx, 0); - *p++ = 0; - } - } - } - return 0; -} - -void cm32p_state::machine_start() -{ - u8 *rom = memregion("maincpu")->base(); - - // TODO: The IC8 gate array has an "LCD INT" line that needs to be emulated. Then, the hack can be removed. - // Note: The hack is not necessary when *not* using test mode. - rom[0xBB2D] = 0x03; // hack to make test mode not freeze when displaying the LCD text - - // TODO: remove this hack - rom[0x7D80] = 0x00; // hack to exit some loop waiting for interrupt #8 -} - -void cm32p_state::machine_reset() -{ - midi_timer->adjust(attotime::from_hz(1)); - midi_pos = 0; - port0 = 0; -} - -WRITE8_MEMBER(cm32p_state::lcd_ctrl_w) -{ - lcd->control_w(data); -} - -READ8_MEMBER(cm32p_state::lcd_ctrl_r) -{ - // The CM-64 service manual lists "D-110 LCD UNIT" for using PCM test mode, so I assume it works like that. - // However, the CM-32P firmware doesn't seem to ever read the status. - return lcd->control_r() >> 7; -} - -WRITE8_MEMBER(cm32p_state::lcd_data_w) -{ - lcd->data_w(data); -} - -WRITE16_MEMBER(cm32p_state::midi_w) -{ - logerror("midi_out %02x\n", data); - midi = data; -} - -TIMER_DEVICE_CALLBACK_MEMBER(cm32p_state::midi_timer_cb) -{ - const static uint8_t midi_data[3] = { 0x9a, 0x40, 0x7f }; - midi = midi_data[midi_pos++]; - logerror("midi_in %02x\n", midi); - cpu->serial_w(midi); - if(midi_pos < sizeof(midi_data)) - midi_timer->adjust(attotime::from_hz(1250)); -} - -READ16_MEMBER(cm32p_state::port0_r) -{ - return port0 | service_port->read(); -} - -READ8_MEMBER(cm32p_state::pcmrom_r) -{ - offs_t romOfs = SCRAMBLE_ADDRESS(offset); - const u8* pcm_rom = memregion("pcm32")->base(); - return UNSCRAMBLE_DATA(pcm_rom[romOfs]); -} - -READ8_MEMBER(cm32p_state::dsp_io_r) -{ - return dsp_io_buffer[offset]; -} - -WRITE8_MEMBER(cm32p_state::dsp_io_w) -{ - dsp_io_buffer[offset] = data; - // do read/write to some external memory, makes the RCC-CPU check pass. (routine at 0x4679) - switch(offset) - { - case 0x04: - // write to partials?? (written in loop at 0x4375) - break; - case 0x06: - { - u8* ram = some_ram->pointer(); - offs_t ofs = data; - ram[0x000 | ofs] = dsp_io_buffer[0x00] & 0x03; - ram[0x100 | ofs] = dsp_io_buffer[0x01]; - ram[0x200 | ofs] = dsp_io_buffer[0x02]; - } - break; - case 0x0A: - { - const u8* ram = some_ram->pointer(); - offs_t ofs = data; - dsp_io_buffer[0x00] = ram[0x000 | ofs]; - dsp_io_buffer[0x01] = ram[0x100 | ofs]; - dsp_io_buffer[0x02] = ram[0x200 | ofs]; - } - break; - } -} - -READ8_MEMBER(cm32p_state::snd_io_r) -{ - if (offset == 0x01) - { - // code for reading from the PCM sample table is at 0xB027 - // The code at 0xB0AC writes to 1411/1F (??), then 1403/02 (bank), then 1409/08/0B/0A (address). - // It waits a few cycles and at 0xB0F7 it reads the resulting data from 1401. - offs_t bank = sound_io_buffer[0x03]; - offs_t addr = (sound_io_buffer[0x09] << 0) | (sound_io_buffer[0x0A] << 8) | (sound_io_buffer[0x0B] << 16); - addr = ((addr >> 6) + 2) & 0x3FFFF; - addr |= (bank << 16); - // write actual ROM address to 1440..1443 for debugging - sound_io_buffer[0x43] = (addr >> 0) & 0xFF; - sound_io_buffer[0x42] = (addr >> 8) & 0xFF; - sound_io_buffer[0x41] = (addr >> 16) & 0xFF; - sound_io_buffer[0x40] = (addr >> 24) & 0xFF; - return pcmrom_r(space, addr, 0xFF); - } - return sound_io_buffer[offset]; -} - -WRITE8_MEMBER(cm32p_state::snd_io_w) -{ - // register map - // ------------ - // Note: 16-bit words are Little Endian, the firmware writes the odd byte is first - // 00/01 - ?? - // 02/03 - ROM bank (only bits 11-13 are used, bit 11 = PCM card, bits 12-13 select between IC18/19/20) - // 04/05 - frequency (2.14 fixed point, 0x4000 = 32000 Hz) - // 06/07 - volume - // 08/09 - sample start address, fraction (2.14 fixed point, i.e. 1 byte = 0x4000) - // 0A/0B - sample start address (high word, i.e. address bits 2..17) - // 0C/0D - sample end address (high word) - // 0E/0F - sample loop address (high word) - // 11/13/15/17 - voice enable mask (11 = least significant 8 bits, 17 = most significant 8 bits) - // 1A - ?? - // 1F - voice select - sound_io_buffer[offset] = data; -} - -READ8_MEMBER(cm32p_state::test_sw_r) -{ - return test_sw->read(); -} - -TIMER_DEVICE_CALLBACK_MEMBER(cm32p_state::samples_timer_cb) -{ - port0 ^= 0x10; -} - -void cm32p_state::mt32_palette(palette_device &palette) const -{ - palette.set_pen_color(0, rgb_t(0, 0, 0)); - palette.set_pen_color(1, rgb_t(0, 255, 0)); -} - -void cm32p_state::cm32p_map(address_map &map) -{ - map(0x1080, 0x10ff).rw(FUNC(cm32p_state::dsp_io_r), FUNC(cm32p_state::dsp_io_w)); // DSP area (writes to 1080..82/86/8C/8D) - map(0x1100, 0x1100).rw(FUNC(cm32p_state::lcd_ctrl_r), FUNC(cm32p_state::lcd_ctrl_w)); - map(0x1102, 0x1102).w(FUNC(cm32p_state::lcd_data_w)); - map(0x1300, 0x1300).r(FUNC(cm32p_state::test_sw_r)); // test switch state - map(0x1400, 0x14ff).rw(FUNC(cm32p_state::snd_io_r), FUNC(cm32p_state::snd_io_w)); // sound chip area - map(0x2000, 0x20ff).rom().region("maincpu", 0x2000); // init vector @ 2080 - map(0x2100, 0x3fff).ram(); // main RAM - map(0x4000, 0xbfff).rom().region("maincpu", 0x4000); - map(0xc000, 0xffff).r(FUNC(cm32p_state::pcmrom_r)); // show descrambled PCM ROM (for debugging) -} - -void cm32p_state::cm32p(machine_config &config) -{ - i8x9x_device &maincpu(P8098(config, cpu, 12_MHz_XTAL)); - maincpu.set_addrmap(AS_PROGRAM, &cm32p_state::cm32p_map); - maincpu.ach7_cb().set_ioport("A7"); - maincpu.serial_tx_cb().set(FUNC(cm32p_state::midi_w)); - maincpu.in_p0_cb().set(FUNC(cm32p_state::port0_r)); - - RAM(config, some_ram).set_default_size("8K"); - - screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_LCD)); - screen.set_refresh_hz(50); - screen.set_screen_update(FUNC(cm32p_state::screen_update)); - screen.set_size(16*6-1, (16*6-1)*3/4); - screen.set_visarea(0, 16*6-2, 0, (16*6-1)*3/4-1); - screen.set_palette("palette"); - - PALETTE(config, "palette", FUNC(cm32p_state::mt32_palette), 2); - - MSM6222B_01(config, lcd, 0); - - TIMER(config, midi_timer).configure_generic(FUNC(cm32p_state::midi_timer_cb)); - - TIMER(config, "samples_timer").configure_periodic(FUNC(cm32p_state::samples_timer_cb), attotime::from_hz(32000*2)); -} - -ROM_START( cm32p ) - ROM_REGION( 0x10000, "maincpu", 0 ) - ROM_LOAD( "cm-32_p__1.0.0.am27c512.7d.ic9", 0x000000, 0x10000, CRC(6f2f6dfd) SHA1(689f77c1d56f923ef1dab7d993a124c47736bc56) ) // "CM-32 P // 1 0 0 " sticker on an AM27C512-150DC eprom @ IC9 - - ROM_REGION( 0x400000, "pcm32", 0 ) - ROM_LOAD( "roland__r15179970__mb834000a-20__3b1_aa__8917_r00.45f.ic18", 0x000000, 0x80000, CRC(8e53b2a3) SHA1(4872530870d5079776e80e477febe425dc0ec1df) ) // markings under chip footprint are "MB834000A-20P-G-3B1" - // 0x080000 .. 0x0FFFFF is reserved for the PCM card - ROM_LOAD( "roland__r15179971__mb834000a-20__3b2_aa__8919_r02.34f.ic19", 0x100000, 0x80000, CRC(c8220761) SHA1(49e55fa672020f95fd9c858ceaae94d6db93df7d) ) // markings under chip footprint are "MB834000A20P-G-3B2" (including the missing dash, which is a typo on the board silkscreen) - ROM_LOAD( "roland__r15179972__hn62304bpe98__9d1_japan.3f.ic20", 0x200000, 0x80000, CRC(733c4054) SHA1(9b6b59ab74e5bf838702abb087c408aaa85b7b1f) ) // markings under chip footprint are "HN62304BPE98" -ROM_END - -CONS( 1989, cm32p, 0, 0, cm32p, cm32p, cm32p_state, empty_init, "Roland", "CM-32P", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) diff --git a/src/mame/drivers/rd110.cpp b/src/mame/drivers/rd110.cpp deleted file mode 100644 index b9a9f62cd9e..00000000000 --- a/src/mame/drivers/rd110.cpp +++ /dev/null @@ -1,289 +0,0 @@ -// license:BSD-3-Clause -// copyright-holders:Olivier Galibert, Jonathan Gevaryahu -/************************************************************************************************* - - Roland D-110 driver - - Driver by Olivier Galibert and Jonathan Gevaryahu - - The Roland D-110 is an expander (synthesizer without the keyboard) - from 1988. Internally it's very similar to a mt32, with a better - LCD screen (16x2) and more control buttons. More importantly, it - has more sound rom, a battery-backed ram and a port for memory - cards allowing to load and save new sounds. - - After the first boot, the ram needs to be reinitialized to factory - default values. Press Write/Copy (I) while resetting then - validate with Enter (K). -*/ - -#include "emu.h" -#include "cpu/mcs96/i8x9x.h" -#include "machine/nvram.h" -#include "machine/ram.h" -#include "machine/timer.h" -#include "video/msm6222b.h" -#include "emupal.h" -#include "screen.h" - -static INPUT_PORTS_START( d110 ) - PORT_START("SC0") - PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Write/Copy") PORT_CODE(KEYCODE_I) - PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Number +") PORT_CODE(KEYCODE_U) - PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Bank +") PORT_CODE(KEYCODE_Y) - PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Group +") PORT_CODE(KEYCODE_T) - PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Part +") PORT_CODE(KEYCODE_R) - PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Timbre") PORT_CODE(KEYCODE_E) - PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Patch") PORT_CODE(KEYCODE_W) - PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Exit") PORT_CODE(KEYCODE_Q) - - PORT_START("SC1") - PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Enter") PORT_CODE(KEYCODE_K) - PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Number -") PORT_CODE(KEYCODE_J) - PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Bank -") PORT_CODE(KEYCODE_H) - PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Group -") PORT_CODE(KEYCODE_G) - PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Part -") PORT_CODE(KEYCODE_F) - PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("System") PORT_CODE(KEYCODE_D) - PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Part") PORT_CODE(KEYCODE_S) - PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Edit") PORT_CODE(KEYCODE_A) -INPUT_PORTS_END - - -class d110_state : public driver_device -{ -public: - d110_state(const machine_config &mconfig, device_type type, const char *tag) - : driver_device(mconfig, type, tag) - , m_ram(*this, "ram") - , m_rams(*this, "rams") - , m_memc(*this, "memc") - , m_memcs(*this, "memcs") - , m_lcd(*this, "lcd") - , m_midi_timer(*this, "midi_timer") - , m_maincpu(*this, "maincpu") - { } - - void d110(machine_config &config); - -protected: - virtual void machine_start() override; - virtual void machine_reset() override; - -private: - DECLARE_WRITE8_MEMBER(bank_w); - DECLARE_WRITE8_MEMBER(so_w); - DECLARE_WRITE16_MEMBER(midi_w); - DECLARE_READ8_MEMBER(lcd_ctrl_r); - DECLARE_WRITE8_MEMBER(lcd_ctrl_w); - DECLARE_WRITE8_MEMBER(lcd_data_w); - DECLARE_READ16_MEMBER(port0_r); - TIMER_DEVICE_CALLBACK_MEMBER(midi_timer_cb); - TIMER_DEVICE_CALLBACK_MEMBER(samples_timer_cb); - void d110_palette(palette_device &palette) const; - uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); - - void d110_map(address_map &map); - - uint8_t m_lcd_data_buffer[256]; - int m_lcd_data_buffer_pos; - uint8_t m_midi; - int m_midi_pos; - uint8_t m_port0; - required_device m_ram; - required_device m_rams; - required_device m_memc; - required_device m_memcs; - required_device m_lcd; - required_device m_midi_timer; - required_device m_maincpu; -}; - - -uint32_t d110_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) -{ - uint8_t y,ra,gfx; - uint16_t sy=0,x; - const uint8_t *data = m_lcd->render(); - bitmap.fill(0); - - for (y = 0; y < 2; y++) - { - for (ra = 0; ra < 9; ra++) - { - uint16_t *p = &bitmap.pix16(sy++); - - for (x = 0; x < 16; x++) - { - gfx = 0; - if (ra < 8) - gfx = data[x*16 + y*640 + ra]; - - *p++ = BIT(gfx, 4); - *p++ = BIT(gfx, 3); - *p++ = BIT(gfx, 2); - *p++ = BIT(gfx, 1); - *p++ = BIT(gfx, 0); - *p++ = 0; - } - } - } - return 0; -} - -void d110_state::machine_start() -{ - m_rams->set_base(m_ram->pointer(), 32768); - m_memcs->set_base(m_memc->pointer(), 32768); - - membank("bank")->configure_entries(0x00, 4, memregion("maincpu")->base(), 0x4000); - membank("bank")->configure_entries(0x10, 2, m_ram->pointer(), 0x4000); - membank("bank")->configure_entries(0x20, 8, memregion("presets")->base(), 0x4000); - membank("bank")->configure_entries(0x30, 2, m_memc->pointer(), 0x4000); - membank("fixed")->set_base(m_ram->pointer()); - - m_lcd_data_buffer_pos = 0; -} - -void d110_state::machine_reset() -{ - // midi_timer->adjust(attotime::from_hz(1)); - m_midi_pos = 0; - m_port0 = 0x80; // battery ok -} - -WRITE8_MEMBER(d110_state::lcd_ctrl_w) -{ - m_lcd->control_w(data); - for(int i=0; i != m_lcd_data_buffer_pos; i++) - m_lcd->data_w(m_lcd_data_buffer[i]); - m_lcd_data_buffer_pos = 0; -} - -READ8_MEMBER(d110_state::lcd_ctrl_r) -{ - // Busy flag in the msm622b is bit 7, while the software expects it in bit 0... - return m_lcd->control_r() >> 7; -} - -WRITE8_MEMBER(d110_state::lcd_data_w) -{ - if(m_lcd_data_buffer_pos == sizeof(m_lcd_data_buffer)) { - logerror("Warning: lcd data buffer overflow (%04x)\n", m_maincpu->pc()); - return; - } - m_lcd_data_buffer[m_lcd_data_buffer_pos++] = data; -} - -WRITE8_MEMBER(d110_state::bank_w) -{ - membank("bank")->set_entry(data); -} - -WRITE16_MEMBER(d110_state::midi_w) -{ - logerror("midi_out %02x\n", data); - m_midi = data; -} - -TIMER_DEVICE_CALLBACK_MEMBER(d110_state::midi_timer_cb) -{ - const static uint8_t midi_data[3] = { 0x91, 0x40, 0x7f }; - m_midi = midi_data[m_midi_pos++]; - logerror("midi_in %02x\n", m_midi); - m_maincpu->serial_w(m_midi); - if(m_midi_pos < sizeof(midi_data)) - m_midi_timer->adjust(attotime::from_hz(1250)); -} - -READ16_MEMBER(d110_state::port0_r) -{ - return m_port0; -} - -TIMER_DEVICE_CALLBACK_MEMBER(d110_state::samples_timer_cb) -{ - m_port0 ^= 0x10; -} - -WRITE8_MEMBER(d110_state::so_w) -{ - // bit 0 = led - // bit 1-2 = reverb program a13/a14 - // bit 3 = R. SW. to ananlog board - // bit 5 = boss 8Mhz clock, handled internally - // logerror("so: rw=%d bank=%d led=%d\n", (data >> 3) & 1, (data >> 1) & 3, data & 1); -} - -void d110_state::d110_palette(palette_device &palette) const -{ - palette.set_pen_color(0, rgb_t(0, 255, 0)); - palette.set_pen_color(1, rgb_t(0, 0, 0)); -} - -void d110_state::d110_map(address_map &map) -{ - map(0x0100, 0x0100).w(FUNC(d110_state::bank_w)); - map(0x0200, 0x0200).w(FUNC(d110_state::so_w)); - map(0x021a, 0x021a).portr("SC0").nopw(); - map(0x021c, 0x021c).portr("SC1"); - map(0x0300, 0x0300).w(FUNC(d110_state::lcd_data_w)); - map(0x0380, 0x0380).rw(FUNC(d110_state::lcd_ctrl_r), FUNC(d110_state::lcd_ctrl_w)); - map(0x1000, 0x7fff).rom().region("maincpu", 0x1000); - map(0x8000, 0xbfff).bankrw("bank"); - map(0xc000, 0xffff).bankrw("fixed"); -} - -void d110_state::d110(machine_config &config) -{ - P8098(config, m_maincpu, 12_MHz_XTAL); - m_maincpu->set_addrmap(AS_PROGRAM, &d110_state::d110_map); - m_maincpu->serial_tx_cb().set(FUNC(d110_state::midi_w)); - m_maincpu->in_p0_cb().set(FUNC(d110_state::port0_r)); - -// Battery-backed main ram - RAM( config, "ram" ).set_default_size( "32K" ); - NVRAM(config, m_rams, nvram_device::DEFAULT_ALL_0); - -// Shall become a proper memcard device someday - RAM( config, m_memc ).set_default_size( "32K" ); - NVRAM( config, m_memcs, nvram_device::DEFAULT_ALL_0 ); - - screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_LCD)); - screen.set_refresh_hz(50); - screen.set_screen_update(FUNC(d110_state::screen_update)); -// screen.set_size(20*6-1, 2*9-1); - screen.set_size(16*6-1, (16*6-1)*3/4); - screen.set_visarea(0, 16*6-2, 0, (16*6-1)*3/4-1); - screen.set_palette("palette"); - - PALETTE(config, "palette", FUNC(d110_state::d110_palette), 2); - - MSM6222B_01(config, m_lcd, 0); - - TIMER(config, m_midi_timer).configure_generic(FUNC(d110_state::midi_timer_cb)); - - TIMER(config, "samples_timer").configure_periodic(FUNC(d110_state::samples_timer_cb), attotime::from_hz(32000*2) ); -} - -ROM_START( d110 ) - ROM_REGION( 0x10000, "maincpu", 0 ) - ROM_DEFAULT_BIOS( "110" ) - - ROM_SYSTEM_BIOS( 0, "106", "Firmware 1.06" ) - ROMX_LOAD( "d-110.v1.06.ic19.bin", 0, 0x8000, CRC(3dd5b6e9) SHA1(73b155fb0a8adc2362e73cb0803dafba9ccfb508), ROM_BIOS(0) ) - - ROM_SYSTEM_BIOS( 1, "110", "Firmware 1.10" ) - ROMX_LOAD( "d-110.v1.10.ic19.bin", 0, 0x8000, CRC(3ae68187) SHA1(28635510f30d6c1fb88e00da03e5b4e045c380cb), ROM_BIOS(1) ) - - ROM_REGION( 0x20000, "presets", 0 ) - ROM_LOAD( "r15179873-lh5310-97.ic12.bin", 0, 0x20000, CRC(580a8f9e) SHA1(05587a0542b01625dcde37de5bb339880e47eb93) ) - - ROM_REGION( 0x100000, "la32", 0 ) - ROM_LOAD( "r15179878.ic7.bin", 0, 0x80000, CRC(e117e6ab) SHA1(6760d14900161b8715c2bfd4ebe997877087c90c) ) - ROM_LOAD( "r15179880.ic8.bin", 0x80000, 0x80000, CRC(b329f945) SHA1(9c59f50518a070461b2ec6cb4e43ee7cc1e905b6) ) - - ROM_REGION( 0x8000, "boss", 0 ) - ROM_LOAD( "r15179879.ic6.bin", 0, 0x8000, CRC(5d34174e) SHA1(17bd2887711c5c5458aba6d3be5972b2096eb450) ) -ROM_END - -CONS( 1988, d110, 0, 0, d110, d110, d110_state, empty_init, "Roland", "D110", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) diff --git a/src/mame/drivers/rmt32.cpp b/src/mame/drivers/rmt32.cpp deleted file mode 100644 index 2f6c0be316f..00000000000 --- a/src/mame/drivers/rmt32.cpp +++ /dev/null @@ -1,441 +0,0 @@ -// license:BSD-3-Clause -// copyright-holders:Olivier Galibert,Jonathan Gevaryahu -/************************************************************************************************* - - Roland MT-32/CM32L driver - - Driver by Olivier Galibert and Jonathan Gevaryahu - - The Roland MT32 is an expander (synthesizer without the keyboard) - from 1987. It had a small 20-char LCD display and 10 control - buttons (part 1-5, rhythm, sound/sound group, volume/master - volume), a rotating knob and a midi message led. It uses a weird - kind of synthesis called "Linear Additive". - - The CM32L versions is a simpler/smaller version without the lcd, - buttons or knob but keeping the led. It also has a different - firmware and more partials rom, adding "game sounds". "CM" means - "Computer Music". - - The LAPC-I (I as in Intel) is a ISA board variant of the CM32L - with a MPU-401 frontend added to communicate with the synth. All - the roms are identical with the CM32L. - - Some special tricks: - - pressing 3+V (Part 3 + Volume) at boot time starts the test mode - - - predding 4+R+M (Part 4 + Rhythm + Master Volume) at boot time - shows the firmware version - - - the CM32L drives the lcd as if it was there and looks at the - buttons at boot time for test mode and firmware version - - - -Roland MT-32 rev00 pcb (early 1.0.7 and all earlier firmware, with ic26 and ic27 socketed): - -PCB Layout ----------- - -MT-32 MAIN BOARD ASSY 79377310 00 -|---------------------------------|------------------------|-----------| -| JK1 JK2 IR3M03 | JK3 |JK4 SW1 | -| | | | -|5218 072D 5218 072D |------------------------| | -| IR3M03 PC910 74HC04 | -| | -|072D 4051 | -| ROM.IC21 |----| | -| M5238 | | | -| ROM.IC26 6264 | | | -| |---------| 74LS05 74HC27 ROM.IC22 | | 12MHz| -| | PCM54HP | 74HC00 6264 | | | -| |---------| |8095| | -| |------| | | | -| | | ROM.IC27 6264 | | | -| 4416 4416 | *2 | | | | -| | | 6264 |----| | -| 4416 4416 | | | -| |------| |-----| | -| |-------| | | | -| ROM.IC13 | | 32.768kHz | *1 | | -| | *3 | 74HC04 | | | -| CN1 CN2 |-------| CN3 CN4 74HC02 74HC00 |-----| CN5| -|----------------------------------------------------------------------| -Notes: (All IC's listed for completeness) - 8095 - Intel C8095-90 16-Bit Microcontroller, Clock Input 12.000MHz (DIP48) - 6264 - Hitachi HM6264ALSP-15 8K x8 SRAM (DIP28) - 4416 - Mitsubishi M5M4416P-12 16K x4 DRAM (DIP18) - PC910 - Sharp PC910 Opto-Isolator (DIP8) - IR3M03 - Sharp IR3M03A (DIP8) - 072D - New Japan Radio Co., Ltd JRC072D Dual J-FET Input Operational Amplifier (DIP8) - 5218 - Mitsubishi 5218 Operational Amplifier (DIP8) - M5238 - Mitsubishi M5238 LCD Display Controller (SIP8) - CN1 - 6 Pin Connector - CN2 - 6 Pin Connector - CN3 - 2 Pin Connector - CN4 - 3 Pin Connector - CN5 - 10 Pin Connector - SW1 - Power On/Off Switch - JK1 - 1/4" Stereo Jack - JK2 - 1/4" Stereo Jack - JK3 - MIDI In, MIDI Out and Midi Thru DIN5 Jacks - JK4 - Mini 1/8th" Power Input Jack - *1 - R15229865 HG61H15B59F (QFP80, stamped 'Roland') - *2 - R15229851 MB87136A LA32 (PGA144?, stamped 'Roland') - *3 - R15229863 HG61H20R36F (QFP100, stamped 'BOSS') - PCM54HP- Burr-Brown PCM54HP 16-Bit Monolithic Digital-to-Analog Converter (DIP28) - & Various logic ICs - 4051, 74HC27, 74HC00, 74HC02, 74HC04, 74LS05 - - ROMs - Filename Device Type - ------------------------------------------------------------------------ - ROM.IC26.106 Mitsubishi M5M27C256 (labeled 1.0.6) read as 27C256 - ROM.IC27.106 Mitsubishi M5M27C256 (labeled 1.0.6) read as 27C256 - ROM.IC13.200 Mitsubishi M5M27C128 (labeled 2.0.0) read as 27C128 - ROM.IC21 Toshiba TC532000P (-7471) read as TC572000 - ROM.IC22 Toshiba TC532000P (-7472) read as TC572000 - - - -Newer version - -PCB Layout ----------- - -MT-32 MAIN BOARD ASSY 79377310 01 -|---------------------------------|------------------------|-----------| -| JK1 JK2 IR3M03 | JK3 |JK4 SW1 | -| | | | -|5218 072D 5218 072D |------------------------| | -| IR3M03 PC910 74HC04 | -| | -|072D 4051 | -| ROM.IC37 |----| | -| M5238 | | | -| ROM.IC26 4364 | | | -| |---------| 74LS05 74HC27 | | 12MHz| -| | PCM54HP | 74HC00 4364 | | | -| |---------| |8095| | -| | | | -| |-----|ROM.IC27 4364 | | | -| 81416 81416 | | | | | -| | *2 | 4364 |----| | -| 81416 81416 | | | -| |-----| |-----| | -| |-------| | | | -| ROM.IC13 | | 32.768kHz | *1 | | -| | *3 | 74HC04 | | | -| CN1 CN2 |-------| CN3 CN4 74HC02 74HC00 |-----| CN5| -|----------------------------------------------------------------------| -Notes: (All IC's listed for completeness) - 8095 - Intel C8095-90 16-Bit Microcontroller, Clock Input 12.000MHz (DIP48) - 4364 - NEC D4364CX-15L 8K x8 SRAM (DIP28) - 81416 - Fujitsu MB81416 16K x4 DRAM (DIP18) - PC910 - Sharp PC910 Opto-Isolator (DIP8) - IR3M03 - Sharp IR3M03A (DIP8) - 072D - New Japan Radio Co., Ltd JRC072D Dual J-FET Input Operational Amplifier (DIP8) - 5218 - Mitsubishi 5218 Operational Amplifier (DIP8) - M5238 - Mitsubishi M5238 LCD Display Controller (SIP8) - CN1 - 6 Pin Connector - CN2 - 6 Pin Connector - CN3 - 2 Pin Connector - CN4 - 3 Pin Connector - CN5 - 10 Pin Connector - SW1 - Power On/Off Switch - JK1 - 1/4" Stereo Jack - JK2 - 1/4" Stereo Jack - JK3 - MIDI In, MIDI Out and Midi Thru DIN5 Jacks - JK4 - Mini 1/8th" Power Input Jack - *1 - R15229865 HG61H15B59F (QFP80, stamped 'Roland') - *2 - R15229896 LA32 (QFP100, stamped 'Roland') - *3 - R15229863 HG61H20R36F (QFP100, stamped 'BOSS') - PCM54HP- Burr-Brown PCM54HP 16-Bit Monolithic Digital-to-Analog Converter (DIP28) - & Various logic ICs - 4051, 74HC27, 74HC00, 74HC02, 74HC04, 74LS05 - - ROMs - Filename Device Type - ---------------------------------------------------- - ROM.IC26 Hitachi HN623258PH26 read as 27C256 - ROM.IC27 Hitachi HN623258PH26 read as 27C256 - ROM.IC13 Hitachi HN623257PC21 read as 27C256 - ROM.IC37 Toshiba TC534000P read as TC574000 -*/ - -#include "emu.h" -#include "cpu/mcs96/i8x9x.h" -#include "machine/ram.h" -#include "machine/timer.h" -#include "video/sed1200.h" -#include "emupal.h" -#include "screen.h" - -static INPUT_PORTS_START( mt32 ) - PORT_START("SC0") - PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("1") PORT_CODE(KEYCODE_1) - PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("2") PORT_CODE(KEYCODE_2) - PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("3") PORT_CODE(KEYCODE_3) - PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Sound group") PORT_CODE(KEYCODE_G) - PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Volume") PORT_CODE(KEYCODE_V) - PORT_BIT(0xe0, IP_ACTIVE_LOW, IPT_UNUSED) - - PORT_START("SC1") - PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("4") PORT_CODE(KEYCODE_4) - PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("5") PORT_CODE(KEYCODE_5) - PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Rhythm") PORT_CODE(KEYCODE_R) - PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Sound") PORT_CODE(KEYCODE_S) - PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Master volume") PORT_CODE(KEYCODE_M) - PORT_BIT(0xe0, IP_ACTIVE_LOW, IPT_UNUSED) - - PORT_START("A7") - PORT_BIT(0x03ff, 0x0000, IPT_DIAL) PORT_NAME("Knob") PORT_SENSITIVITY(50) PORT_KEYDELTA(8) PORT_CODE_DEC(KEYCODE_DOWN) PORT_CODE_INC(KEYCODE_UP) -INPUT_PORTS_END - -class mt32_state : public driver_device -{ -public: - mt32_state(const machine_config &mconfig, device_type type, const char *tag); - - void mt32(machine_config &config); - -protected: - virtual void machine_start() override; - virtual void machine_reset() override; - -private: - required_device cpu; - required_device ram; - optional_device lcd; - required_device midi_timer; - - void mt32_palette(palette_device &palette) const; - - uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); - - DECLARE_WRITE8_MEMBER(bank_w); - DECLARE_WRITE8_MEMBER(so_w); - DECLARE_WRITE16_MEMBER(midi_w); - - DECLARE_READ8_MEMBER(lcd_ctrl_r); - DECLARE_WRITE8_MEMBER(lcd_ctrl_w); - DECLARE_WRITE8_MEMBER(lcd_data_w); - DECLARE_READ16_MEMBER(port0_r); - - TIMER_DEVICE_CALLBACK_MEMBER(midi_timer_cb); - TIMER_DEVICE_CALLBACK_MEMBER(samples_timer_cb); - - void mt32_map(address_map &map); - - uint8_t lcd_data_buffer[256]; - int lcd_data_buffer_pos; - uint8_t midi; - int midi_pos; - uint8_t port0; -}; - -mt32_state::mt32_state(const machine_config &mconfig, device_type type, const char *tag) : - driver_device(mconfig, type, tag), - cpu(*this, "maincpu"), - ram(*this, "ram"), - lcd(*this, "lcd"), - midi_timer(*this, "midi_timer") -{ -} - - -uint32_t mt32_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) -{ - bitmap.fill(0); - const uint8_t *data = lcd->render(); - for(int c=0; c<20; c++) - for(int y=0; y<8; y++) { - uint8_t v = data[c*8+y]; - for(int x=0; x<5; x++) - bitmap.pix16(y == 7 ? 8 : y, c*6+x) = v & (0x10 >> x) ? 1 : 0; - } - return 0; -} - -void mt32_state::machine_start() -{ - membank("bank")->configure_entries(0, 4, memregion("maincpu")->base(), 0x4000); - membank("bank")->configure_entries(0x10, 2, ram->pointer(), 0x4000); // 0x10 doesn't seem used though, but that ram is accessible at c000+ - membank("fixed")->set_base(ram->pointer()); - - lcd_data_buffer_pos = 0; -} - -void mt32_state::machine_reset() -{ - midi_timer->adjust(attotime::from_hz(1)); - midi_pos = 0; - port0 = 0; -} - -WRITE8_MEMBER(mt32_state::lcd_ctrl_w) -{ - lcd->control_w(data); - for(int i=0; i != lcd_data_buffer_pos; i++) - lcd->data_w(lcd_data_buffer[i]); - lcd_data_buffer_pos = 0; -} - -READ8_MEMBER(mt32_state::lcd_ctrl_r) -{ - return lcd->control_r(); -} - -WRITE8_MEMBER(mt32_state::lcd_data_w) -{ - lcd_data_buffer[lcd_data_buffer_pos++] = data; -} - -WRITE8_MEMBER(mt32_state::bank_w) -{ - membank("bank")->set_entry(data); -} - -WRITE16_MEMBER(mt32_state::midi_w) -{ - logerror("midi_out %02x\n", data); - midi = data; -} - -TIMER_DEVICE_CALLBACK_MEMBER(mt32_state::midi_timer_cb) -{ - const static uint8_t midi_data[3] = { 0x91, 0x40, 0x7f }; - midi = midi_data[midi_pos++]; - logerror("midi_in %02x\n", midi); - cpu->serial_w(midi); - if(midi_pos < sizeof(midi_data)) - midi_timer->adjust(attotime::from_hz(1250)); -} - -READ16_MEMBER(mt32_state::port0_r) -{ - return port0; -} - -TIMER_DEVICE_CALLBACK_MEMBER(mt32_state::samples_timer_cb) -{ - port0 ^= 0x10; -} - -WRITE8_MEMBER(mt32_state::so_w) -{ - // bit 0 = led - // bit 1-2 = reverb program a13/a14 - // bit 3-4 = nc - // bit 5 = boss x1 - // bit 6 = lcd cs, also handled internally by the gate array - // bit 7 = lcd clk, also handled internally by the gate array - // logerror("so: x1=%d bank=%d led=%d\n", (data >> 5) & 1, (data >> 1) & 3, data & 1); -} - -void mt32_state::mt32_palette(palette_device &palette) const -{ - palette.set_pen_color(0, rgb_t(0, 0, 0)); - palette.set_pen_color(1, rgb_t(0, 255, 0)); -} - -void mt32_state::mt32_map(address_map &map) -{ - map(0x0100, 0x0100).w(FUNC(mt32_state::bank_w)); - map(0x0200, 0x0200).w(FUNC(mt32_state::so_w)); - map(0x021a, 0x021a).portr("SC0"); - map(0x021c, 0x021c).portr("SC1"); - map(0x0300, 0x0300).w(FUNC(mt32_state::lcd_data_w)); - map(0x0380, 0x0380).rw(FUNC(mt32_state::lcd_ctrl_r), FUNC(mt32_state::lcd_ctrl_w)); - map(0x1000, 0x7fff).rom().region("maincpu", 0x1000); - map(0x8000, 0xbfff).bankrw("bank"); - map(0xc000, 0xffff).bankrw("fixed"); -} - -void mt32_state::mt32(machine_config &config) -{ - i8x9x_device &maincpu(P8098(config, cpu, 12_MHz_XTAL)); - maincpu.set_addrmap(AS_PROGRAM, &mt32_state::mt32_map); - maincpu.ach7_cb().set_ioport("A7"); - maincpu.serial_tx_cb().set(FUNC(mt32_state::midi_w)); - maincpu.in_p0_cb().set(FUNC(mt32_state::port0_r)); - - RAM(config, ram).set_default_size("32K"); - - screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_LCD)); - screen.set_refresh_hz(50); - screen.set_screen_update(FUNC(mt32_state::screen_update)); -// screen.set_size(20*6-1, 9); - screen.set_size(20*6-1, (20*6-1)*3/4); - screen.set_visarea(0, 20*6-2, 0, (20*6-1)*3/4-1); - screen.set_palette("palette"); - - PALETTE(config, "palette", FUNC(mt32_state::mt32_palette), 2); - - SED1200D0A(config, lcd, 0); - - TIMER(config, midi_timer).configure_generic(FUNC(mt32_state::midi_timer_cb)); - - TIMER(config, "samples_timer").configure_periodic(FUNC(mt32_state::samples_timer_cb), attotime::from_hz(32000*2)); -} - -ROM_START( mt32 ) - ROM_REGION( 0x10000, "maincpu", 0 ) - ROM_DEFAULT_BIOS( "107" ) - - ROM_SYSTEM_BIOS( 0, "104", "Firmware 1.0.4" ) - ROMX_LOAD( "mt32_1.0.4.ic27.bin", 0, 0x8000, CRC(a93b65f2) SHA1(9cd4858014c4e8a9dff96053f784bfaac1092a2e), ROM_BIOS(0) | ROM_SKIP(1) ) - ROMX_LOAD( "mt32_1.0.4.ic26.bin", 1, 0x8000, CRC(b5ee2192) SHA1(fe8db469b5bfeb37edb269fd47e3ce6d91014652), ROM_BIOS(0) | ROM_SKIP(1) ) - - ROM_SYSTEM_BIOS( 1, "105", "Firmware 1.0.5" ) - ROMX_LOAD( "mt32_1.0.5.ic27.bin", 0, 0x8000, CRC(3281216c) SHA1(57a09d80d2f7ca5b9734edbe9645e6e700f83701), ROM_BIOS(1) | ROM_SKIP(1) ) - ROMX_LOAD( "mt32_1.0.5.ic26.bin", 1, 0x8000, CRC(e06d8020) SHA1(52e3c6666db9ef962591a8ee99be0cde17f3a6b6), ROM_BIOS(1) | ROM_SKIP(1) ) - - ROM_SYSTEM_BIOS( 2, "106", "Firmware 1.0.6" ) - ROMX_LOAD( "mt32_1.0.6.ic27.bin", 0, 0x8000, CRC(29369ae1) SHA1(cc83bf23cee533097fb4c7e2c116e43b50ebacc8), ROM_BIOS(2) | ROM_SKIP(1) ) - ROMX_LOAD( "mt32_1.0.6.ic26.bin", 1, 0x8000, CRC(4d495d98) SHA1(bf4f15666bc46679579498386704893b630c1171), ROM_BIOS(2) | ROM_SKIP(1) ) - - ROM_SYSTEM_BIOS( 3, "107", "Firmware 1.0.7" ) - ROMX_LOAD( "mt32_1.0.7.ic27.bin", 0, 0x8000, CRC(67fd8968) SHA1(13f06b38f0d9e0fc050b6503ab777bb938603260), ROM_BIOS(3) | ROM_SKIP(1) ) - ROMX_LOAD( "mt32_1.0.7.ic26.bin", 1, 0x8000, CRC(60f45882) SHA1(c55e165487d71fa88bd8c5e9c083bc456c1a89aa), ROM_BIOS(3) | ROM_SKIP(1) ) - - ROM_SYSTEM_BIOS( 4, "br", "Blue Ridge enhanced firmware" ) - ROMX_LOAD( "blue_ridge__mt32b.bin", 1, 0x8000, CRC(5816476f) SHA1(e0934320d7cbb5edfaa29e0d01ae835ef620085b), ROM_BIOS(4) | ROM_SKIP(1) ) - ROMX_LOAD( "blue_ridge__mt32a.bin", 0, 0x8000, CRC(d75fc3d9) SHA1(11a6ae5d8b6ee328b371af7f1e40b82125aa6b4d), ROM_BIOS(4) | ROM_SKIP(1) ) - - ROM_SYSTEM_BIOS( 5, "m9", "M9 enhanced firmware" ) - ROMX_LOAD( "a__m-9.27c256.ic27.bin", 0, 0x8000, CRC(c078ab00) SHA1(381e4208c0211a9a24a3a1b06a36760a1940ea6b), ROM_BIOS(5) | ROM_SKIP(1) ) - ROMX_LOAD( "b__m-9.27c256.ic26.bin", 1, 0x8000, CRC(e9c439c4) SHA1(36fece02eddd84230a7cf32f931c94dd14adbf2c), ROM_BIOS(5) | ROM_SKIP(1) ) - -// We need a bios-like selection for these too - ROM_REGION( 0x80000, "la32", 0 ) - ROM_LOAD16_BYTE( "r15179844.ic21.bin", 0, 0x40000, CRC(dd9deac3) SHA1(3a1e19b0cd4036623fd1d1d11f5f25995585962b) ) - ROM_LOAD16_BYTE( "r15179845.ic22.bin", 1, 0x40000, CRC(4ee6506c) SHA1(2cadb99d21a6a4a6f5b61b6218d16e9b43f61d01) ) - - ROM_LOAD( "r15449121.ic37.bin", 0, 0x80000, CRC(573e31cc) SHA1(f6b1eebc4b2d200ec6d3d21d51325d5b48c60252) ) - - - ROM_REGION( 0x8000, "boss", 0 ) - ROM_LOAD( "r15179857.ic13.bin", 0, 0x8000, CRC(cb219d85) SHA1(c2933cb7ad86e51904aa1c3bc12fa234e73a337f) ) -ROM_END - -ROM_START( cm32l ) - ROM_REGION( 0x10000, "maincpu", 0 ) - ROM_DEFAULT_BIOS( "102" ) - - ROM_SYSTEM_BIOS( 0, "100", "Firmware 1.00" ) - ROMX_LOAD( "lapc-i.v1.0.0.ic3.bin", 0, 0x10000, CRC(ee62022f) SHA1(73683d585cd6948cc19547942ca0e14a0319456d), ROM_BIOS(0) ) - - ROM_SYSTEM_BIOS( 1, "102", "Firmware 1.02" ) - ROMX_LOAD( "cm32l_control.rom", 0, 0x10000, CRC(b998047e) SHA1(a439fbb390da38cada95a7cbb1d6ca199cd66ef8), ROM_BIOS(1) ) - - ROM_REGION( 0x100000, "la32", 0 ) -// We need a bios-like selection for these too - ROM_LOAD( "r15179945.ic8.bin", 0, 0x80000, CRC(8e9ea06e) SHA1(3ad889fde5db5b6437cbc2eb6e305312fec3df93) ) - ROM_LOAD( "r15449121.ic9.bin", 0x80000, 0x80000, CRC(0d81f53c) SHA1(7cc7bf1d1f27b6fc5fbb75c5d6a9458703275b28) ) - - ROM_LOAD( "cm32l_pcm.rom", 0, 0x100000, CRC(04204baa) SHA1(f2a10225b0c191a10fbf068f1320c91b35c1c3f2) ) - - ROM_REGION( 0x8000, "boss", 0 ) - ROM_LOAD( "r15179917.ic19.bin", 0, 0x8000, CRC(236c87a6) SHA1(e1c03905c46e962d1deb15eeed92eb61b42bba4a) ) -ROM_END - -CONS( 1987, mt32, 0, 0, mt32, mt32, mt32_state, empty_init, "Roland", "MT-32", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) -CONS( 1989, cm32l, 0, 0, mt32, mt32, mt32_state, empty_init, "Roland", "CM-32L", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) diff --git a/src/mame/drivers/roland_cm32p.cpp b/src/mame/drivers/roland_cm32p.cpp new file mode 100644 index 00000000000..9f20c4cc7f9 --- /dev/null +++ b/src/mame/drivers/roland_cm32p.cpp @@ -0,0 +1,562 @@ +// license:BSD-3-Clause +// copyright-holders:Valley Bell +/************************************************************************************************* + + Roland CM-32P driver + + Driver by Valley Bell + + Thanks to KitsuWhooa for the PCB layout diagram and part list. + + +Notes: +- When booting, it does a basic check by writing values 0..0xFF to 0x108A. + It then expects (value & 0x03) to be read back from 0x1080 and (value) to be read back from 0x1081/0x1082. + The routine for doing the check begins at 0x4686. + Succeeding means it ends up at 0x4801. +- When in test mode, the firmware gets stuck in the loop at 0xBB06, waiting for Interrupt #5 (calls 0x4014) to fire. + It gets there by calling function 0xBBBB, which writes text (address w@0x40, num characters b@0x43) to the LCD screen. + This can be worked around by setting b@BB2D = 03. +- The firmware gets also stuck in the loop at 0x7D70, waiting for Interrupt #8 (calls 0x4020). + This might be related to finding the best free voice? + You can exit the loop by setting b@7D80 = 00. +- Test Mode shows the results of 4 checks: + 1. SRAM check + 2. MIDI IN/OUT check + 3. PCM ROM and card check + 4. RCC-CPU check + Errors in check 2 and 3 are "not abnormal". + In order to make check 2 pass successfully, you need to connect MIDI Out with MIDI In, creating a loopback. + Check 3 requires the SN-U110-04 PCM card ("Electric Grand & Clavi") to be inserted in order to succeed. +- In order to access the built-in PCM ROM (IC18), the CPU asks the sound chip to read offsets 0x000000 .. 0x07FFFF. + The PCM card is accessed via offsets 0x080000 .. 0x0FFFFF. + The additional PCM ROMs are mapped to 0x100000 .. 0x17FFFF (IC19) and 0x200000 .. 0x27FFFF according to the sample table in IC18. +- The sound chip has 32 voices. Voice 0 is reserved by the firmware for reading data from the PCM ROM. + The firmware allocates voices from back to front, i.e. voice 31 first. + + +TODO: +- actual sound emulation +- add PCM card support + + +PCB Layout +---------- + +PCM BOARD CM-32P ASSY 79554310 00 + +| OUTPUT | PHONES | INPUT (MT-32) | MIDI IN | MIDI THROUGH | DC 9V | +|----------------------------------------------------------------------| +| JK2 JK4 JK3 JKLI JKRI CN4 JK1I JK1T JK5 | +| | +| SW1 | +| || IC2 IC1 | +| IC35 IC33 IC34 || IC31 IC30 CN0 | +| CN3 ||<--IC32 | +| |----| |----| |----| | +| | | | | | | | +| IC22 || IC24 |IC10| |IC9 | | | | +| || IC25 IC4 | | | | | | | +| ||<--IC23 |SRAM| |ROM | | | | +| |----| |----| |IC3 | X1 | +| |----| | | | +| | IC | |------| | | | +| | 17 | | IC16 | IC12 | | | +| |----| |------| X2 |----| | +| |------| IC13 | +| IC6 |----||----||----| | IC15 | | +| |-||-| | || || | |------| IC14 |------| | +| | || | |IC20||IC19||IC18| | IC8 | | +| |-||-| | || || | |------| | +| IC7 |SMPL||SMPL||SMPL| |------------------| | +| |ROM ||ROM ||ROM | | CN5 | | +| |----||----||----| | | CN1 | +|------------------------------|------------------|--------------------| + | | + +Parts: + +(All parts THT unless otherwise noted.) +|-----------------------------------------------------------------------| +| JK1I, JK1T | DIN 5 | +| JK2, JK4, JKRI, JKLI | 1/4 Mono Jack | +| JK3 | 1/4 Stereo Jack | +| JK5 | DC Barrel Jack (Centre Negative) | +| SW1 | SW PCB DPDT | +| IC1 | 74HC04AP | +| IC2 | TLP552 | +| IC3 | P8098 (CPU) | +| IC4 | M51953AL | +| IC6, IC7 | M5M4464AP-12 | +| IC8 | Roland R15239111 / M60012-0141FP (QFP) | +| IC9 | AM27C512-150DC | +| IC10 | TC5564APL-15 | +| IC12 | 74HC00AP | +| IC13 | 74HC02AP | +| IC14 | 74HC32AP | +| IC15 | Roland R15229894 / MB87419 (QFP) | +| IC16 | Roland R15229895 / MB87420 (QFP) | +| IC17 | Roland P15239126 / 23140-007 (QFP) | +| IC18 | Roland R15179970 / MB834000A-20 3B1 | +| IC19 | Roland R15179971 / MB834000A-20 3B2 | +| IC20 | Roland R15179972 / HN62304BPE98 | +| IC22 | PCM56P | +| IC23 | M5238L | +| IC24 | HD14052BP | +| IC25 | NJM2082D | +| IC30, IC31, IC33, IC34, IC35 | NJM4565DD | +| IC32 | M5207L01 | +| CN0 | 7805A | +| CN1 | LED PCB | +| CN3 | Volume Control PCB | +| CN4 | unpopulated | +| CN5 | PCM Card Slot | +| X1 | Crystal 12MHz | +| X2 | Crystal 32.768KHz | +|-----------------------------------------------------------------------| + + +PCM ROM Tables +-------------- +Sample Table (address: 0x00100) +------------ +Pos Len Description +00 02 start offset, bits 0-15 (Little Endian) +02 01 start offset, bits 16-18 (bits 0-2) + PCM card select (bit 3): set for sounds on PCM cards + ROM bank (bits 4-5): + 0 = IC18 + 1 = IC19 + 2 = IC20 + loop mode (bits 6-7): + 0 = normal loop + 1 = no loop + 2 = ping-pong (forwards, backwards, forwards, backwards, ...) +03 02 last sample (sample length = last sample + 1) +05 02 loop length (loop start = sample length - loop length) +07 01 ?? +08 01 reference note (when played back at 32000 Hz) +09 01 ?? +-> 0Ah bytes per entry + +Tone List (address: 0x01000) +--------- +Pos Len Description +00 0A sample name +0A 01 tone type + 00 - single + 01 - dual + 02 - detune + 03 - velocity mix + 04 - velocity switch + 05..07 - invalid + 08..0F/10..17/.../78..7F - same as 00..07 + 80..FF - rhythm? +0B 01 ?? +0C 02 ?? +0E 01 ?? +0F 01 ?? +10 0B some note IDs (padded with FF) +1B 0C sample IDs (always one more than number of note IDs, padded with FF) +27 09 ?? +30 0B some note IDs (padded with FF) +3B 0C sample IDs (always one more than number of note IDs, padded with FF) +47 09 ?? +-> 50h bytes per entry + +Note: Section 30..4F is only used with tone types 01, 03, 04 + + +CM-32P Firmware Work RAM Layout +------------------------------- +2100..22FF - MIDI data receive buffer + +2344..23C1 - Part 1..6 "Patch temporary area" (see manual page 21, 0x15 bytes per partial) +23C4..23D4 - "System area" settings (see manual page 22, master volume, reverb setting, channel assignments) + 23CE-23D3 - Part 1..6 MIDI channel +23D6..25B5 - Part 1..6 instrument data (0x50 bytes per partial, from PCM ROM at 0x1000/0x1050/0x10A0/...) +25B8..2B57 - Part 1..6 sample table data (0xF0 bytes per partial, from PCM ROM at 0x0100/0x010A/0x0114/...) + +34DC..34E1 - Part 1..6 Modulation (CC #1, initialized with 0) +34E2..34E7 - Part 1..6 Pitch Bend LSB (initialized with 0) +34E8..34ED - Part 1..6 Pitch Bend MSB (initialized with 64) +34EE..34F3 - Part 1..6 Expression setting (CC #11, initialized with 100) +34F4..34F9 - Part 1..6 Sustain setting (CC #64, initialized with 0) +34FA..34FF - Part 1..6 unused (initialized with 0) +3500..3505 - Part 1..6 RPN LSB (CC #98, initialized with 0xFF) +3506..350B - Part 1..6 RPN MSB (CC #99, initialized with 0xFF) +350C..3511 - Part 1..6 NRPN received (initialized with 0xFF, set to 0 when RPN LSB/MSB is received, set to 0xFF when NRPN is received) +3512..3517 - Part 1..6 ?? (initialized with 0) +3518..351D - Part 1..6 Instrument setting +351E - Reverb Mode +351F - Reverb Time +3521 - ?? (initialized with 1) +352A..3889 - voice memory (32 bytes per block) + 35AA..35C9 - some jump table index for interrupt #8 +38DE..394D - more voice memory (32 bytes per block) + +397E..3??? - state of playing notes + 3986 - current panning volume, left speaker (00..1F) + 39A6 - current panning volume, right speaker (00..1F) + 39C6 - target panning volume, left speaker (00..1F) + 39E6 - target panning volume, right speaker (00..1F) + +3D7C..3E84 - SysEx receive data buffer + +Some routine locations +---------------------- +0x4014 LCD related interrupt handler +0x401C serial input (MIDI data) interrupt handler +0x4020 some interrupt handler required while playing notes +0x45CB Initialization (memory clear + checks), external memory is checked from 0x4679 on +0x5024 decide whether or not Test Mode is entered (normal boot == jump to 0x502A) +0x50F5 MIDI handling code +0x65E8 PCM ROM instrument check +0x6650 PCM card instrument check (Note: assumes that the SN-U110-04 PCM card is inserted) +0x6EA4 play a note (parameters: 0040 - part, 0041 = note pitch, 0042 - velocity) +0xB027 load instrument data from PCM ROM (writes to 23D6 + 50*i) +0xB12B load instrument sample data from PCM ROM (reads sample IDs from 23D6+1B + 50*i, writes to 25B8 + F0*i) +0xB1A0 load secondary instrument sample data from PCM ROM (reads sample IDs from 23D6+3B + 50h*i, writes to 25B8+50 + F0*i) +0xB1E8 load 1 sample table entry from PCM ROM +0xB316 PCM ROM signature check +0xBBBB write text to LCD + +*/ + +#include "emu.h" +#include "cpu/mcs96/i8x9x.h" +#include "machine/ram.h" +#include "machine/timer.h" +#include "video/msm6222b.h" +#include "emupal.h" +#include "screen.h" + + +// unscramble address: ROM dump offset -> proper (descrambled) offset +#define UNSCRAMBLE_ADDRESS(_offset) \ + bitswap<19>(_offset,18,17,15,14,16,12,11, 7, 9,13,10, 8, 3, 2, 1, 6, 4, 5, 0) +// scramble address: proper offset -> ROM dump offset +#define SCRAMBLE_ADDRESS(_offset) \ + bitswap<19>(_offset,18,17,14,16,15, 9,13,12, 8,10, 7,11, 3, 1, 2, 6, 5, 4, 0) + +#define UNSCRAMBLE_DATA(_data) \ + bitswap<8>(_data,1,2,7,3,5,0,4,6) + + +static INPUT_PORTS_START( cm32p ) + PORT_START("A7") + PORT_BIT(0x03ff, 0x0000, IPT_DIAL) PORT_NAME("Knob") PORT_SENSITIVITY(50) PORT_KEYDELTA(8) PORT_CODE_DEC(KEYCODE_DOWN) PORT_CODE_INC(KEYCODE_UP) + + PORT_START("SERVICE") // connected to Port 0 of the P8098 CPU. + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Test Switch") PORT_TOGGLE PORT_CODE(KEYCODE_F2) // SW A (checked during boot) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Test: Check/Tune") PORT_CODE(KEYCODE_B) // SW B + + PORT_START("SW") // test switches, accessed by reading from address 0x1300 + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Test: MSB Adj.") PORT_CODE(KEYCODE_1) // SW 1 + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Test: THD Check") PORT_CODE(KEYCODE_2) // SW 2 + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Test: PCM Out: String 1") PORT_CODE(KEYCODE_3) // SW 3 + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Test: PCM Out: Sax 1") PORT_CODE(KEYCODE_4) // SW 4 + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Test: PCM + Long Reverb") PORT_CODE(KEYCODE_5) // SW 5 + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Test: PCM + Short Reverb") PORT_CODE(KEYCODE_6) // SW 6 + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Test: VCA Down Check") PORT_CODE(KEYCODE_7) // SW 7 + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Test: VCA Up Check") PORT_CODE(KEYCODE_8) // SW 8 +INPUT_PORTS_END + +class cm32p_state : public driver_device +{ +public: + cm32p_state(const machine_config &mconfig, device_type type, const char *tag); + + void cm32p(machine_config &config); + +protected: + virtual void machine_start() override; + virtual void machine_reset() override; + +private: + required_device cpu; + required_device lcd; + required_device midi_timer; + required_device some_ram; + required_ioport test_sw; + required_ioport service_port; + + void mt32_palette(palette_device &palette) const; + + uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + + DECLARE_WRITE16_MEMBER(midi_w); + + DECLARE_READ8_MEMBER(lcd_ctrl_r); + DECLARE_WRITE8_MEMBER(lcd_ctrl_w); + DECLARE_WRITE8_MEMBER(lcd_data_w); + DECLARE_READ16_MEMBER(port0_r); + DECLARE_READ8_MEMBER(pcmrom_r); + DECLARE_READ8_MEMBER(dsp_io_r); + DECLARE_WRITE8_MEMBER(dsp_io_w); + DECLARE_READ8_MEMBER(snd_io_r); + DECLARE_WRITE8_MEMBER(snd_io_w); + DECLARE_READ8_MEMBER(test_sw_r); + + TIMER_DEVICE_CALLBACK_MEMBER(midi_timer_cb); + TIMER_DEVICE_CALLBACK_MEMBER(samples_timer_cb); + + void cm32p_map(address_map &map); + + u8 midi; + int midi_pos; + u8 port0; + u8 sound_io_buffer[0x100]; + u8 dsp_io_buffer[0x80]; +}; + +cm32p_state::cm32p_state(const machine_config &mconfig, device_type type, const char *tag) + : driver_device(mconfig, type, tag) + , cpu(*this, "maincpu") + , lcd(*this, "lcd") + , midi_timer(*this, "midi_timer") + , some_ram(*this, "some_ram") + , test_sw(*this, "SW") + , service_port(*this, "SERVICE") +{ +} + + +// screen update function from Roland D-110 +uint32_t cm32p_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +{ + uint8_t y,ra,gfx; + uint16_t sy=0,x; + const uint8_t *data = lcd->render(); + bitmap.fill(0); + + for (y = 0; y < 2; y++) + { + for (ra = 0; ra < 9; ra++) + { + uint16_t *p = &bitmap.pix16(sy++); + + for (x = 0; x < 16; x++) + { + gfx = 0; + if (ra < 8) + gfx = data[x*16 + y*640 + ra]; + + *p++ = BIT(gfx, 4); + *p++ = BIT(gfx, 3); + *p++ = BIT(gfx, 2); + *p++ = BIT(gfx, 1); + *p++ = BIT(gfx, 0); + *p++ = 0; + } + } + } + return 0; +} + +void cm32p_state::machine_start() +{ + u8 *rom = memregion("maincpu")->base(); + + // TODO: The IC8 gate array has an "LCD INT" line that needs to be emulated. Then, the hack can be removed. + // Note: The hack is not necessary when *not* using test mode. + rom[0xBB2D] = 0x03; // hack to make test mode not freeze when displaying the LCD text + + // TODO: remove this hack + rom[0x7D80] = 0x00; // hack to exit some loop waiting for interrupt #8 +} + +void cm32p_state::machine_reset() +{ + midi_timer->adjust(attotime::from_hz(1)); + midi_pos = 0; + port0 = 0; +} + +WRITE8_MEMBER(cm32p_state::lcd_ctrl_w) +{ + lcd->control_w(data); +} + +READ8_MEMBER(cm32p_state::lcd_ctrl_r) +{ + // The CM-64 service manual lists "D-110 LCD UNIT" for using PCM test mode, so I assume it works like that. + // However, the CM-32P firmware doesn't seem to ever read the status. + return lcd->control_r() >> 7; +} + +WRITE8_MEMBER(cm32p_state::lcd_data_w) +{ + lcd->data_w(data); +} + +WRITE16_MEMBER(cm32p_state::midi_w) +{ + logerror("midi_out %02x\n", data); + midi = data; +} + +TIMER_DEVICE_CALLBACK_MEMBER(cm32p_state::midi_timer_cb) +{ + const static uint8_t midi_data[3] = { 0x9a, 0x40, 0x7f }; + midi = midi_data[midi_pos++]; + logerror("midi_in %02x\n", midi); + cpu->serial_w(midi); + if(midi_pos < sizeof(midi_data)) + midi_timer->adjust(attotime::from_hz(1250)); +} + +READ16_MEMBER(cm32p_state::port0_r) +{ + return port0 | service_port->read(); +} + +READ8_MEMBER(cm32p_state::pcmrom_r) +{ + offs_t romOfs = SCRAMBLE_ADDRESS(offset); + const u8* pcm_rom = memregion("pcm32")->base(); + return UNSCRAMBLE_DATA(pcm_rom[romOfs]); +} + +READ8_MEMBER(cm32p_state::dsp_io_r) +{ + return dsp_io_buffer[offset]; +} + +WRITE8_MEMBER(cm32p_state::dsp_io_w) +{ + dsp_io_buffer[offset] = data; + // do read/write to some external memory, makes the RCC-CPU check pass. (routine at 0x4679) + switch(offset) + { + case 0x04: + // write to partials?? (written in loop at 0x4375) + break; + case 0x06: + { + u8* ram = some_ram->pointer(); + offs_t ofs = data; + ram[0x000 | ofs] = dsp_io_buffer[0x00] & 0x03; + ram[0x100 | ofs] = dsp_io_buffer[0x01]; + ram[0x200 | ofs] = dsp_io_buffer[0x02]; + } + break; + case 0x0A: + { + const u8* ram = some_ram->pointer(); + offs_t ofs = data; + dsp_io_buffer[0x00] = ram[0x000 | ofs]; + dsp_io_buffer[0x01] = ram[0x100 | ofs]; + dsp_io_buffer[0x02] = ram[0x200 | ofs]; + } + break; + } +} + +READ8_MEMBER(cm32p_state::snd_io_r) +{ + if (offset == 0x01) + { + // code for reading from the PCM sample table is at 0xB027 + // The code at 0xB0AC writes to 1411/1F (??), then 1403/02 (bank), then 1409/08/0B/0A (address). + // It waits a few cycles and at 0xB0F7 it reads the resulting data from 1401. + offs_t bank = sound_io_buffer[0x03]; + offs_t addr = (sound_io_buffer[0x09] << 0) | (sound_io_buffer[0x0A] << 8) | (sound_io_buffer[0x0B] << 16); + addr = ((addr >> 6) + 2) & 0x3FFFF; + addr |= (bank << 16); + // write actual ROM address to 1440..1443 for debugging + sound_io_buffer[0x43] = (addr >> 0) & 0xFF; + sound_io_buffer[0x42] = (addr >> 8) & 0xFF; + sound_io_buffer[0x41] = (addr >> 16) & 0xFF; + sound_io_buffer[0x40] = (addr >> 24) & 0xFF; + return pcmrom_r(space, addr, 0xFF); + } + return sound_io_buffer[offset]; +} + +WRITE8_MEMBER(cm32p_state::snd_io_w) +{ + // register map + // ------------ + // Note: 16-bit words are Little Endian, the firmware writes the odd byte is first + // 00/01 - ?? + // 02/03 - ROM bank (only bits 11-13 are used, bit 11 = PCM card, bits 12-13 select between IC18/19/20) + // 04/05 - frequency (2.14 fixed point, 0x4000 = 32000 Hz) + // 06/07 - volume + // 08/09 - sample start address, fraction (2.14 fixed point, i.e. 1 byte = 0x4000) + // 0A/0B - sample start address (high word, i.e. address bits 2..17) + // 0C/0D - sample end address (high word) + // 0E/0F - sample loop address (high word) + // 11/13/15/17 - voice enable mask (11 = least significant 8 bits, 17 = most significant 8 bits) + // 1A - ?? + // 1F - voice select + sound_io_buffer[offset] = data; +} + +READ8_MEMBER(cm32p_state::test_sw_r) +{ + return test_sw->read(); +} + +TIMER_DEVICE_CALLBACK_MEMBER(cm32p_state::samples_timer_cb) +{ + port0 ^= 0x10; +} + +void cm32p_state::mt32_palette(palette_device &palette) const +{ + palette.set_pen_color(0, rgb_t(0, 0, 0)); + palette.set_pen_color(1, rgb_t(0, 255, 0)); +} + +void cm32p_state::cm32p_map(address_map &map) +{ + map(0x1080, 0x10ff).rw(FUNC(cm32p_state::dsp_io_r), FUNC(cm32p_state::dsp_io_w)); // DSP area (writes to 1080..82/86/8C/8D) + map(0x1100, 0x1100).rw(FUNC(cm32p_state::lcd_ctrl_r), FUNC(cm32p_state::lcd_ctrl_w)); + map(0x1102, 0x1102).w(FUNC(cm32p_state::lcd_data_w)); + map(0x1300, 0x1300).r(FUNC(cm32p_state::test_sw_r)); // test switch state + map(0x1400, 0x14ff).rw(FUNC(cm32p_state::snd_io_r), FUNC(cm32p_state::snd_io_w)); // sound chip area + map(0x2000, 0x20ff).rom().region("maincpu", 0x2000); // init vector @ 2080 + map(0x2100, 0x3fff).ram(); // main RAM + map(0x4000, 0xbfff).rom().region("maincpu", 0x4000); + map(0xc000, 0xffff).r(FUNC(cm32p_state::pcmrom_r)); // show descrambled PCM ROM (for debugging) +} + +void cm32p_state::cm32p(machine_config &config) +{ + i8x9x_device &maincpu(P8098(config, cpu, 12_MHz_XTAL)); + maincpu.set_addrmap(AS_PROGRAM, &cm32p_state::cm32p_map); + maincpu.ach7_cb().set_ioport("A7"); + maincpu.serial_tx_cb().set(FUNC(cm32p_state::midi_w)); + maincpu.in_p0_cb().set(FUNC(cm32p_state::port0_r)); + + RAM(config, some_ram).set_default_size("8K"); + + screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_LCD)); + screen.set_refresh_hz(50); + screen.set_screen_update(FUNC(cm32p_state::screen_update)); + screen.set_size(16*6-1, (16*6-1)*3/4); + screen.set_visarea(0, 16*6-2, 0, (16*6-1)*3/4-1); + screen.set_palette("palette"); + + PALETTE(config, "palette", FUNC(cm32p_state::mt32_palette), 2); + + MSM6222B_01(config, lcd, 0); + + TIMER(config, midi_timer).configure_generic(FUNC(cm32p_state::midi_timer_cb)); + + TIMER(config, "samples_timer").configure_periodic(FUNC(cm32p_state::samples_timer_cb), attotime::from_hz(32000*2)); +} + +ROM_START( cm32p ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "cm-32_p__1.0.0.am27c512.7d.ic9", 0x000000, 0x10000, CRC(6f2f6dfd) SHA1(689f77c1d56f923ef1dab7d993a124c47736bc56) ) // "CM-32 P // 1 0 0 " sticker on an AM27C512-150DC eprom @ IC9 + + ROM_REGION( 0x400000, "pcm32", 0 ) + ROM_LOAD( "roland__r15179970__mb834000a-20__3b1_aa__8917_r00.45f.ic18", 0x000000, 0x80000, CRC(8e53b2a3) SHA1(4872530870d5079776e80e477febe425dc0ec1df) ) // markings under chip footprint are "MB834000A-20P-G-3B1" + // 0x080000 .. 0x0FFFFF is reserved for the PCM card + ROM_LOAD( "roland__r15179971__mb834000a-20__3b2_aa__8919_r02.34f.ic19", 0x100000, 0x80000, CRC(c8220761) SHA1(49e55fa672020f95fd9c858ceaae94d6db93df7d) ) // markings under chip footprint are "MB834000A20P-G-3B2" (including the missing dash, which is a typo on the board silkscreen) + ROM_LOAD( "roland__r15179972__hn62304bpe98__9d1_japan.3f.ic20", 0x200000, 0x80000, CRC(733c4054) SHA1(9b6b59ab74e5bf838702abb087c408aaa85b7b1f) ) // markings under chip footprint are "HN62304BPE98" +ROM_END + +CONS( 1989, cm32p, 0, 0, cm32p, cm32p, cm32p_state, empty_init, "Roland", "CM-32P", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) diff --git a/src/mame/drivers/roland_d110.cpp b/src/mame/drivers/roland_d110.cpp new file mode 100644 index 00000000000..b9a9f62cd9e --- /dev/null +++ b/src/mame/drivers/roland_d110.cpp @@ -0,0 +1,289 @@ +// license:BSD-3-Clause +// copyright-holders:Olivier Galibert, Jonathan Gevaryahu +/************************************************************************************************* + + Roland D-110 driver + + Driver by Olivier Galibert and Jonathan Gevaryahu + + The Roland D-110 is an expander (synthesizer without the keyboard) + from 1988. Internally it's very similar to a mt32, with a better + LCD screen (16x2) and more control buttons. More importantly, it + has more sound rom, a battery-backed ram and a port for memory + cards allowing to load and save new sounds. + + After the first boot, the ram needs to be reinitialized to factory + default values. Press Write/Copy (I) while resetting then + validate with Enter (K). +*/ + +#include "emu.h" +#include "cpu/mcs96/i8x9x.h" +#include "machine/nvram.h" +#include "machine/ram.h" +#include "machine/timer.h" +#include "video/msm6222b.h" +#include "emupal.h" +#include "screen.h" + +static INPUT_PORTS_START( d110 ) + PORT_START("SC0") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Write/Copy") PORT_CODE(KEYCODE_I) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Number +") PORT_CODE(KEYCODE_U) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Bank +") PORT_CODE(KEYCODE_Y) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Group +") PORT_CODE(KEYCODE_T) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Part +") PORT_CODE(KEYCODE_R) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Timbre") PORT_CODE(KEYCODE_E) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Patch") PORT_CODE(KEYCODE_W) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Exit") PORT_CODE(KEYCODE_Q) + + PORT_START("SC1") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Enter") PORT_CODE(KEYCODE_K) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Number -") PORT_CODE(KEYCODE_J) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Bank -") PORT_CODE(KEYCODE_H) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Group -") PORT_CODE(KEYCODE_G) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Part -") PORT_CODE(KEYCODE_F) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("System") PORT_CODE(KEYCODE_D) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Part") PORT_CODE(KEYCODE_S) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Edit") PORT_CODE(KEYCODE_A) +INPUT_PORTS_END + + +class d110_state : public driver_device +{ +public: + d110_state(const machine_config &mconfig, device_type type, const char *tag) + : driver_device(mconfig, type, tag) + , m_ram(*this, "ram") + , m_rams(*this, "rams") + , m_memc(*this, "memc") + , m_memcs(*this, "memcs") + , m_lcd(*this, "lcd") + , m_midi_timer(*this, "midi_timer") + , m_maincpu(*this, "maincpu") + { } + + void d110(machine_config &config); + +protected: + virtual void machine_start() override; + virtual void machine_reset() override; + +private: + DECLARE_WRITE8_MEMBER(bank_w); + DECLARE_WRITE8_MEMBER(so_w); + DECLARE_WRITE16_MEMBER(midi_w); + DECLARE_READ8_MEMBER(lcd_ctrl_r); + DECLARE_WRITE8_MEMBER(lcd_ctrl_w); + DECLARE_WRITE8_MEMBER(lcd_data_w); + DECLARE_READ16_MEMBER(port0_r); + TIMER_DEVICE_CALLBACK_MEMBER(midi_timer_cb); + TIMER_DEVICE_CALLBACK_MEMBER(samples_timer_cb); + void d110_palette(palette_device &palette) const; + uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + + void d110_map(address_map &map); + + uint8_t m_lcd_data_buffer[256]; + int m_lcd_data_buffer_pos; + uint8_t m_midi; + int m_midi_pos; + uint8_t m_port0; + required_device m_ram; + required_device m_rams; + required_device m_memc; + required_device m_memcs; + required_device m_lcd; + required_device m_midi_timer; + required_device m_maincpu; +}; + + +uint32_t d110_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +{ + uint8_t y,ra,gfx; + uint16_t sy=0,x; + const uint8_t *data = m_lcd->render(); + bitmap.fill(0); + + for (y = 0; y < 2; y++) + { + for (ra = 0; ra < 9; ra++) + { + uint16_t *p = &bitmap.pix16(sy++); + + for (x = 0; x < 16; x++) + { + gfx = 0; + if (ra < 8) + gfx = data[x*16 + y*640 + ra]; + + *p++ = BIT(gfx, 4); + *p++ = BIT(gfx, 3); + *p++ = BIT(gfx, 2); + *p++ = BIT(gfx, 1); + *p++ = BIT(gfx, 0); + *p++ = 0; + } + } + } + return 0; +} + +void d110_state::machine_start() +{ + m_rams->set_base(m_ram->pointer(), 32768); + m_memcs->set_base(m_memc->pointer(), 32768); + + membank("bank")->configure_entries(0x00, 4, memregion("maincpu")->base(), 0x4000); + membank("bank")->configure_entries(0x10, 2, m_ram->pointer(), 0x4000); + membank("bank")->configure_entries(0x20, 8, memregion("presets")->base(), 0x4000); + membank("bank")->configure_entries(0x30, 2, m_memc->pointer(), 0x4000); + membank("fixed")->set_base(m_ram->pointer()); + + m_lcd_data_buffer_pos = 0; +} + +void d110_state::machine_reset() +{ + // midi_timer->adjust(attotime::from_hz(1)); + m_midi_pos = 0; + m_port0 = 0x80; // battery ok +} + +WRITE8_MEMBER(d110_state::lcd_ctrl_w) +{ + m_lcd->control_w(data); + for(int i=0; i != m_lcd_data_buffer_pos; i++) + m_lcd->data_w(m_lcd_data_buffer[i]); + m_lcd_data_buffer_pos = 0; +} + +READ8_MEMBER(d110_state::lcd_ctrl_r) +{ + // Busy flag in the msm622b is bit 7, while the software expects it in bit 0... + return m_lcd->control_r() >> 7; +} + +WRITE8_MEMBER(d110_state::lcd_data_w) +{ + if(m_lcd_data_buffer_pos == sizeof(m_lcd_data_buffer)) { + logerror("Warning: lcd data buffer overflow (%04x)\n", m_maincpu->pc()); + return; + } + m_lcd_data_buffer[m_lcd_data_buffer_pos++] = data; +} + +WRITE8_MEMBER(d110_state::bank_w) +{ + membank("bank")->set_entry(data); +} + +WRITE16_MEMBER(d110_state::midi_w) +{ + logerror("midi_out %02x\n", data); + m_midi = data; +} + +TIMER_DEVICE_CALLBACK_MEMBER(d110_state::midi_timer_cb) +{ + const static uint8_t midi_data[3] = { 0x91, 0x40, 0x7f }; + m_midi = midi_data[m_midi_pos++]; + logerror("midi_in %02x\n", m_midi); + m_maincpu->serial_w(m_midi); + if(m_midi_pos < sizeof(midi_data)) + m_midi_timer->adjust(attotime::from_hz(1250)); +} + +READ16_MEMBER(d110_state::port0_r) +{ + return m_port0; +} + +TIMER_DEVICE_CALLBACK_MEMBER(d110_state::samples_timer_cb) +{ + m_port0 ^= 0x10; +} + +WRITE8_MEMBER(d110_state::so_w) +{ + // bit 0 = led + // bit 1-2 = reverb program a13/a14 + // bit 3 = R. SW. to ananlog board + // bit 5 = boss 8Mhz clock, handled internally + // logerror("so: rw=%d bank=%d led=%d\n", (data >> 3) & 1, (data >> 1) & 3, data & 1); +} + +void d110_state::d110_palette(palette_device &palette) const +{ + palette.set_pen_color(0, rgb_t(0, 255, 0)); + palette.set_pen_color(1, rgb_t(0, 0, 0)); +} + +void d110_state::d110_map(address_map &map) +{ + map(0x0100, 0x0100).w(FUNC(d110_state::bank_w)); + map(0x0200, 0x0200).w(FUNC(d110_state::so_w)); + map(0x021a, 0x021a).portr("SC0").nopw(); + map(0x021c, 0x021c).portr("SC1"); + map(0x0300, 0x0300).w(FUNC(d110_state::lcd_data_w)); + map(0x0380, 0x0380).rw(FUNC(d110_state::lcd_ctrl_r), FUNC(d110_state::lcd_ctrl_w)); + map(0x1000, 0x7fff).rom().region("maincpu", 0x1000); + map(0x8000, 0xbfff).bankrw("bank"); + map(0xc000, 0xffff).bankrw("fixed"); +} + +void d110_state::d110(machine_config &config) +{ + P8098(config, m_maincpu, 12_MHz_XTAL); + m_maincpu->set_addrmap(AS_PROGRAM, &d110_state::d110_map); + m_maincpu->serial_tx_cb().set(FUNC(d110_state::midi_w)); + m_maincpu->in_p0_cb().set(FUNC(d110_state::port0_r)); + +// Battery-backed main ram + RAM( config, "ram" ).set_default_size( "32K" ); + NVRAM(config, m_rams, nvram_device::DEFAULT_ALL_0); + +// Shall become a proper memcard device someday + RAM( config, m_memc ).set_default_size( "32K" ); + NVRAM( config, m_memcs, nvram_device::DEFAULT_ALL_0 ); + + screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_LCD)); + screen.set_refresh_hz(50); + screen.set_screen_update(FUNC(d110_state::screen_update)); +// screen.set_size(20*6-1, 2*9-1); + screen.set_size(16*6-1, (16*6-1)*3/4); + screen.set_visarea(0, 16*6-2, 0, (16*6-1)*3/4-1); + screen.set_palette("palette"); + + PALETTE(config, "palette", FUNC(d110_state::d110_palette), 2); + + MSM6222B_01(config, m_lcd, 0); + + TIMER(config, m_midi_timer).configure_generic(FUNC(d110_state::midi_timer_cb)); + + TIMER(config, "samples_timer").configure_periodic(FUNC(d110_state::samples_timer_cb), attotime::from_hz(32000*2) ); +} + +ROM_START( d110 ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_DEFAULT_BIOS( "110" ) + + ROM_SYSTEM_BIOS( 0, "106", "Firmware 1.06" ) + ROMX_LOAD( "d-110.v1.06.ic19.bin", 0, 0x8000, CRC(3dd5b6e9) SHA1(73b155fb0a8adc2362e73cb0803dafba9ccfb508), ROM_BIOS(0) ) + + ROM_SYSTEM_BIOS( 1, "110", "Firmware 1.10" ) + ROMX_LOAD( "d-110.v1.10.ic19.bin", 0, 0x8000, CRC(3ae68187) SHA1(28635510f30d6c1fb88e00da03e5b4e045c380cb), ROM_BIOS(1) ) + + ROM_REGION( 0x20000, "presets", 0 ) + ROM_LOAD( "r15179873-lh5310-97.ic12.bin", 0, 0x20000, CRC(580a8f9e) SHA1(05587a0542b01625dcde37de5bb339880e47eb93) ) + + ROM_REGION( 0x100000, "la32", 0 ) + ROM_LOAD( "r15179878.ic7.bin", 0, 0x80000, CRC(e117e6ab) SHA1(6760d14900161b8715c2bfd4ebe997877087c90c) ) + ROM_LOAD( "r15179880.ic8.bin", 0x80000, 0x80000, CRC(b329f945) SHA1(9c59f50518a070461b2ec6cb4e43ee7cc1e905b6) ) + + ROM_REGION( 0x8000, "boss", 0 ) + ROM_LOAD( "r15179879.ic6.bin", 0, 0x8000, CRC(5d34174e) SHA1(17bd2887711c5c5458aba6d3be5972b2096eb450) ) +ROM_END + +CONS( 1988, d110, 0, 0, d110, d110, d110_state, empty_init, "Roland", "D110", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) diff --git a/src/mame/drivers/roland_mt32.cpp b/src/mame/drivers/roland_mt32.cpp new file mode 100644 index 00000000000..2f6c0be316f --- /dev/null +++ b/src/mame/drivers/roland_mt32.cpp @@ -0,0 +1,441 @@ +// license:BSD-3-Clause +// copyright-holders:Olivier Galibert,Jonathan Gevaryahu +/************************************************************************************************* + + Roland MT-32/CM32L driver + + Driver by Olivier Galibert and Jonathan Gevaryahu + + The Roland MT32 is an expander (synthesizer without the keyboard) + from 1987. It had a small 20-char LCD display and 10 control + buttons (part 1-5, rhythm, sound/sound group, volume/master + volume), a rotating knob and a midi message led. It uses a weird + kind of synthesis called "Linear Additive". + + The CM32L versions is a simpler/smaller version without the lcd, + buttons or knob but keeping the led. It also has a different + firmware and more partials rom, adding "game sounds". "CM" means + "Computer Music". + + The LAPC-I (I as in Intel) is a ISA board variant of the CM32L + with a MPU-401 frontend added to communicate with the synth. All + the roms are identical with the CM32L. + + Some special tricks: + - pressing 3+V (Part 3 + Volume) at boot time starts the test mode + + - predding 4+R+M (Part 4 + Rhythm + Master Volume) at boot time + shows the firmware version + + - the CM32L drives the lcd as if it was there and looks at the + buttons at boot time for test mode and firmware version + + + +Roland MT-32 rev00 pcb (early 1.0.7 and all earlier firmware, with ic26 and ic27 socketed): + +PCB Layout +---------- + +MT-32 MAIN BOARD ASSY 79377310 00 +|---------------------------------|------------------------|-----------| +| JK1 JK2 IR3M03 | JK3 |JK4 SW1 | +| | | | +|5218 072D 5218 072D |------------------------| | +| IR3M03 PC910 74HC04 | +| | +|072D 4051 | +| ROM.IC21 |----| | +| M5238 | | | +| ROM.IC26 6264 | | | +| |---------| 74LS05 74HC27 ROM.IC22 | | 12MHz| +| | PCM54HP | 74HC00 6264 | | | +| |---------| |8095| | +| |------| | | | +| | | ROM.IC27 6264 | | | +| 4416 4416 | *2 | | | | +| | | 6264 |----| | +| 4416 4416 | | | +| |------| |-----| | +| |-------| | | | +| ROM.IC13 | | 32.768kHz | *1 | | +| | *3 | 74HC04 | | | +| CN1 CN2 |-------| CN3 CN4 74HC02 74HC00 |-----| CN5| +|----------------------------------------------------------------------| +Notes: (All IC's listed for completeness) + 8095 - Intel C8095-90 16-Bit Microcontroller, Clock Input 12.000MHz (DIP48) + 6264 - Hitachi HM6264ALSP-15 8K x8 SRAM (DIP28) + 4416 - Mitsubishi M5M4416P-12 16K x4 DRAM (DIP18) + PC910 - Sharp PC910 Opto-Isolator (DIP8) + IR3M03 - Sharp IR3M03A (DIP8) + 072D - New Japan Radio Co., Ltd JRC072D Dual J-FET Input Operational Amplifier (DIP8) + 5218 - Mitsubishi 5218 Operational Amplifier (DIP8) + M5238 - Mitsubishi M5238 LCD Display Controller (SIP8) + CN1 - 6 Pin Connector + CN2 - 6 Pin Connector + CN3 - 2 Pin Connector + CN4 - 3 Pin Connector + CN5 - 10 Pin Connector + SW1 - Power On/Off Switch + JK1 - 1/4" Stereo Jack + JK2 - 1/4" Stereo Jack + JK3 - MIDI In, MIDI Out and Midi Thru DIN5 Jacks + JK4 - Mini 1/8th" Power Input Jack + *1 - R15229865 HG61H15B59F (QFP80, stamped 'Roland') + *2 - R15229851 MB87136A LA32 (PGA144?, stamped 'Roland') + *3 - R15229863 HG61H20R36F (QFP100, stamped 'BOSS') + PCM54HP- Burr-Brown PCM54HP 16-Bit Monolithic Digital-to-Analog Converter (DIP28) + & Various logic ICs - 4051, 74HC27, 74HC00, 74HC02, 74HC04, 74LS05 + + ROMs - Filename Device Type + ------------------------------------------------------------------------ + ROM.IC26.106 Mitsubishi M5M27C256 (labeled 1.0.6) read as 27C256 + ROM.IC27.106 Mitsubishi M5M27C256 (labeled 1.0.6) read as 27C256 + ROM.IC13.200 Mitsubishi M5M27C128 (labeled 2.0.0) read as 27C128 + ROM.IC21 Toshiba TC532000P (-7471) read as TC572000 + ROM.IC22 Toshiba TC532000P (-7472) read as TC572000 + + + +Newer version + +PCB Layout +---------- + +MT-32 MAIN BOARD ASSY 79377310 01 +|---------------------------------|------------------------|-----------| +| JK1 JK2 IR3M03 | JK3 |JK4 SW1 | +| | | | +|5218 072D 5218 072D |------------------------| | +| IR3M03 PC910 74HC04 | +| | +|072D 4051 | +| ROM.IC37 |----| | +| M5238 | | | +| ROM.IC26 4364 | | | +| |---------| 74LS05 74HC27 | | 12MHz| +| | PCM54HP | 74HC00 4364 | | | +| |---------| |8095| | +| | | | +| |-----|ROM.IC27 4364 | | | +| 81416 81416 | | | | | +| | *2 | 4364 |----| | +| 81416 81416 | | | +| |-----| |-----| | +| |-------| | | | +| ROM.IC13 | | 32.768kHz | *1 | | +| | *3 | 74HC04 | | | +| CN1 CN2 |-------| CN3 CN4 74HC02 74HC00 |-----| CN5| +|----------------------------------------------------------------------| +Notes: (All IC's listed for completeness) + 8095 - Intel C8095-90 16-Bit Microcontroller, Clock Input 12.000MHz (DIP48) + 4364 - NEC D4364CX-15L 8K x8 SRAM (DIP28) + 81416 - Fujitsu MB81416 16K x4 DRAM (DIP18) + PC910 - Sharp PC910 Opto-Isolator (DIP8) + IR3M03 - Sharp IR3M03A (DIP8) + 072D - New Japan Radio Co., Ltd JRC072D Dual J-FET Input Operational Amplifier (DIP8) + 5218 - Mitsubishi 5218 Operational Amplifier (DIP8) + M5238 - Mitsubishi M5238 LCD Display Controller (SIP8) + CN1 - 6 Pin Connector + CN2 - 6 Pin Connector + CN3 - 2 Pin Connector + CN4 - 3 Pin Connector + CN5 - 10 Pin Connector + SW1 - Power On/Off Switch + JK1 - 1/4" Stereo Jack + JK2 - 1/4" Stereo Jack + JK3 - MIDI In, MIDI Out and Midi Thru DIN5 Jacks + JK4 - Mini 1/8th" Power Input Jack + *1 - R15229865 HG61H15B59F (QFP80, stamped 'Roland') + *2 - R15229896 LA32 (QFP100, stamped 'Roland') + *3 - R15229863 HG61H20R36F (QFP100, stamped 'BOSS') + PCM54HP- Burr-Brown PCM54HP 16-Bit Monolithic Digital-to-Analog Converter (DIP28) + & Various logic ICs - 4051, 74HC27, 74HC00, 74HC02, 74HC04, 74LS05 + + ROMs - Filename Device Type + ---------------------------------------------------- + ROM.IC26 Hitachi HN623258PH26 read as 27C256 + ROM.IC27 Hitachi HN623258PH26 read as 27C256 + ROM.IC13 Hitachi HN623257PC21 read as 27C256 + ROM.IC37 Toshiba TC534000P read as TC574000 +*/ + +#include "emu.h" +#include "cpu/mcs96/i8x9x.h" +#include "machine/ram.h" +#include "machine/timer.h" +#include "video/sed1200.h" +#include "emupal.h" +#include "screen.h" + +static INPUT_PORTS_START( mt32 ) + PORT_START("SC0") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("1") PORT_CODE(KEYCODE_1) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("2") PORT_CODE(KEYCODE_2) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("3") PORT_CODE(KEYCODE_3) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Sound group") PORT_CODE(KEYCODE_G) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Volume") PORT_CODE(KEYCODE_V) + PORT_BIT(0xe0, IP_ACTIVE_LOW, IPT_UNUSED) + + PORT_START("SC1") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("4") PORT_CODE(KEYCODE_4) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("5") PORT_CODE(KEYCODE_5) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Rhythm") PORT_CODE(KEYCODE_R) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Sound") PORT_CODE(KEYCODE_S) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Master volume") PORT_CODE(KEYCODE_M) + PORT_BIT(0xe0, IP_ACTIVE_LOW, IPT_UNUSED) + + PORT_START("A7") + PORT_BIT(0x03ff, 0x0000, IPT_DIAL) PORT_NAME("Knob") PORT_SENSITIVITY(50) PORT_KEYDELTA(8) PORT_CODE_DEC(KEYCODE_DOWN) PORT_CODE_INC(KEYCODE_UP) +INPUT_PORTS_END + +class mt32_state : public driver_device +{ +public: + mt32_state(const machine_config &mconfig, device_type type, const char *tag); + + void mt32(machine_config &config); + +protected: + virtual void machine_start() override; + virtual void machine_reset() override; + +private: + required_device cpu; + required_device ram; + optional_device lcd; + required_device midi_timer; + + void mt32_palette(palette_device &palette) const; + + uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + + DECLARE_WRITE8_MEMBER(bank_w); + DECLARE_WRITE8_MEMBER(so_w); + DECLARE_WRITE16_MEMBER(midi_w); + + DECLARE_READ8_MEMBER(lcd_ctrl_r); + DECLARE_WRITE8_MEMBER(lcd_ctrl_w); + DECLARE_WRITE8_MEMBER(lcd_data_w); + DECLARE_READ16_MEMBER(port0_r); + + TIMER_DEVICE_CALLBACK_MEMBER(midi_timer_cb); + TIMER_DEVICE_CALLBACK_MEMBER(samples_timer_cb); + + void mt32_map(address_map &map); + + uint8_t lcd_data_buffer[256]; + int lcd_data_buffer_pos; + uint8_t midi; + int midi_pos; + uint8_t port0; +}; + +mt32_state::mt32_state(const machine_config &mconfig, device_type type, const char *tag) : + driver_device(mconfig, type, tag), + cpu(*this, "maincpu"), + ram(*this, "ram"), + lcd(*this, "lcd"), + midi_timer(*this, "midi_timer") +{ +} + + +uint32_t mt32_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +{ + bitmap.fill(0); + const uint8_t *data = lcd->render(); + for(int c=0; c<20; c++) + for(int y=0; y<8; y++) { + uint8_t v = data[c*8+y]; + for(int x=0; x<5; x++) + bitmap.pix16(y == 7 ? 8 : y, c*6+x) = v & (0x10 >> x) ? 1 : 0; + } + return 0; +} + +void mt32_state::machine_start() +{ + membank("bank")->configure_entries(0, 4, memregion("maincpu")->base(), 0x4000); + membank("bank")->configure_entries(0x10, 2, ram->pointer(), 0x4000); // 0x10 doesn't seem used though, but that ram is accessible at c000+ + membank("fixed")->set_base(ram->pointer()); + + lcd_data_buffer_pos = 0; +} + +void mt32_state::machine_reset() +{ + midi_timer->adjust(attotime::from_hz(1)); + midi_pos = 0; + port0 = 0; +} + +WRITE8_MEMBER(mt32_state::lcd_ctrl_w) +{ + lcd->control_w(data); + for(int i=0; i != lcd_data_buffer_pos; i++) + lcd->data_w(lcd_data_buffer[i]); + lcd_data_buffer_pos = 0; +} + +READ8_MEMBER(mt32_state::lcd_ctrl_r) +{ + return lcd->control_r(); +} + +WRITE8_MEMBER(mt32_state::lcd_data_w) +{ + lcd_data_buffer[lcd_data_buffer_pos++] = data; +} + +WRITE8_MEMBER(mt32_state::bank_w) +{ + membank("bank")->set_entry(data); +} + +WRITE16_MEMBER(mt32_state::midi_w) +{ + logerror("midi_out %02x\n", data); + midi = data; +} + +TIMER_DEVICE_CALLBACK_MEMBER(mt32_state::midi_timer_cb) +{ + const static uint8_t midi_data[3] = { 0x91, 0x40, 0x7f }; + midi = midi_data[midi_pos++]; + logerror("midi_in %02x\n", midi); + cpu->serial_w(midi); + if(midi_pos < sizeof(midi_data)) + midi_timer->adjust(attotime::from_hz(1250)); +} + +READ16_MEMBER(mt32_state::port0_r) +{ + return port0; +} + +TIMER_DEVICE_CALLBACK_MEMBER(mt32_state::samples_timer_cb) +{ + port0 ^= 0x10; +} + +WRITE8_MEMBER(mt32_state::so_w) +{ + // bit 0 = led + // bit 1-2 = reverb program a13/a14 + // bit 3-4 = nc + // bit 5 = boss x1 + // bit 6 = lcd cs, also handled internally by the gate array + // bit 7 = lcd clk, also handled internally by the gate array + // logerror("so: x1=%d bank=%d led=%d\n", (data >> 5) & 1, (data >> 1) & 3, data & 1); +} + +void mt32_state::mt32_palette(palette_device &palette) const +{ + palette.set_pen_color(0, rgb_t(0, 0, 0)); + palette.set_pen_color(1, rgb_t(0, 255, 0)); +} + +void mt32_state::mt32_map(address_map &map) +{ + map(0x0100, 0x0100).w(FUNC(mt32_state::bank_w)); + map(0x0200, 0x0200).w(FUNC(mt32_state::so_w)); + map(0x021a, 0x021a).portr("SC0"); + map(0x021c, 0x021c).portr("SC1"); + map(0x0300, 0x0300).w(FUNC(mt32_state::lcd_data_w)); + map(0x0380, 0x0380).rw(FUNC(mt32_state::lcd_ctrl_r), FUNC(mt32_state::lcd_ctrl_w)); + map(0x1000, 0x7fff).rom().region("maincpu", 0x1000); + map(0x8000, 0xbfff).bankrw("bank"); + map(0xc000, 0xffff).bankrw("fixed"); +} + +void mt32_state::mt32(machine_config &config) +{ + i8x9x_device &maincpu(P8098(config, cpu, 12_MHz_XTAL)); + maincpu.set_addrmap(AS_PROGRAM, &mt32_state::mt32_map); + maincpu.ach7_cb().set_ioport("A7"); + maincpu.serial_tx_cb().set(FUNC(mt32_state::midi_w)); + maincpu.in_p0_cb().set(FUNC(mt32_state::port0_r)); + + RAM(config, ram).set_default_size("32K"); + + screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_LCD)); + screen.set_refresh_hz(50); + screen.set_screen_update(FUNC(mt32_state::screen_update)); +// screen.set_size(20*6-1, 9); + screen.set_size(20*6-1, (20*6-1)*3/4); + screen.set_visarea(0, 20*6-2, 0, (20*6-1)*3/4-1); + screen.set_palette("palette"); + + PALETTE(config, "palette", FUNC(mt32_state::mt32_palette), 2); + + SED1200D0A(config, lcd, 0); + + TIMER(config, midi_timer).configure_generic(FUNC(mt32_state::midi_timer_cb)); + + TIMER(config, "samples_timer").configure_periodic(FUNC(mt32_state::samples_timer_cb), attotime::from_hz(32000*2)); +} + +ROM_START( mt32 ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_DEFAULT_BIOS( "107" ) + + ROM_SYSTEM_BIOS( 0, "104", "Firmware 1.0.4" ) + ROMX_LOAD( "mt32_1.0.4.ic27.bin", 0, 0x8000, CRC(a93b65f2) SHA1(9cd4858014c4e8a9dff96053f784bfaac1092a2e), ROM_BIOS(0) | ROM_SKIP(1) ) + ROMX_LOAD( "mt32_1.0.4.ic26.bin", 1, 0x8000, CRC(b5ee2192) SHA1(fe8db469b5bfeb37edb269fd47e3ce6d91014652), ROM_BIOS(0) | ROM_SKIP(1) ) + + ROM_SYSTEM_BIOS( 1, "105", "Firmware 1.0.5" ) + ROMX_LOAD( "mt32_1.0.5.ic27.bin", 0, 0x8000, CRC(3281216c) SHA1(57a09d80d2f7ca5b9734edbe9645e6e700f83701), ROM_BIOS(1) | ROM_SKIP(1) ) + ROMX_LOAD( "mt32_1.0.5.ic26.bin", 1, 0x8000, CRC(e06d8020) SHA1(52e3c6666db9ef962591a8ee99be0cde17f3a6b6), ROM_BIOS(1) | ROM_SKIP(1) ) + + ROM_SYSTEM_BIOS( 2, "106", "Firmware 1.0.6" ) + ROMX_LOAD( "mt32_1.0.6.ic27.bin", 0, 0x8000, CRC(29369ae1) SHA1(cc83bf23cee533097fb4c7e2c116e43b50ebacc8), ROM_BIOS(2) | ROM_SKIP(1) ) + ROMX_LOAD( "mt32_1.0.6.ic26.bin", 1, 0x8000, CRC(4d495d98) SHA1(bf4f15666bc46679579498386704893b630c1171), ROM_BIOS(2) | ROM_SKIP(1) ) + + ROM_SYSTEM_BIOS( 3, "107", "Firmware 1.0.7" ) + ROMX_LOAD( "mt32_1.0.7.ic27.bin", 0, 0x8000, CRC(67fd8968) SHA1(13f06b38f0d9e0fc050b6503ab777bb938603260), ROM_BIOS(3) | ROM_SKIP(1) ) + ROMX_LOAD( "mt32_1.0.7.ic26.bin", 1, 0x8000, CRC(60f45882) SHA1(c55e165487d71fa88bd8c5e9c083bc456c1a89aa), ROM_BIOS(3) | ROM_SKIP(1) ) + + ROM_SYSTEM_BIOS( 4, "br", "Blue Ridge enhanced firmware" ) + ROMX_LOAD( "blue_ridge__mt32b.bin", 1, 0x8000, CRC(5816476f) SHA1(e0934320d7cbb5edfaa29e0d01ae835ef620085b), ROM_BIOS(4) | ROM_SKIP(1) ) + ROMX_LOAD( "blue_ridge__mt32a.bin", 0, 0x8000, CRC(d75fc3d9) SHA1(11a6ae5d8b6ee328b371af7f1e40b82125aa6b4d), ROM_BIOS(4) | ROM_SKIP(1) ) + + ROM_SYSTEM_BIOS( 5, "m9", "M9 enhanced firmware" ) + ROMX_LOAD( "a__m-9.27c256.ic27.bin", 0, 0x8000, CRC(c078ab00) SHA1(381e4208c0211a9a24a3a1b06a36760a1940ea6b), ROM_BIOS(5) | ROM_SKIP(1) ) + ROMX_LOAD( "b__m-9.27c256.ic26.bin", 1, 0x8000, CRC(e9c439c4) SHA1(36fece02eddd84230a7cf32f931c94dd14adbf2c), ROM_BIOS(5) | ROM_SKIP(1) ) + +// We need a bios-like selection for these too + ROM_REGION( 0x80000, "la32", 0 ) + ROM_LOAD16_BYTE( "r15179844.ic21.bin", 0, 0x40000, CRC(dd9deac3) SHA1(3a1e19b0cd4036623fd1d1d11f5f25995585962b) ) + ROM_LOAD16_BYTE( "r15179845.ic22.bin", 1, 0x40000, CRC(4ee6506c) SHA1(2cadb99d21a6a4a6f5b61b6218d16e9b43f61d01) ) + + ROM_LOAD( "r15449121.ic37.bin", 0, 0x80000, CRC(573e31cc) SHA1(f6b1eebc4b2d200ec6d3d21d51325d5b48c60252) ) + + + ROM_REGION( 0x8000, "boss", 0 ) + ROM_LOAD( "r15179857.ic13.bin", 0, 0x8000, CRC(cb219d85) SHA1(c2933cb7ad86e51904aa1c3bc12fa234e73a337f) ) +ROM_END + +ROM_START( cm32l ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_DEFAULT_BIOS( "102" ) + + ROM_SYSTEM_BIOS( 0, "100", "Firmware 1.00" ) + ROMX_LOAD( "lapc-i.v1.0.0.ic3.bin", 0, 0x10000, CRC(ee62022f) SHA1(73683d585cd6948cc19547942ca0e14a0319456d), ROM_BIOS(0) ) + + ROM_SYSTEM_BIOS( 1, "102", "Firmware 1.02" ) + ROMX_LOAD( "cm32l_control.rom", 0, 0x10000, CRC(b998047e) SHA1(a439fbb390da38cada95a7cbb1d6ca199cd66ef8), ROM_BIOS(1) ) + + ROM_REGION( 0x100000, "la32", 0 ) +// We need a bios-like selection for these too + ROM_LOAD( "r15179945.ic8.bin", 0, 0x80000, CRC(8e9ea06e) SHA1(3ad889fde5db5b6437cbc2eb6e305312fec3df93) ) + ROM_LOAD( "r15449121.ic9.bin", 0x80000, 0x80000, CRC(0d81f53c) SHA1(7cc7bf1d1f27b6fc5fbb75c5d6a9458703275b28) ) + + ROM_LOAD( "cm32l_pcm.rom", 0, 0x100000, CRC(04204baa) SHA1(f2a10225b0c191a10fbf068f1320c91b35c1c3f2) ) + + ROM_REGION( 0x8000, "boss", 0 ) + ROM_LOAD( "r15179917.ic19.bin", 0, 0x8000, CRC(236c87a6) SHA1(e1c03905c46e962d1deb15eeed92eb61b42bba4a) ) +ROM_END + +CONS( 1987, mt32, 0, 0, mt32, mt32, mt32_state, empty_init, "Roland", "MT-32", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) +CONS( 1989, cm32l, 0, 0, mt32, mt32, mt32_state, empty_init, "Roland", "CM-32L", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) diff --git a/src/mame/drivers/roland_sc55.cpp b/src/mame/drivers/roland_sc55.cpp new file mode 100644 index 00000000000..0616c32b744 --- /dev/null +++ b/src/mame/drivers/roland_sc55.cpp @@ -0,0 +1,86 @@ +// license:BSD-3-Clause +// copyright-holders:R. Belmont +/************************************************************************************************* + + Roland Sound Canvas SC-55 + + Skeleton by R. Belmont + + Reference and LCD photo: http://www.synthman.com/roland/Roland_SC-55.html + http://en.wikipedia.org/wiki/Roland_SCC-1 + + The Roland SC55 is an expander (synthesizer without the keyboard) + from 1991. It has 24 voice polyphony, is 16 part multitimbral, and + outputs 16-bit stereo samples at 32 kHz. The synthesis engine uses a + combination of Roland's LA and straight PCM playback. + + The front panel includes the power switch, a headphone jack with volume knob, + a second MIDI IN port, a large LCD, ALL and MUTE buttons, and a group of up/down + buttons for Part, Level, Reverb, Key Shift, Instrument, Pan, Chorus, and MIDI Channel. + + The SCC-1 is an ISA board variant of the SC55 with a MPU-401 frontend added to + communicate with the synth. + + Main PCB: + + 20.0 MHz crystal + Roland R15239147 HG62E11B23FS 1L1 Japan + Roland R15199778 6435328A97F 1M1 R Japan - Hitachi H8/532 MCU with internal ROM (Hitachi p/n HD6435328A97F) + Roland R15239148 24201F002 9148EAI Japan + Roland R15209363 LH532H6D 9152 D + R15239176 BU3910F + HM62256ALFP-12T 32K by 8-bit RAM + 65256BLFP-12T 32K by 8-bit high-speed pseudo-static RAM + MB89251A - Serial data transceiver + + LCD controller (on front panel board) is a Toshiba T7934. +*/ + +#include "emu.h" +#include "machine/ram.h" +#include "cpu/mcs96/i8x9x.h" + +static INPUT_PORTS_START( sc55 ) +INPUT_PORTS_END + +class sc55_state : public driver_device +{ +public: + sc55_state(const machine_config &mconfig, device_type type, const char *tag); + + void sc55(machine_config &config); + +private: + required_device m_maincpu; + + void sc55_map(address_map &map); +}; + +sc55_state::sc55_state(const machine_config &mconfig, device_type type, const char *tag) : + driver_device(mconfig, type, tag), + m_maincpu(*this, "maincpu") +{ +} + +void sc55_state::sc55_map(address_map &map) +{ + map(0x1000, 0x3fff).rom().region("maincpu", 0x1000); +} + +void sc55_state::sc55(machine_config &config) +{ + P8098(config, m_maincpu, XTAL(20'000'000)); // probably not? + m_maincpu->set_addrmap(AS_PROGRAM, &sc55_state::sc55_map); +} + +ROM_START( sc55 ) + ROM_REGION( 0x40000, "maincpu", 0 ) // additional H8/532 code and patch data - revisions match main CPU revisions + ROM_LOAD( "roland_r15209363.ic23", 0x000000, 0x040000, CRC(2dc58549) SHA1(9c17f85e784dc1549ac1f98d457b353393331f6b) ) + + ROM_REGION( 0x300000, "la", 0 ) + ROM_LOAD( "roland-gss.a_r15209276.ic28", 0x000000, 0x100000, CRC(1ac774d3) SHA1(8cc3c0d7ec0993df81d4ca1970e01a4b0d8d3775) ) + ROM_LOAD( "roland-gss.b_r15209277.ic27", 0x100000, 0x100000, CRC(8dcc592a) SHA1(80e6eb130c18c09955551563f78906163c55cc11) ) + ROM_LOAD( "roland-gss.c_r15209281.ic26", 0x200000, 0x100000, CRC(e21ebc04) SHA1(7454b817778179806f3f9d1985b3a2ef67ace76f) ) +ROM_END + +CONS( 1991, sc55, 0, 0, sc55, sc55, sc55_state, empty_init, "Roland", "Sound Canvas SC-55", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) diff --git a/src/mame/drivers/rsc55.cpp b/src/mame/drivers/rsc55.cpp deleted file mode 100644 index 0616c32b744..00000000000 --- a/src/mame/drivers/rsc55.cpp +++ /dev/null @@ -1,86 +0,0 @@ -// license:BSD-3-Clause -// copyright-holders:R. Belmont -/************************************************************************************************* - - Roland Sound Canvas SC-55 - - Skeleton by R. Belmont - - Reference and LCD photo: http://www.synthman.com/roland/Roland_SC-55.html - http://en.wikipedia.org/wiki/Roland_SCC-1 - - The Roland SC55 is an expander (synthesizer without the keyboard) - from 1991. It has 24 voice polyphony, is 16 part multitimbral, and - outputs 16-bit stereo samples at 32 kHz. The synthesis engine uses a - combination of Roland's LA and straight PCM playback. - - The front panel includes the power switch, a headphone jack with volume knob, - a second MIDI IN port, a large LCD, ALL and MUTE buttons, and a group of up/down - buttons for Part, Level, Reverb, Key Shift, Instrument, Pan, Chorus, and MIDI Channel. - - The SCC-1 is an ISA board variant of the SC55 with a MPU-401 frontend added to - communicate with the synth. - - Main PCB: - - 20.0 MHz crystal - Roland R15239147 HG62E11B23FS 1L1 Japan - Roland R15199778 6435328A97F 1M1 R Japan - Hitachi H8/532 MCU with internal ROM (Hitachi p/n HD6435328A97F) - Roland R15239148 24201F002 9148EAI Japan - Roland R15209363 LH532H6D 9152 D - R15239176 BU3910F - HM62256ALFP-12T 32K by 8-bit RAM - 65256BLFP-12T 32K by 8-bit high-speed pseudo-static RAM - MB89251A - Serial data transceiver - - LCD controller (on front panel board) is a Toshiba T7934. -*/ - -#include "emu.h" -#include "machine/ram.h" -#include "cpu/mcs96/i8x9x.h" - -static INPUT_PORTS_START( sc55 ) -INPUT_PORTS_END - -class sc55_state : public driver_device -{ -public: - sc55_state(const machine_config &mconfig, device_type type, const char *tag); - - void sc55(machine_config &config); - -private: - required_device m_maincpu; - - void sc55_map(address_map &map); -}; - -sc55_state::sc55_state(const machine_config &mconfig, device_type type, const char *tag) : - driver_device(mconfig, type, tag), - m_maincpu(*this, "maincpu") -{ -} - -void sc55_state::sc55_map(address_map &map) -{ - map(0x1000, 0x3fff).rom().region("maincpu", 0x1000); -} - -void sc55_state::sc55(machine_config &config) -{ - P8098(config, m_maincpu, XTAL(20'000'000)); // probably not? - m_maincpu->set_addrmap(AS_PROGRAM, &sc55_state::sc55_map); -} - -ROM_START( sc55 ) - ROM_REGION( 0x40000, "maincpu", 0 ) // additional H8/532 code and patch data - revisions match main CPU revisions - ROM_LOAD( "roland_r15209363.ic23", 0x000000, 0x040000, CRC(2dc58549) SHA1(9c17f85e784dc1549ac1f98d457b353393331f6b) ) - - ROM_REGION( 0x300000, "la", 0 ) - ROM_LOAD( "roland-gss.a_r15209276.ic28", 0x000000, 0x100000, CRC(1ac774d3) SHA1(8cc3c0d7ec0993df81d4ca1970e01a4b0d8d3775) ) - ROM_LOAD( "roland-gss.b_r15209277.ic27", 0x100000, 0x100000, CRC(8dcc592a) SHA1(80e6eb130c18c09955551563f78906163c55cc11) ) - ROM_LOAD( "roland-gss.c_r15209281.ic26", 0x200000, 0x100000, CRC(e21ebc04) SHA1(7454b817778179806f3f9d1985b3a2ef67ace76f) ) -ROM_END - -CONS( 1991, sc55, 0, 0, sc55, sc55, sc55_state, empty_init, "Roland", "Sound Canvas SC-55", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 722b504f6a4..e9b22b5c3ef 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -34342,9 +34342,6 @@ rcorsair // (c) 1984 Nakasawa @source:rd100.cpp rd100 // -@source:rd110.cpp -d110 // - @source:re900.cpp bs94 // (c) 1994 Entretenimientos GEMINIS re900 // (c) 1993 Entretenimientos GEMINIS @@ -34434,13 +34431,6 @@ themj // (c) 1987 Visco @source:rmnimbus.cpp nimbus // RM Nimbus 186 -@source:rmt32.cpp -cm32l // -mt32 // - -@source:rcm32p.cpp -cm32p // - @source:rockrage.cpp rockrage // GX620 (c) 1986 (World?) rockragea // GX620 (c) 1986 (Prototype?) @@ -34467,6 +34457,19 @@ wizdfireu // MAS (c) 1992 Data East Corporation (US) wolffang // MAM (c) 1991 Data East Corporation (Japan) hangzo +@source:roland_cm32p.cpp +cm32p // + +@source:roland_d110.cpp +d110 // + +@source:roland_mt32.cpp +cm32l // +mt32 // + +@source:roland_sc55.cpp +sc55 // 1991 Sound Canvas SC-55 + @source:rollerg.cpp rollerg // GX999 (c) 1991 (US) rollergj // GX999 (c) 1991 (Japan) @@ -34563,9 +34566,6 @@ svolleybl // bootleg svolleyk // (c) 1989 V-System Co. (Korea) svolleyu // (c) 1989 V-System Co. + Data East license (US) -@source:rsc55.cpp -sc55 // 1991 Sound Canvas SC-55 - @source:rt1715.cpp rt1715 // rt1715lc // (latin/cyrillic) diff --git a/src/mame/mess.flt b/src/mame/mess.flt index c834077f2a3..1770bfb5909 100644 --- a/src/mame/mess.flt +++ b/src/mame/mess.flt @@ -731,17 +731,17 @@ rambo.cpp ravens.cpp rc702.cpp rc759.cpp -rcm32p.cpp rd100.cpp -rd110.cpp regence.cpp replicator.cpp rex6000.cpp riscpc.cpp rm380z.cpp rmnimbus.cpp -rmt32.cpp -rsc55.cpp +roland_cm32p.cpp +roland_d110.cpp +roland_mt32.cpp +roland_sc55.cpp rt1715.cpp rvoice.cpp rx78.cpp -- cgit v1.2.3