From 2050f2a6a20d065d0f6eb6de08e97fcef8d81d01 Mon Sep 17 00:00:00 2001 From: Vas Crabb Date: Sun, 9 Jul 2017 13:38:32 +1000 Subject: clean up inlines (nw) --- src/osd/eigccx86.h | 293 +++++++++++++++++++++++++---------------------------- src/osd/eivc.h | 21 ++-- src/osd/eminline.h | 83 ++++++++------- 3 files changed, 193 insertions(+), 204 deletions(-) diff --git a/src/osd/eigccx86.h b/src/osd/eigccx86.h index 249aedfc704..363daba5f5f 100644 --- a/src/osd/eigccx86.h +++ b/src/osd/eigccx86.h @@ -9,16 +9,16 @@ ***************************************************************************/ -#ifndef __EIGCCX86__ -#define __EIGCCX86__ +#ifndef MAME_OSD_EIGCCX86_H +#define MAME_OSD_EIGCCX86_H -/* Include MMX/SSE intrinsics headers */ +// Include MMX/SSE intrinsics headers #ifdef __SSE2__ #include -#include /* MMX */ -#include /* SSE */ -#include /* SSE2 */ +#include // MMX +#include // SSE +#include // SSE2 #endif @@ -26,14 +26,6 @@ INLINE MATH FUNCTIONS ***************************************************************************/ -union _x86_union -{ - uint64_t u64; - struct { - uint32_t l, h; - } u32; -}; - /*------------------------------------------------- mul_32x32 - perform a signed 32 bit x 32 bit multiply and return the full 64 bit result @@ -41,19 +33,17 @@ union _x86_union #ifndef __x86_64__ #define mul_32x32 _mul_32x32 -static inline int64_t ATTR_CONST ATTR_FORCE_INLINE +inline int64_t ATTR_CONST ATTR_FORCE_INLINE _mul_32x32(int32_t a, int32_t b) { int64_t result; - __asm__ ( " imull %[b] ;" - : [result] "=A" (result) /* result in edx:eax */ - : [a] "%a" (a) /* 'a' should also be in eax on entry */ - , [b] "rm" (b) /* 'b' can be memory or register */ - : "cc" /* Clobbers condition codes */ + : [result] "=A" (result) // result in edx:eax + : [a] "%a" (a) // 'a' should also be in eax on entry + , [b] "rm" (b) // 'b' can be memory or register + : "cc" // Clobbers condition codes ); - return result; } #endif @@ -67,19 +57,17 @@ _mul_32x32(int32_t a, int32_t b) #ifndef __x86_64__ #define mulu_32x32 _mulu_32x32 -static inline uint64_t ATTR_CONST ATTR_FORCE_INLINE +inline uint64_t ATTR_CONST ATTR_FORCE_INLINE _mulu_32x32(uint32_t a, uint32_t b) { uint64_t result; - __asm__ ( " mull %[b] ;" - : [result] "=A" (result) /* result in edx:eax */ - : [a] "%a" (a) /* 'a' should also be in eax on entry */ - , [b] "rm" (b) /* 'b' can be memory or register */ - : "cc" /* Clobbers condition codes */ + : [result] "=A" (result) // result in edx:eax + : [a] "%a" (a) // 'a' should also be in eax on entry + , [b] "rm" (b) // 'b' can be memory or register + : "cc" // Clobbers condition codes ); - return result; } #endif @@ -92,20 +80,18 @@ _mulu_32x32(uint32_t a, uint32_t b) -------------------------------------------------*/ #define mul_32x32_hi _mul_32x32_hi -static inline int32_t ATTR_CONST ATTR_FORCE_INLINE +inline int32_t ATTR_CONST ATTR_FORCE_INLINE _mul_32x32_hi(int32_t a, int32_t b) { int32_t result, temp; - __asm__ ( " imull %[b] ;" - : [result] "=d" (result) /* result in edx */ - , [temp] "=a" (temp) /* This is effectively a clobber */ - : [a] "a" (a) /* 'a' should be in eax on entry */ - , [b] "rm" (b) /* 'b' can be memory or register */ - : "cc" /* Clobbers condition codes */ + : [result] "=d" (result) // result in edx + , [temp] "=a" (temp) // This is effectively a clobber + : [a] "a" (a) // 'a' should be in eax on entry + , [b] "rm" (b) // 'b' can be memory or register + : "cc" // Clobbers condition codes ); - return result; } @@ -117,20 +103,18 @@ _mul_32x32_hi(int32_t a, int32_t b) -------------------------------------------------*/ #define mulu_32x32_hi _mulu_32x32_hi -static inline uint32_t ATTR_CONST ATTR_FORCE_INLINE +inline uint32_t ATTR_CONST ATTR_FORCE_INLINE _mulu_32x32_hi(uint32_t a, uint32_t b) { uint32_t result, temp; - __asm__ ( " mull %[b] ;" - : [result] "=d" (result) /* result in edx */ - , [temp] "=a" (temp) /* This is effectively a clobber */ - : [a] "a" (a) /* 'a' should be in eax on entry */ - , [b] "rm" (b) /* 'b' can be memory or register */ - : "cc" /* Clobbers condition codes */ + : [result] "=d" (result) // result in edx + , [temp] "=a" (temp) // This is effectively a clobber + : [a] "a" (a) // 'a' should be in eax on entry + , [b] "rm" (b) // 'b' can be memory or register + : "cc" // Clobbers condition codes ); - return result; } @@ -144,20 +128,20 @@ _mulu_32x32_hi(uint32_t a, uint32_t b) #ifndef __x86_64__ #define mul_32x32_shift _mul_32x32_shift -static inline int32_t ATTR_CONST ATTR_FORCE_INLINE +inline int32_t ATTR_CONST ATTR_FORCE_INLINE _mul_32x32_shift(int32_t a, int32_t b, uint8_t shift) { int32_t result; - /* Valid for (0 <= shift <= 31) */ + // Valid for (0 <= shift <= 31) __asm__ ( " imull %[b] ;" " shrdl %[shift], %%edx, %[result] ;" - : [result] "=a" (result) /* result ends up in eax */ - : [a] "%0" (a) /* 'a' should also be in eax on entry */ - , [b] "rm" (b) /* 'b' can be memory or register */ - , [shift] "Ic" (shift) /* 'shift' must be constant in 0-31 range or in cl */ - : "%edx", "cc" /* clobbers edx and condition codes */ + : [result] "=a" (result) // result ends up in eax + : [a] "%0" (a) // 'a' should also be in eax on entry + , [b] "rm" (b) // 'b' can be memory or register + , [shift] "Ic" (shift) // 'shift' must be constant in 0-31 range or in cl + : "%edx", "cc" // clobbers edx and condition codes ); return result; @@ -174,20 +158,20 @@ _mul_32x32_shift(int32_t a, int32_t b, uint8_t shift) #ifndef __x86_64__ #define mulu_32x32_shift _mulu_32x32_shift -static inline uint32_t ATTR_CONST ATTR_FORCE_INLINE +inline uint32_t ATTR_CONST ATTR_FORCE_INLINE _mulu_32x32_shift(uint32_t a, uint32_t b, uint8_t shift) { uint32_t result; - /* Valid for (0 <= shift <= 31) */ + // Valid for (0 <= shift <= 31) __asm__ ( " mull %[b] ;" " shrdl %[shift], %%edx, %[result] ;" - : [result] "=a" (result) /* result ends up in eax */ - : [a] "%0" (a) /* 'a' should also be in eax on entry */ - , [b] "rm" (b) /* 'b' can be memory or register */ - , [shift] "Ic" (shift) /* 'shift' must be constant in 0-31 range or in cl */ - : "%edx", "cc" /* clobbers edx and condition codes */ + : [result] "=a" (result) // result ends up in eax + : [a] "%0" (a) // 'a' should also be in eax on entry + , [b] "rm" (b) // 'b' can be memory or register + , [shift] "Ic" (shift) // 'shift' must be constant in 0-31 range or in cl + : "%edx", "cc" // clobbers edx and condition codes ); return result; @@ -202,19 +186,19 @@ _mulu_32x32_shift(uint32_t a, uint32_t b, uint8_t shift) #ifndef __x86_64__ #define div_64x32 _div_64x32 -static inline int32_t ATTR_CONST ATTR_FORCE_INLINE +inline int32_t ATTR_CONST ATTR_FORCE_INLINE _div_64x32(int64_t a, int32_t b) { int32_t result, temp; - /* Throws arithmetic exception if result doesn't fit in 32 bits */ + // Throws arithmetic exception if result doesn't fit in 32 bits __asm__ ( " idivl %[b] ;" - : [result] "=a" (result) /* Result ends up in eax */ - , [temp] "=d" (temp) /* This is effectively a clobber */ - : [a] "A" (a) /* 'a' in edx:eax */ - , [b] "rm" (b) /* 'b' in register or memory */ - : "cc" /* Clobbers condition codes */ + : [result] "=a" (result) // result ends up in eax + , [temp] "=d" (temp) // this is effectively a clobber + : [a] "A" (a) // 'a' in edx:eax + , [b] "rm" (b) // 'b' in register or memory + : "cc" // clobbers condition codes ); return result; @@ -229,19 +213,19 @@ _div_64x32(int64_t a, int32_t b) #ifndef __x86_64__ #define divu_64x32 _divu_64x32 -static inline uint32_t ATTR_CONST ATTR_FORCE_INLINE +inline uint32_t ATTR_CONST ATTR_FORCE_INLINE _divu_64x32(uint64_t a, uint32_t b) { uint32_t result, temp; - /* Throws arithmetic exception if result doesn't fit in 32 bits */ + // Throws arithmetic exception if result doesn't fit in 32 bits __asm__ ( " divl %[b] ;" - : [result] "=a" (result) /* Result ends up in eax */ - , [temp] "=d" (temp) /* This is effectively a clobber */ - : [a] "A" (a) /* 'a' in edx:eax */ - , [b] "rm" (b) /* 'b' in register or memory */ - : "cc" /* Clobbers condition codes */ + : [result] "=a" (result) // result ends up in eax + , [temp] "=d" (temp) // this is effectively a clobber + : [a] "A" (a) // 'a' in edx:eax + , [b] "rm" (b) // 'b' in register or memory + : "cc" // clobbers condition codes ); return result; @@ -255,26 +239,41 @@ _divu_64x32(uint64_t a, uint32_t b) 32 bit remainder -------------------------------------------------*/ -#ifndef __x86_64__ #define div_64x32_rem _div_64x32_rem -static inline int32_t ATTR_FORCE_INLINE +inline int32_t ATTR_FORCE_INLINE _div_64x32_rem(int64_t dividend, int32_t divisor, int32_t *remainder) { int32_t quotient; +#ifndef __x86_64__ + + // Throws arithmetic exception if result doesn't fit in 32 bits + __asm__ ( + " idivl %[divisor] ;" + : [result] "=a" (quotient) // quotient ends up in eax + , [remainder] "=d" (*remainder) // remainder ends up in edx + : [dividend] "A" (dividend) // 'dividend' in edx:eax + , [divisor] "rm" (divisor) // 'divisor' in register or memory + : "cc" // clobbers condition codes + ); + +#else + int32_t const divh{ int32_t(uint32_t(uint64_t(dividend) >> 32)) }; + int32_t const divl{ int32_t(uint32_t(uint64_t(dividend))) }; - /* Throws arithmetic exception if result doesn't fit in 32 bits */ + // Throws arithmetic exception if result doesn't fit in 32 bits __asm__ ( " idivl %[divisor] ;" - : [result] "=a" (quotient) /* Quotient ends up in eax */ - , [remainder] "=d" (*remainder) /* Remainder ends up in edx */ - : [dividend] "A" (dividend) /* 'dividend' in edx:eax */ - , [divisor] "rm" (divisor) /* 'divisor' in register or memory */ - : "cc" /* Clobbers condition codes */ + : [result] "=a" (quotient) // quotient ends up in eax + , [remainder] "=d" (*remainder) // remainder ends up in edx + : [divl] "a" (divl) // 'dividend' in edx:eax + , [divh] "d" (divh) + , [divisor] "rm" (divisor) // 'divisor' in register or memory + : "cc" // clobbers condition codes ); +#endif return quotient; } -#endif /*------------------------------------------------- @@ -283,49 +282,41 @@ _div_64x32_rem(int64_t dividend, int32_t divisor, int32_t *remainder) and 32 bit remainder -------------------------------------------------*/ -#ifndef __x86_64__ #define divu_64x32_rem _divu_64x32_rem -static inline uint32_t ATTR_FORCE_INLINE +inline uint32_t ATTR_FORCE_INLINE _divu_64x32_rem(uint64_t dividend, uint32_t divisor, uint32_t *remainder) { uint32_t quotient; +#ifndef __x86_64__ - /* Throws arithmetic exception if result doesn't fit in 32 bits */ + // Throws arithmetic exception if result doesn't fit in 32 bits __asm__ ( " divl %[divisor] ;" - : [result] "=a" (quotient) /* Quotient ends up in eax */ - , [remainder] "=d" (*remainder) /* Remainder ends up in edx */ - : [dividend] "A" (dividend) /* 'dividend' in edx:eax */ - , [divisor] "rm" (divisor) /* 'divisor' in register or memory */ - : "cc" /* Clobbers condition codes */ + : [result] "=a" (quotient) // quotient ends up in eax + , [remainder] "=d" (*remainder) // remainder ends up in edx + : [dividend] "A" (dividend) // 'dividend' in edx:eax + , [divisor] "rm" (divisor) // 'divisor' in register or memory + : "cc" // clobbers condition codes ); - return quotient; -} #else -#define divu_64x32_rem _divu_64x32_rem -static inline uint32_t ATTR_FORCE_INLINE -_divu_64x32_rem(uint64_t dividend, uint32_t divisor, uint32_t *remainder) -{ - uint32_t quotient; - _x86_union r; - - r.u64 = dividend; + uint32_t const divh{ uint32_t(dividend >> 32) }; + uint32_t const divl{ uint32_t(dividend) }; - /* Throws arithmetic exception if result doesn't fit in 32 bits */ + // Throws arithmetic exception if result doesn't fit in 32 bits __asm__ ( " divl %[divisor] ;" - : [result] "=a" (quotient) /* Quotient ends up in eax */ - , [remainder] "=d" (*remainder) /* Remainder ends up in edx */ - : [divl] "a" (r.u32.l) /* 'dividend' in edx:eax */ - , [divh] "d" (r.u32.h) - , [divisor] "rm" (divisor) /* 'divisor' in register or memory */ - : "cc" /* Clobbers condition codes */ + : [result] "=a" (quotient) // quotient ends up in eax + , [remainder] "=d" (*remainder) // remainder ends up in edx + : [divl] "a" (divl) // 'dividend' in edx:eax + , [divh] "d" (divh) + , [divisor] "rm" (divisor) // 'divisor' in register or memory + : "cc" // clobbers condition codes ); +#endif return quotient; } -#endif /*------------------------------------------------- @@ -336,23 +327,23 @@ _divu_64x32_rem(uint64_t dividend, uint32_t divisor, uint32_t *remainder) #ifndef __x86_64__ #define div_32x32_shift _div_32x32_shift -static inline int32_t ATTR_CONST ATTR_FORCE_INLINE +inline int32_t ATTR_CONST ATTR_FORCE_INLINE _div_32x32_shift(int32_t a, int32_t b, uint8_t shift) { int32_t result; - /* Valid for (0 <= shift <= 31) */ - /* Throws arithmetic exception if result doesn't fit in 32 bits */ + // Valid for (0 <= shift <= 31) + // Throws arithmetic exception if result doesn't fit in 32 bits __asm__ ( " cdq ;" " shldl %[shift], %[a], %%edx ;" " shll %[shift], %[a] ;" " idivl %[b] ;" - : [result] "=&a" (result) /* result ends up in eax */ - : [a] "0" (a) /* 'a' should also be in eax on entry */ - , [b] "rm" (b) /* 'b' can be memory or register */ - , [shift] "Ic" (shift) /* 'shift' must be constant in 0-31 range or in cl */ - : "%edx", "cc" /* clobbers edx and condition codes */ + : [result] "=&a" (result) // result ends up in eax + : [a] "0" (a) // 'a' should also be in eax on entry + , [b] "rm" (b) // 'b' can be memory or register + , [shift] "Ic" (shift) // 'shift' must be constant in 0-31 range or in cl + : "%edx", "cc" // clobbers edx and condition codes ); return result; @@ -368,23 +359,23 @@ _div_32x32_shift(int32_t a, int32_t b, uint8_t shift) #ifndef __x86_64__ #define divu_32x32_shift _divu_32x32_shift -static inline uint32_t ATTR_CONST ATTR_FORCE_INLINE +inline uint32_t ATTR_CONST ATTR_FORCE_INLINE _divu_32x32_shift(uint32_t a, uint32_t b, uint8_t shift) { int32_t result; - /* Valid for (0 <= shift <= 31) */ - /* Throws arithmetic exception if result doesn't fit in 32 bits */ + // Valid for (0 <= shift <= 31) + // Throws arithmetic exception if result doesn't fit in 32 bits __asm__ ( " clr %%edx ;" " shldl %[shift], %[a], %%edx ;" " shll %[shift], %[a] ;" " divl %[b] ;" - : [result] "=&a" (result) /* result ends up in eax */ - : [a] "0" (a) /* 'a' should also be in eax on entry */ - , [b] "rm" (b) /* 'b' can be memory or register */ - , [shift] "Ic" (shift) /* 'shift' must be constant in 0-31 range or in cl */ - : "%edx", "cc" /* clobbers edx and condition codes */ + : [result] "=&a" (result) // result ends up in eax + : [a] "0" (a) // 'a' should also be in eax on entry + , [b] "rm" (b) // 'b' can be memory or register + , [shift] "Ic" (shift) // 'shift' must be constant in 0-31 range or in cl + : "%edx", "cc" // clobbers edx and condition codes ); return result; @@ -399,19 +390,19 @@ _divu_32x32_shift(uint32_t a, uint32_t b, uint8_t shift) #ifndef __x86_64__ #define mod_64x32 _mod_64x32 -static inline int32_t ATTR_CONST ATTR_FORCE_INLINE +inline int32_t ATTR_CONST ATTR_FORCE_INLINE _mod_64x32(int64_t a, int32_t b) { int32_t result, temp; - /* Throws arithmetic exception if quotient doesn't fit in 32 bits */ + // Throws arithmetic exception if quotient doesn't fit in 32 bits __asm__ ( " idivl %[b] ;" - : [result] "=d" (result) /* Result ends up in edx */ - , [temp] "=a" (temp) /* This is effectively a clobber */ - : [a] "A" (a) /* 'a' in edx:eax */ - , [b] "rm" (b) /* 'b' in register or memory */ - : "cc" /* Clobbers condition codes */ + : [result] "=d" (result) // Result ends up in edx + , [temp] "=a" (temp) // This is effectively a clobber + : [a] "A" (a) // 'a' in edx:eax + , [b] "rm" (b) // 'b' in register or memory + : "cc" // Clobbers condition codes ); return result; @@ -426,19 +417,19 @@ _mod_64x32(int64_t a, int32_t b) #ifndef __x86_64__ #define modu_64x32 _modu_64x32 -static inline uint32_t ATTR_CONST ATTR_FORCE_INLINE +inline uint32_t ATTR_CONST ATTR_FORCE_INLINE _modu_64x32(uint64_t a, uint32_t b) { uint32_t result, temp; - /* Throws arithmetic exception if quotient doesn't fit in 32 bits */ + // Throws arithmetic exception if quotient doesn't fit in 32 bits __asm__ ( " divl %[b] ;" - : [result] "=d" (result) /* Result ends up in edx */ - , [temp] "=a" (temp) /* This is effectively a clobber */ - : [a] "A" (a) /* 'a' in edx:eax */ - , [b] "rm" (b) /* 'b' in register or memory */ - : "cc" /* Clobbers condition codes */ + : [result] "=d" (result) // Result ends up in edx + , [temp] "=a" (temp) // This is effectively a clobber + : [a] "A" (a) // 'a' in edx:eax + , [b] "rm" (b) // 'b' in register or memory + : "cc" // Clobbers condition codes ); return result; @@ -453,11 +444,11 @@ _modu_64x32(uint64_t a, uint32_t b) #ifdef __SSE2__ #define recip_approx _recip_approx -static inline float ATTR_CONST +inline float ATTR_CONST _recip_approx(float value) { - __m128 value_xmm = _mm_set_ss(value); - __m128 result_xmm = _mm_rcp_ss(value_xmm); + __m128 const value_xmm = _mm_set_ss(value); + __m128 const result_xmm = _mm_rcp_ss(value_xmm); float result; _mm_store_ss(&result, result_xmm); return result; @@ -476,21 +467,19 @@ _recip_approx(float value) -------------------------------------------------*/ #define count_leading_zeros _count_leading_zeros -static inline uint8_t ATTR_CONST ATTR_FORCE_INLINE +inline uint8_t ATTR_CONST ATTR_FORCE_INLINE _count_leading_zeros(uint32_t value) { uint32_t result; - __asm__ ( " bsrl %[value], %[result] ;" " jnz 1f ;" " movl $63, %[result] ;" "1: xorl $31, %[result] ;" - : [result] "=r" (result) /* result can be in any register */ - : [value] "rm" (value) /* 'value' can be register or memory */ - : "cc" /* clobbers condition codes */ + : [result] "=r" (result) // result can be in any register + : [value] "rm" (value) // 'value' can be register or memory + : "cc" // clobbers condition codes ); - return result; } @@ -501,11 +490,10 @@ _count_leading_zeros(uint32_t value) -------------------------------------------------*/ #define count_leading_ones _count_leading_ones -static inline uint8_t ATTR_CONST ATTR_FORCE_INLINE +inline uint8_t ATTR_CONST ATTR_FORCE_INLINE _count_leading_ones(uint32_t value) { uint32_t result; - __asm__ ( " movl %[value], %[result] ;" " notl %[result] ;" @@ -513,12 +501,11 @@ _count_leading_ones(uint32_t value) " jnz 1f ;" " movl $63, %[result] ;" "1: xorl $31, %[result] ;" - : [result] "=r" (result) /* result can be in any register */ - : [value] "rmi" (value) /* 'value' can be register, memory or immediate */ - : "cc" /* clobbers condition codes */ + : [result] "=r" (result) // result can be in any register + : [value] "rmi" (value) // 'value' can be register, memory or immediate + : "cc" // clobbers condition codes ); - return result; } -#endif /* __EIGCCX86__ */ +#endif // MAME_OSD_EIGCCX86_H diff --git a/src/osd/eivc.h b/src/osd/eivc.h index defb3e5120e..de4ea809a28 100644 --- a/src/osd/eivc.h +++ b/src/osd/eivc.h @@ -8,8 +8,11 @@ // //============================================================ -#ifndef __EIVC__ -#define __EIVC__ +#ifndef MAME_OSD_EIVC_H +#define MAME_OSD_EIVC_H + +#pragma once + #include #pragma intrinsic(_BitScanReverse) @@ -25,10 +28,10 @@ #ifndef count_leading_zeros #define count_leading_zeros _count_leading_zeros -static inline uint8_t _count_leading_zeros(uint32_t value) +inline uint8_t _count_leading_zeros(uint32_t value) { - uint32_t index; - return _BitScanReverse((unsigned long *)&index, value) ? (index ^ 31) : 32; + unsigned long index; + return _BitScanReverse(&index, value) ? (index ^ 31) : 32; } #endif @@ -40,11 +43,11 @@ static inline uint8_t _count_leading_zeros(uint32_t value) #ifndef count_leading_ones #define count_leading_ones _count_leading_ones -static inline uint8_t _count_leading_ones(uint32_t value) +inline uint8_t _count_leading_ones(uint32_t value) { - uint32_t index; - return _BitScanReverse((unsigned long *)&index, ~value) ? (index ^ 31) : 32; + unsigned long index; + return _BitScanReverse(&index, ~value) ? (index ^ 31) : 32; } #endif -#endif /* __EIVC__ */ +#endif // MAME_OSD_EIVC_H diff --git a/src/osd/eminline.h b/src/osd/eminline.h index fa9d3083941..43316491a08 100644 --- a/src/osd/eminline.h +++ b/src/osd/eminline.h @@ -9,14 +9,16 @@ ***************************************************************************/ -#ifndef __EMINLINE__ -#define __EMINLINE__ +#ifndef MAME_OSD_EMINLINE_H +#define MAME_OSD_EMINLINE_H + +#pragma once #include "osdcomm.h" #include "osdcore.h" #if !defined(MAME_NOASM) -/* we come with implementations for GCC x86 and PPC */ + #if defined(__GNUC__) #if defined(__i386__) || defined(__x86_64__) @@ -27,9 +29,7 @@ #error "no matching assembler implementations found - please compile with NOASM=1" #endif -#else - -#if defined(_MSC_VER) +#elif defined(_MSC_VER) #if (defined(_M_IX86) || defined(_M_X64)) #include "eivcx86.h" @@ -43,8 +43,7 @@ #endif -#endif -#endif +#endif // !defined(MAME_NOASM) /*************************************************************************** @@ -57,9 +56,9 @@ -------------------------------------------------*/ #ifndef mul_32x32 -static inline int64_t mul_32x32(int32_t a, int32_t b) +inline int64_t mul_32x32(int32_t a, int32_t b) { - return (int64_t)a * (int64_t)b; + return int64_t(a) * int64_t(b); } #endif @@ -71,9 +70,9 @@ static inline int64_t mul_32x32(int32_t a, int32_t b) -------------------------------------------------*/ #ifndef mulu_32x32 -static inline uint64_t mulu_32x32(uint32_t a, uint32_t b) +inline uint64_t mulu_32x32(uint32_t a, uint32_t b) { - return (uint64_t)a * (uint64_t)b; + return uint64_t(a) * uint64_t(b); } #endif @@ -85,9 +84,9 @@ static inline uint64_t mulu_32x32(uint32_t a, uint32_t b) -------------------------------------------------*/ #ifndef mul_32x32_hi -static inline int32_t mul_32x32_hi(int32_t a, int32_t b) +inline int32_t mul_32x32_hi(int32_t a, int32_t b) { - return (uint32_t)(((int64_t)a * (int64_t)b) >> 32); + return uint32_t((int64_t(a) * int64_t(b)) >> 32); } #endif @@ -99,9 +98,9 @@ static inline int32_t mul_32x32_hi(int32_t a, int32_t b) -------------------------------------------------*/ #ifndef mulu_32x32_hi -static inline uint32_t mulu_32x32_hi(uint32_t a, uint32_t b) +inline uint32_t mulu_32x32_hi(uint32_t a, uint32_t b) { - return (uint32_t)(((uint64_t)a * (uint64_t)b) >> 32); + return uint32_t((uint64_t(a) * uint64_t(b)) >> 32); } #endif @@ -114,9 +113,9 @@ static inline uint32_t mulu_32x32_hi(uint32_t a, uint32_t b) -------------------------------------------------*/ #ifndef mul_32x32_shift -static inline int32_t mul_32x32_shift(int32_t a, int32_t b, uint8_t shift) +inline int32_t mul_32x32_shift(int32_t a, int32_t b, uint8_t shift) { - return (int32_t)(((int64_t)a * (int64_t)b) >> shift); + return int32_t((int64_t(a) * int64_t(b)) >> shift); } #endif @@ -129,9 +128,9 @@ static inline int32_t mul_32x32_shift(int32_t a, int32_t b, uint8_t shift) -------------------------------------------------*/ #ifndef mulu_32x32_shift -static inline uint32_t mulu_32x32_shift(uint32_t a, uint32_t b, uint8_t shift) +inline uint32_t mulu_32x32_shift(uint32_t a, uint32_t b, uint8_t shift) { - return (uint32_t)(((uint64_t)a * (uint64_t)b) >> shift); + return uint32_t((uint64_t(a) * uint64_t(b)) >> shift); } #endif @@ -142,9 +141,9 @@ static inline uint32_t mulu_32x32_shift(uint32_t a, uint32_t b, uint8_t shift) -------------------------------------------------*/ #ifndef div_64x32 -static inline int32_t div_64x32(int64_t a, int32_t b) +inline int32_t div_64x32(int64_t a, int32_t b) { - return a / (int64_t)b; + return a / int64_t(b); } #endif @@ -155,9 +154,9 @@ static inline int32_t div_64x32(int64_t a, int32_t b) -------------------------------------------------*/ #ifndef divu_64x32 -static inline uint32_t divu_64x32(uint64_t a, uint32_t b) +inline uint32_t divu_64x32(uint64_t a, uint32_t b) { - return a / (uint64_t)b; + return a / uint64_t(b); } #endif @@ -169,10 +168,10 @@ static inline uint32_t divu_64x32(uint64_t a, uint32_t b) -------------------------------------------------*/ #ifndef div_64x32_rem -static inline int32_t div_64x32_rem(int64_t a, int32_t b, int32_t *remainder) +inline int32_t div_64x32_rem(int64_t a, int32_t b, int32_t *remainder) { - int32_t res = div_64x32(a, b); - *remainder = a - ((int64_t)b * res); + int32_t const res = div_64x32(a, b); + *remainder = a - (int64_t(b) * res); return res; } #endif @@ -185,10 +184,10 @@ static inline int32_t div_64x32_rem(int64_t a, int32_t b, int32_t *remainder) -------------------------------------------------*/ #ifndef divu_64x32_rem -static inline uint32_t divu_64x32_rem(uint64_t a, uint32_t b, uint32_t *remainder) +inline uint32_t divu_64x32_rem(uint64_t a, uint32_t b, uint32_t *remainder) { - uint32_t res = divu_64x32(a, b); - *remainder = a - ((uint64_t)b * res); + uint32_t const res = divu_64x32(a, b); + *remainder = a - (uint64_t(b) * res); return res; } #endif @@ -201,9 +200,9 @@ static inline uint32_t divu_64x32_rem(uint64_t a, uint32_t b, uint32_t *remainde -------------------------------------------------*/ #ifndef div_32x32_shift -static inline int32_t div_32x32_shift(int32_t a, int32_t b, uint8_t shift) +inline int32_t div_32x32_shift(int32_t a, int32_t b, uint8_t shift) { - return ((int64_t)a << shift) / (int64_t)b; + return (int64_t(a) << shift) / int64_t(b); } #endif @@ -215,9 +214,9 @@ static inline int32_t div_32x32_shift(int32_t a, int32_t b, uint8_t shift) -------------------------------------------------*/ #ifndef divu_32x32_shift -static inline uint32_t divu_32x32_shift(uint32_t a, uint32_t b, uint8_t shift) +inline uint32_t divu_32x32_shift(uint32_t a, uint32_t b, uint8_t shift) { - return ((uint64_t)a << shift) / (uint64_t)b; + return (uint64_t(a) << shift) / uint64_t(b); } #endif @@ -228,7 +227,7 @@ static inline uint32_t divu_32x32_shift(uint32_t a, uint32_t b, uint8_t shift) -------------------------------------------------*/ #ifndef mod_64x32 -static inline int32_t mod_64x32(int64_t a, int32_t b) +inline int32_t mod_64x32(int64_t a, int32_t b) { return a - (b * div_64x32(a, b)); } @@ -241,7 +240,7 @@ static inline int32_t mod_64x32(int64_t a, int32_t b) -------------------------------------------------*/ #ifndef modu_64x32 -static inline uint32_t modu_64x32(uint64_t a, uint32_t b) +inline uint32_t modu_64x32(uint64_t a, uint32_t b) { return a - (b * divu_64x32(a, b)); } @@ -254,7 +253,7 @@ static inline uint32_t modu_64x32(uint64_t a, uint32_t b) -------------------------------------------------*/ #ifndef recip_approx -static inline float recip_approx(float value) +inline float recip_approx(float value) { return 1.0f / value; } @@ -272,10 +271,10 @@ static inline float recip_approx(float value) -------------------------------------------------*/ #ifndef count_leading_zeros -static inline uint8_t count_leading_zeros(uint32_t val) +inline uint8_t count_leading_zeros(uint32_t val) { uint8_t count; - for (count = 0; (int32_t)val >= 0; count++) val <<= 1; + for (count = 0; int32_t(val) >= 0; count++) val <<= 1; return count; } #endif @@ -287,7 +286,7 @@ static inline uint8_t count_leading_zeros(uint32_t val) -------------------------------------------------*/ #ifndef count_leading_ones -static inline uint8_t count_leading_ones(uint32_t val) +inline uint8_t count_leading_ones(uint32_t val) { uint8_t count; for (count = 0; (int32_t)val < 0; count++) val <<= 1; @@ -308,10 +307,10 @@ static inline uint8_t count_leading_ones(uint32_t val) -------------------------------------------------*/ #ifndef get_profile_ticks -static inline int64_t get_profile_ticks(void) +inline int64_t get_profile_ticks() { return osd_ticks(); } #endif -#endif /* __EMINLINE__ */ +#endif // MAME_OSD_EMINLINE_H -- cgit v1.2.3