From 117ea91e451175036bb225add98d9cffd053f546 Mon Sep 17 00:00:00 2001 From: Nigel Barnes Date: Fri, 23 Mar 2018 13:24:18 +0000 Subject: electron64: Implemented Master RAM Board, and promoted to working. --- src/mame/drivers/electron.cpp | 27 +++++++++-- src/mame/includes/electron.h | 103 +++++++++++++++++++++++------------------- src/mame/machine/electron.cpp | 55 +++++++++++++++++----- 3 files changed, 122 insertions(+), 63 deletions(-) diff --git a/src/mame/drivers/electron.cpp b/src/mame/drivers/electron.cpp index 70ce01f862a..ac8bcca8c5f 100644 --- a/src/mame/drivers/electron.cpp +++ b/src/mame/drivers/electron.cpp @@ -98,6 +98,11 @@ void electron_state::electron_mem(address_map &map) map(0xfe00, 0xfeff).rw(this, FUNC(electron_state::electron_sheila_r), FUNC(electron_state::electron_sheila_w)); /* SHEILA */ } +void electron_state::electron64_opcodes(address_map &map) +{ + map(0x0000, 0xffff).r(this, FUNC(electron_state::electron64_fetch_r)); +} + INPUT_CHANGED_MEMBER(electron_state::trigger_reset) { m_maincpu->set_input_line(INPUT_LINE_RESET, newval ? ASSERT_LINE : CLEAR_LINE); @@ -201,7 +206,7 @@ static INPUT_PORTS_START( electron64 ) PORT_INCLUDE(electron) PORT_START("MRB") - PORT_CONFNAME(0x03, 0x01, "MRB Mode") + PORT_CONFNAME(0x03, 0x02, "MRB Mode") PORT_CONFSETTING(0x00, "Normal") PORT_CONFSETTING(0x01, "Turbo") PORT_CONFSETTING(0x02, "64K") @@ -261,6 +266,18 @@ MACHINE_CONFIG_START(electron_state::btm2105) MACHINE_CONFIG_END +MACHINE_CONFIG_START(electron_state::electron64) + electron(config); + + MCFG_CPU_MODIFY("maincpu") + MCFG_CPU_PROGRAM_MAP(electron_mem) + MCFG_CPU_OPCODES_MAP(electron64_opcodes) + + MCFG_RAM_MODIFY(RAM_TAG) + MCFG_RAM_DEFAULT_SIZE("64K") +MACHINE_CONFIG_END + + /* Electron Rom Load */ ROM_START(electron) ROM_REGION( 0x4000, "mos", 0 ) @@ -279,7 +296,7 @@ ROM_END #define rom_btm2105 rom_electron -/* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS */ -COMP ( 1983, electron, 0, 0, electron, electron, electron_state, 0, "Acorn", "Acorn Electron", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS ) -COMP ( 1985, btm2105, electron, 0, btm2105, electron, electron_state, 0, "British Telecom Business Systems", "BT Merlin M2105", MACHINE_NOT_WORKING ) -COMP ( 1987, electron64, electron, 0, electron, electron64, electron_state, 0, "Acorn/Slogger", "Acorn Electron (64K Master RAM Board)", MACHINE_NOT_WORKING ) +/* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS */ +COMP ( 1983, electron, 0, 0, electron, electron, electron_state, 0, "Acorn", "Acorn Electron", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS ) +COMP ( 1985, btm2105, electron, 0, btm2105, electron, electron_state, 0, "British Telecom Business Systems", "BT Merlin M2105", MACHINE_NOT_WORKING ) +COMP ( 1987, electron64, electron, 0, electron64, electron64, electron_state, 0, "Acorn/Slogger", "Acorn Electron (64K Master RAM Board)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS ) diff --git a/src/mame/includes/electron.h b/src/mame/includes/electron.h index a3fbfc593de..03066fb852a 100644 --- a/src/mame/includes/electron.h +++ b/src/mame/includes/electron.h @@ -52,40 +52,11 @@ public: , m_mrb(*this, "MRB") { } - /* ULA context */ - - struct ULA - { - uint8_t interrupt_status; - uint8_t interrupt_control; - uint8_t rompage; - uint16_t screen_start; - uint16_t screen_base; - int screen_size; - uint16_t screen_addr; - uint8_t *vram; - int current_pal[16]; - int communication_mode; - int screen_mode; - int cassette_motor_mode; - int capslock_mode; - // int scanline; - /* tape reading related */ - uint32_t tape_value; - int tape_steps; - int bit_count; - int high_tone_set; - int start_bit; - int stop_bit; - int tape_running; - uint8_t tape_byte; - }; - - ULA m_ula; emu_timer *m_tape_timer; int m_map4[256]; int m_map16[256]; emu_timer *m_scanline_timer; + DECLARE_READ8_MEMBER(electron64_fetch_r); DECLARE_READ8_MEMBER(electron_mem_r); DECLARE_WRITE8_MEMBER(electron_mem_w); DECLARE_READ8_MEMBER(electron_paged_r); @@ -98,17 +69,33 @@ public: DECLARE_WRITE8_MEMBER(electron_jim_w); DECLARE_READ8_MEMBER(electron_sheila_r); DECLARE_WRITE8_MEMBER(electron_sheila_w); - void waitforramsync(); - void electron_tape_start(); - void electron_tape_stop(); - virtual void machine_start() override; - virtual void machine_reset() override; - virtual void video_start() override; + DECLARE_PALETTE_INIT(electron); uint32_t screen_update_electron(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); TIMER_CALLBACK_MEMBER(electron_tape_timer_handler); TIMER_CALLBACK_MEMBER(setup_beep); TIMER_CALLBACK_MEMBER(electron_scanline_interrupt); + + inline uint8_t read_vram( uint16_t addr ); + inline void electron_plot_pixel(bitmap_ind16 &bitmap, int x, int y, uint32_t color); + void electron_interrupt_handler(int mode, int interrupt); + DECLARE_INPUT_CHANGED_MEMBER( trigger_reset ); + + void electron(machine_config &config); + void btm2105(machine_config &config); + void electron_mem(address_map &map); + + void electron64(machine_config &config); + void electron64_opcodes(address_map &map); + +protected: + virtual void machine_start() override; + virtual void machine_reset() override; + virtual void video_start() override; + + virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override; + +private: required_device m_maincpu; required_device m_screen; required_device m_cassette; @@ -119,18 +106,42 @@ public: required_device m_exp; required_device m_ram; optional_ioport m_mrb; - inline uint8_t read_vram( uint16_t addr ); - inline void electron_plot_pixel(bitmap_ind16 &bitmap, int x, int y, uint32_t color); - void electron_interrupt_handler(int mode, int interrupt); - DECLARE_INPUT_CHANGED_MEMBER( trigger_reset ); - void electron(machine_config &config); - void btm2105(machine_config &config); - void electron_mem(address_map &map); + void waitforramsync(); + void electron_tape_start(); + void electron_tape_stop(); -protected: - virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override; -}; + /* ULA context */ + struct ULA + { + uint8_t interrupt_status; + uint8_t interrupt_control; + uint8_t rompage; + uint16_t screen_start; + uint16_t screen_base; + int screen_size; + uint16_t screen_addr; + uint8_t *vram; + int current_pal[16]; + int communication_mode; + int screen_mode; + int cassette_motor_mode; + int capslock_mode; + // int scanline; + /* tape reading related */ + uint32_t tape_value; + int tape_steps; + int bit_count; + int high_tone_set; + int start_bit; + int stop_bit; + int tape_running; + uint8_t tape_byte; + }; + ULA m_ula; + bool m_mrb_mapped; + bool m_vdu_drivers; +}; #endif // MAME_INCLUDES_ELECTRON_H diff --git a/src/mame/machine/electron.cpp b/src/mame/machine/electron.cpp index 13bac53f86a..6e1236fdba0 100644 --- a/src/mame/machine/electron.cpp +++ b/src/mame/machine/electron.cpp @@ -142,21 +142,52 @@ TIMER_CALLBACK_MEMBER(electron_state::electron_tape_timer_handler) } } +READ8_MEMBER(electron_state::electron64_fetch_r) +{ + m_vdu_drivers = (offset & 0xe000) == 0xc000 ? true : false; + + return m_maincpu->space(AS_PROGRAM).read_byte(offset); +} + READ8_MEMBER(electron_state::electron_mem_r) { - /* The processor will run at 1MHz during an access cycle to the RAM */ - m_maincpu->set_clock_scale(0.5f); + switch (m_mrb.read_safe(0)) + { + case 0x00: /* Normal */ + /* The processor will run at 1MHz during an access cycle to the RAM */ + m_maincpu->set_clock_scale(0.5f); + //waitforramsync(); + break; - //waitforramsync(); + case 0x01: /* Turbo */ + if (m_mrb_mapped && offset < 0x3000) offset += 0x8000; + break; + + case 0x02: /* Shadow */ + if (m_mrb_mapped && (offset < 0x3000 || !m_vdu_drivers)) offset += 0x8000; + break; + } return m_ram->read(offset); } WRITE8_MEMBER(electron_state::electron_mem_w) { - /* The processor will run at 1MHz during an access cycle to the RAM */ - m_maincpu->set_clock_scale(0.5f); + switch (m_mrb.read_safe(0)) + { + case 0x00: /* Normal */ + /* The processor will run at 1MHz during an access cycle to the RAM */ + m_maincpu->set_clock_scale(0.5f); + //waitforramsync(); + break; - //waitforramsync(); + case 0x01: /* Turbo */ + if (m_mrb_mapped && offset < 0x3000) offset += 0x8000; + break; + + case 0x02: /* Shadow */ + if (m_mrb_mapped && (offset < 0x3000 || !m_vdu_drivers)) offset += 0x8000; + break; + } m_ram->write(offset, data); } @@ -252,14 +283,11 @@ WRITE8_MEMBER(electron_state::electron_fred_w) /* The processor will run at 2MHz during an access cycle to the ROM */ m_maincpu->set_clock_scale(1.0f); - //logerror("FRED: write fc%02x\n", offset); - m_exp->expbus_w(space, 0xfc00 + offset, data); - /* Master RAM Board */ - if (offset == 0x7f && m_mrb.read_safe(0)) - { + if (offset == 0x7f) m_mrb_mapped = !(data & 0x80); - } + //logerror("FRED: write fc%02x\n", offset); + m_exp->expbus_w(space, 0xfc00 + offset, data); } READ8_MEMBER(electron_state::electron_jim_r) @@ -469,6 +497,9 @@ void electron_state::machine_reset() m_ula.screen_addr = 0; m_ula.tape_running = 0; m_ula.vram = (uint8_t *)m_ram->pointer() + m_ula.screen_base; + + m_mrb_mapped = true; + m_vdu_drivers = false; } void electron_state::machine_start() -- cgit v1.2.3