From 0a86f2efe9d836c2af992262b9e1f6ba7c973fdb Mon Sep 17 00:00:00 2001 From: mooglyguy Date: Sat, 15 Sep 2018 20:28:53 +0200 Subject: -cgsix: Renamed turbogx.* to cgsix.* and added TurboGX+ support. [Ryan Holtz, Andrew Liles] --- scripts/src/bus.lua | 4 +- src/devices/bus/sbus/bwtwo.h | 2 +- src/devices/bus/sbus/cgsix.cpp | 1033 +++++++++++++++++++++++++++++++++++++ src/devices/bus/sbus/cgsix.h | 512 ++++++++++++++++++ src/devices/bus/sbus/cgthree.h | 2 +- src/devices/bus/sbus/hme.h | 2 +- src/devices/bus/sbus/sbus.cpp | 13 +- src/devices/bus/sbus/sunpc.h | 2 +- src/devices/bus/sbus/turbogx.cpp | 974 ---------------------------------- src/devices/bus/sbus/turbogx.h | 474 ----------------- src/devices/cpu/sparc/mb86901.cpp | 2 +- src/devices/video/bt45x.cpp | 17 +- src/devices/video/bt45x.h | 10 + 13 files changed, 1585 insertions(+), 1462 deletions(-) create mode 100644 src/devices/bus/sbus/cgsix.cpp create mode 100644 src/devices/bus/sbus/cgsix.h delete mode 100644 src/devices/bus/sbus/turbogx.cpp delete mode 100644 src/devices/bus/sbus/turbogx.h diff --git a/scripts/src/bus.lua b/scripts/src/bus.lua index 57995cf2c02..bc381f7c710 100644 --- a/scripts/src/bus.lua +++ b/scripts/src/bus.lua @@ -3040,14 +3040,14 @@ if (BUSES["SBUS"]~=null) then files { MAME_DIR .. "src/devices/bus/sbus/bwtwo.cpp", MAME_DIR .. "src/devices/bus/sbus/bwtwo.h", + MAME_DIR .. "src/devices/bus/sbus/cgsix.cpp", + MAME_DIR .. "src/devices/bus/sbus/cgsix.h", MAME_DIR .. "src/devices/bus/sbus/cgthree.cpp", MAME_DIR .. "src/devices/bus/sbus/cgthree.h", MAME_DIR .. "src/devices/bus/sbus/hme.cpp", MAME_DIR .. "src/devices/bus/sbus/hme.h", MAME_DIR .. "src/devices/bus/sbus/sunpc.cpp", MAME_DIR .. "src/devices/bus/sbus/sunpc.h", - MAME_DIR .. "src/devices/bus/sbus/turbogx.cpp", - MAME_DIR .. "src/devices/bus/sbus/turbogx.h", MAME_DIR .. "src/devices/bus/sbus/sbus.cpp", MAME_DIR .. "src/devices/bus/sbus/sbus.h", } diff --git a/src/devices/bus/sbus/bwtwo.h b/src/devices/bus/sbus/bwtwo.h index 089d99d4615..0d4a96f2f39 100644 --- a/src/devices/bus/sbus/bwtwo.h +++ b/src/devices/bus/sbus/bwtwo.h @@ -45,7 +45,7 @@ private: required_device m_screen; }; -// device type definition + DECLARE_DEVICE_TYPE(SBUS_BWTWO, sbus_bwtwo_device) #endif // MAME_BUS_SBUS_BWTWO_H diff --git a/src/devices/bus/sbus/cgsix.cpp b/src/devices/bus/sbus/cgsix.cpp new file mode 100644 index 00000000000..714d68b85f4 --- /dev/null +++ b/src/devices/bus/sbus/cgsix.cpp @@ -0,0 +1,1033 @@ +// license:BSD-3-Clause +// copyright-holders:Ryan Holtz +/*************************************************************************** + + Sun cgsix-series accelerated 8-bit color video controller + +***************************************************************************/ + +#include "emu.h" +#include "cgsix.h" + +DEFINE_DEVICE_TYPE(SBUS_TURBOGX, sbus_turbogx_device, "turbogx", "Sun TurboGX SBus Video") +DEFINE_DEVICE_TYPE(SBUS_TURBOGXP, sbus_turbogxp_device, "turbogxp", "Sun TurboGX+ SBus Video") + +//------------------------------------------------- +// base cgsix device +//------------------------------------------------- + +void sbus_cgsix_device::base_map(address_map &map) +{ + map(0x00000000, 0x01ffffff).rw(FUNC(sbus_cgsix_device::unknown_r), FUNC(sbus_cgsix_device::unknown_w)); + map(0x00000000, 0x00007fff).r(FUNC(sbus_cgsix_device::rom_r)); + map(0x00200000, 0x0020000f).m(m_ramdac, FUNC(bt458_device::map)).umask32(0xff000000); + map(0x00700000, 0x00700fff).rw(FUNC(sbus_cgsix_device::fbc_r), FUNC(sbus_cgsix_device::fbc_w)); +} + +sbus_cgsix_device::sbus_cgsix_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, type, tag, owner, clock) + , device_sbus_card_interface(mconfig, *this) + , m_rom(*this, "prom") + , m_screen(*this, "screen") + , m_ramdac(*this, "ramdac") +{ +} + +void sbus_cgsix_device::device_start() +{ + m_vram = std::make_unique(m_vram_size / 4); +} + +void sbus_cgsix_device::device_reset() +{ + memset(&m_fbc, 0, sizeof(m_fbc)); +} + +uint32_t sbus_cgsix_device::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) +{ + const pen_t *pens = m_ramdac->pens(); + uint8_t *vram = (uint8_t *)&m_vram[0]; + + for (int y = 0; y < 900; y++) + { + uint32_t *scanline = &bitmap.pix32(y); + for (int x = 0; x < 1152; x++) + { + const uint8_t pixel = vram[y * 1152 + BYTE4_XOR_BE(x)]; + *scanline++ = pens[pixel]; + } + } + + return 0; +} + +READ32_MEMBER(sbus_cgsix_device::rom_r) +{ + return ((uint32_t*)m_rom->base())[offset]; +} + +READ32_MEMBER(sbus_cgsix_device::unknown_r) +{ + logerror("%s: unknown_r: %08x & %08x\n", machine().describe_context(), offset << 2, mem_mask); + return 0; +} + +WRITE32_MEMBER(sbus_cgsix_device::unknown_w) +{ + logerror("%s: unknown_w: %08x = %08x & %08x\n", machine().describe_context(), offset << 2, data, mem_mask); +} + +READ32_MEMBER(sbus_cgsix_device::vram_r) +{ + return m_vram[offset]; +} + +WRITE32_MEMBER(sbus_cgsix_device::vram_w) +{ + COMBINE_DATA(&m_vram[offset]); +} + +uint8_t sbus_cgsix_device::perform_rasterop(uint8_t src, uint8_t dst) +{ + const uint32_t rops[4] = { fbc_rasterop_rop00(), fbc_rasterop_rop01(), fbc_rasterop_rop10(), fbc_rasterop_rop11() }; + + uint8_t result = 0; + //logerror("src:%02x dst:%02x\n", src, dst); + for (int bit = 0; bit < 8; bit++) + { + const uint8_t mask = (1 << bit); + const uint8_t f = BIT(m_fbc.m_fcolor, bit) << 1; + const uint8_t b = BIT(m_fbc.m_bcolor, bit); + const uint8_t s = src & mask; + const uint8_t d = dst & mask; + const uint32_t rop = rops[f | b]; + //logerror("f:%d b:%d s:%02x d:%02x rop:%d\n", f >> 1, b, s, d, rop); + + uint8_t value = 0; + switch (rop) + { + case ROP_CLR: break; + case ROP_SRC_NOR_DST: value = ~(s | d); break; + case ROP_NSRC_AND_DST: value = ~s & d; break; + case ROP_NOT_SRC: value = ~s; break; + case ROP_SRC_AND_NDST: value = s & ~d; break; + case ROP_NOT_DST: value = ~d; break; + case ROP_SRC_XOR_DST: value = s ^ d; break; + case ROP_SRC_NAND_DST: value = ~(s & d); break; + case ROP_SRC_AND_DST: value = s & d; break; + case ROP_SRC_XNOR_DST: value = ~(s ^ d); break; + case ROP_DST: value = d; break; + case ROP_NSRC_OR_DST: value = ~s | d; break; + case ROP_SRC: value = s; break; + case ROP_SRC_OR_NDST: value = s | ~d; break; + case ROP_SRC_OR_DST: value = s | d; break; + case ROP_SET: value = 0xff; break; + default: value = 0; break; + } + result |= value & mask; + } + return result; +} + +// NOTE: This is basically untested, and probably full of bugs! +void sbus_cgsix_device::handle_draw_command() +{ + if (fbc_misc_draw() != FBC_MISC_DRAW_RENDER) + { + logerror("handle_draw_command: Unsupported draw mode %d, abandoning draw\n", fbc_misc_draw()); + return; + } + + if (m_fbc.m_curr_prim_type != PRIM_RECT) + { + logerror("handle_draw_command: Unsupported prim type %d, abandoning draw\n", m_fbc.m_curr_prim_type); + return; + } + + if (m_fbc.m_vertex_count < 2) + { + logerror("handle_draw_command: Insufficient number of vertices queued, abandoning draw\n"); + return; + } + + uint8_t *vram = (uint8_t*)&m_vram[0]; + + uint32_t vindex = 0; + while (vindex < m_fbc.m_vertex_count) + { + vertex_t &v0 = m_fbc.m_prim_buf[vindex++]; + vertex_t &v1 = m_fbc.m_prim_buf[vindex++]; + + for (uint32_t y = v0.m_absy; y < v1.m_absy; y++) + { + const uint32_t line = y * (m_fbc.m_clip_maxx + 1); + for (uint32_t x = v0.m_absx; x < v1.m_absx; x++) + { + const uint8_t src = vram[line + x]; + const uint8_t dst = src; + const uint8_t result = perform_rasterop(src, dst); + vram[line + x] = result; + } + } + } + m_fbc.m_vertex_count = 0; +} + +// NOTE: This is basically untested, and probably full of bugs! +void sbus_cgsix_device::handle_blit_command() +{ + uint8_t *vram = (uint8_t*)&m_vram[0]; + const uint32_t fbw = (m_fbc.m_clip_maxx + 1); + logerror("Copying from %d,%d-%d,%d to %d,%d-%d,%d, width %d, height %d\n" + , m_fbc.m_x0, m_fbc.m_y0 + , m_fbc.m_x1, m_fbc.m_y1 + , m_fbc.m_x2, m_fbc.m_y2 + , m_fbc.m_x3, m_fbc.m_y3 + , m_fbc.m_clip_maxx, m_fbc.m_clip_maxy); + uint32_t srcy = m_fbc.m_y0; + uint32_t dsty = m_fbc.m_y2; + for (; srcy < m_fbc.m_y1; srcy++, dsty++) + { + uint32_t srcy_index = srcy * fbw; + uint32_t dsty_index = dsty * fbw; + uint32_t srcx = m_fbc.m_x0; + uint32_t dstx = m_fbc.m_x2; + for (; srcx < m_fbc.m_x1; srcx++, dstx++) + { + const uint8_t src = vram[srcy_index + srcx]; + const uint8_t dst = vram[dsty_index + dstx]; + const uint8_t result = perform_rasterop(src, dst); + //logerror("vram[%d] = %02x\n", result); + vram[dsty_index + dstx] = result; + } + } +} + +READ32_MEMBER(sbus_cgsix_device::fbc_r) +{ + uint32_t ret = 0; + switch (offset) + { + case FBC_MISC: + logerror("fbc_r: MISC (%08x & %08x)\n", m_fbc.m_misc, mem_mask); + return m_fbc.m_misc; + case FBC_CLIP_CHECK: + logerror("fbc_r: CLIP_CHECK (%08x & %08x)\n", m_fbc.m_clip_check, mem_mask); + return m_fbc.m_clip_check; + + case FBC_STATUS: + logerror("fbc_r: STATUS (%08x & %08x)\n", m_fbc.m_status, mem_mask); + return m_fbc.m_status; + case FBC_DRAW_STATUS: + logerror("fbc_r: DRAW_STATUS (%08x & %08x)\n", m_fbc.m_draw_status, mem_mask); + handle_draw_command(); + return m_fbc.m_draw_status; + case FBC_BLIT_STATUS: + logerror("fbc_r: BLIT_STATUS (%08x & %08x)\n", m_fbc.m_blit_status, mem_mask); + handle_blit_command(); + return m_fbc.m_blit_status; + case FBC_FONT: + logerror("fbc_r: FONT (%08x & %08x)\n", m_fbc.m_font, mem_mask); + return m_fbc.m_font; + + case FBC_X0: + logerror("fbc_r: X0 (%08x & %08x)\n", m_fbc.m_x0, mem_mask); + return m_fbc.m_x0; + case FBC_Y0: + logerror("fbc_r: Y0 (%08x & %08x)\n", m_fbc.m_y0, mem_mask); + return m_fbc.m_y0; + case FBC_Z0: + logerror("fbc_r: Z0 (%08x & %08x)\n", m_fbc.m_z0, mem_mask); + return m_fbc.m_z0; + case FBC_COLOR0: + logerror("fbc_r: COLOR0 (%08x & %08x)\n", m_fbc.m_color0, mem_mask); + return m_fbc.m_color0; + case FBC_X1: + logerror("fbc_r: X1 (%08x & %08x)\n", m_fbc.m_x1, mem_mask); + return m_fbc.m_x1; + case FBC_Y1: + logerror("fbc_r: Y1 (%08x & %08x)\n", m_fbc.m_y1, mem_mask); + return m_fbc.m_y1; + case FBC_Z1: + logerror("fbc_r: Z1 (%08x & %08x)\n", m_fbc.m_z1, mem_mask); + return m_fbc.m_z1; + case FBC_COLOR1: + logerror("fbc_r: COLOR1 (%08x & %08x)\n", m_fbc.m_color1, mem_mask); + return m_fbc.m_color1; + case FBC_X2: + logerror("fbc_r: X2 (%08x & %08x)\n", m_fbc.m_x2, mem_mask); + return m_fbc.m_x2; + case FBC_Y2: + logerror("fbc_r: Y2 (%08x & %08x)\n", m_fbc.m_y2, mem_mask); + return m_fbc.m_y2; + case FBC_Z2: + logerror("fbc_r: Z2 (%08x & %08x)\n", m_fbc.m_z2, mem_mask); + return m_fbc.m_z2; + case FBC_COLOR2: + logerror("fbc_r: COLOR2 (%08x & %08x)\n", m_fbc.m_color2, mem_mask); + return m_fbc.m_color2; + case FBC_X3: + logerror("fbc_r: X3 (%08x & %08x)\n", m_fbc.m_x3, mem_mask); + return m_fbc.m_x3; + case FBC_Y3: + logerror("fbc_r: Y3 (%08x & %08x)\n", m_fbc.m_y3, mem_mask); + return m_fbc.m_y3; + case FBC_Z3: + logerror("fbc_r: Z3 (%08x & %08x)\n", m_fbc.m_z3, mem_mask); + return m_fbc.m_z3; + case FBC_COLOR3: + logerror("fbc_r: COLOR3 (%08x & %08x)\n", m_fbc.m_color3, mem_mask); + return m_fbc.m_color3; + + case FBC_RASTER_OFFX: + logerror("fbc_r: RASTER_OFFX (%08x & %08x)\n", m_fbc.m_raster_offx, mem_mask); + return m_fbc.m_raster_offx; + case FBC_RASTER_OFFY: + logerror("fbc_r: RASTER_OFFY (%08x & %08x)\n", m_fbc.m_raster_offy, mem_mask); + return m_fbc.m_raster_offy; + case FBC_AUTOINCX: + logerror("fbc_r: AUTOINCX (%08x & %08x)\n", m_fbc.m_autoincx, mem_mask); + return m_fbc.m_autoincx; + case FBC_AUTOINCY: + logerror("fbc_r: AUTOINCY (%08x & %08x)\n", m_fbc.m_autoincy, mem_mask); + return m_fbc.m_autoincy; + case FBC_CLIP_MINX: + logerror("fbc_r: CLIP_MINX (%08x & %08x)\n", m_fbc.m_clip_minx, mem_mask); + return m_fbc.m_clip_minx; + case FBC_CLIP_MINY: + logerror("fbc_r: CLIP_MINY (%08x & %08x)\n", m_fbc.m_clip_miny, mem_mask); + return m_fbc.m_clip_miny; + case FBC_CLIP_MAXX: + logerror("fbc_r: CLIP_MAXX (%08x & %08x)\n", m_fbc.m_clip_maxx, mem_mask); + return m_fbc.m_clip_maxx; + case FBC_CLIP_MAXY: + logerror("fbc_r: CLIP_MAXY (%08x & %08x)\n", m_fbc.m_clip_maxy, mem_mask); + return m_fbc.m_clip_maxy; + + case FBC_FCOLOR: + logerror("fbc_r: FCOLOR (%08x & %08x)\n", m_fbc.m_fcolor, mem_mask); + return m_fbc.m_fcolor; + case FBC_BCOLOR: + logerror("fbc_r: BCOLOR (%08x & %08x)\n", m_fbc.m_bcolor, mem_mask); + return m_fbc.m_bcolor; + case FBC_RASTEROP: + logerror("fbc_r: RASTEROP (%08x & %08x)\n", m_fbc.m_rasterop, mem_mask); + return m_fbc.m_rasterop; + case FBC_PLANE_MASK: + logerror("fbc_r: PLANE_MASK (%08x & %08x)\n", m_fbc.m_plane_mask, mem_mask); + return m_fbc.m_plane_mask; + case FBC_PIXEL_MASK: + logerror("fbc_r: PIXEL_MASK (%08x & %08x)\n", m_fbc.m_pixel_mask, mem_mask); + return m_fbc.m_pixel_mask; + + case FBC_PATT_ALIGN: + logerror("fbc_r: PATT_ALIGN (%08x & %08x)\n", m_fbc.m_patt_align, mem_mask); + return m_fbc.m_patt_align; + case FBC_PATTERN0: + logerror("fbc_r: PATTERN0 (%08x & %08x)\n", m_fbc.m_pattern[0], mem_mask); + return m_fbc.m_pattern[0]; + case FBC_PATTERN1: + logerror("fbc_r: PATTERN1 (%08x & %08x)\n", m_fbc.m_pattern[1], mem_mask); + return m_fbc.m_pattern[1]; + case FBC_PATTERN2: + logerror("fbc_r: PATTERN2 (%08x & %08x)\n", m_fbc.m_pattern[2], mem_mask); + return m_fbc.m_pattern[2]; + case FBC_PATTERN3: + logerror("fbc_r: PATTERN3 (%08x & %08x)\n", m_fbc.m_pattern[3], mem_mask); + return m_fbc.m_pattern[3]; + case FBC_PATTERN4: + logerror("fbc_r: PATTERN4 (%08x & %08x)\n", m_fbc.m_pattern[4], mem_mask); + return m_fbc.m_pattern[4]; + case FBC_PATTERN5: + logerror("fbc_r: PATTERN5 (%08x & %08x)\n", m_fbc.m_pattern[5], mem_mask); + return m_fbc.m_pattern[5]; + case FBC_PATTERN6: + logerror("fbc_r: PATTERN6 (%08x & %08x)\n", m_fbc.m_pattern[6], mem_mask); + return m_fbc.m_pattern[6]; + case FBC_PATTERN7: + logerror("fbc_r: PATTERN7 (%08x & %08x)\n", m_fbc.m_pattern[7], mem_mask); + return m_fbc.m_pattern[7]; + + case FBC_IPOINT_ABSX: + logerror("fbc_r: IPOINT_ABSX (%08x & %08x)\n", m_fbc.m_ipoint_absx, mem_mask); + return m_fbc.m_ipoint_absx; + case FBC_IPOINT_ABSY: + logerror("fbc_r: IPOINT_ABSY (%08x & %08x)\n", m_fbc.m_ipoint_absy, mem_mask); + return m_fbc.m_ipoint_absy; + case FBC_IPOINT_ABSZ: + logerror("fbc_r: IPOINT_ABSZ (%08x & %08x)\n", m_fbc.m_ipoint_absz, mem_mask); + return m_fbc.m_ipoint_absz; + case FBC_IPOINT_RELX: + logerror("fbc_r: IPOINT_RELX (%08x & %08x)\n", m_fbc.m_ipoint_relx, mem_mask); + return m_fbc.m_ipoint_relx; + case FBC_IPOINT_RELY: + logerror("fbc_r: IPOINT_RELY (%08x & %08x)\n", m_fbc.m_ipoint_rely, mem_mask); + return m_fbc.m_ipoint_rely; + case FBC_IPOINT_RELZ: + logerror("fbc_r: IPOINT_RELZ (%08x & %08x)\n", m_fbc.m_ipoint_relz, mem_mask); + return m_fbc.m_ipoint_relz; + case FBC_IPOINT_R: + logerror("fbc_r: IPOINT_R (%08x & %08x)\n", m_fbc.m_ipoint_r, mem_mask); + return m_fbc.m_ipoint_r; + case FBC_IPOINT_G: + logerror("fbc_r: IPOINT_G (%08x & %08x)\n", m_fbc.m_ipoint_g, mem_mask); + return m_fbc.m_ipoint_g; + case FBC_IPOINT_B: + logerror("fbc_r: IPOINT_B (%08x & %08x)\n", m_fbc.m_ipoint_b, mem_mask); + return m_fbc.m_ipoint_b; + case FBC_IPOINT_A: + logerror("fbc_r: IPOINT_A (%08x & %08x)\n", m_fbc.m_ipoint_a, mem_mask); + return m_fbc.m_ipoint_a; + + case FBC_ILINE_ABSX: + logerror("fbc_r: ILINE_ABSX (%08x & %08x)\n", m_fbc.m_iline_absx, mem_mask); + return m_fbc.m_iline_absx; + case FBC_ILINE_ABSY: + logerror("fbc_r: ILINE_ABSY (%08x & %08x)\n", m_fbc.m_iline_absy, mem_mask); + return m_fbc.m_iline_absy; + case FBC_ILINE_ABSZ: + logerror("fbc_r: ILINE_ABSZ (%08x & %08x)\n", m_fbc.m_iline_absz, mem_mask); + return m_fbc.m_iline_absz; + case FBC_ILINE_RELX: + logerror("fbc_r: ILINE_RELX (%08x & %08x)\n", m_fbc.m_iline_relx, mem_mask); + return m_fbc.m_iline_relx; + case FBC_ILINE_RELY: + logerror("fbc_r: ILINE_RELY (%08x & %08x)\n", m_fbc.m_iline_rely, mem_mask); + return m_fbc.m_iline_rely; + case FBC_ILINE_RELZ: + logerror("fbc_r: ILINE_RELZ (%08x & %08x)\n", m_fbc.m_iline_relz, mem_mask); + return m_fbc.m_iline_relz; + case FBC_ILINE_R: + logerror("fbc_r: ILINE_R (%08x & %08x)\n", m_fbc.m_iline_r, mem_mask); + return m_fbc.m_iline_r; + case FBC_ILINE_G: + logerror("fbc_r: ILINE_G (%08x & %08x)\n", m_fbc.m_iline_g, mem_mask); + return m_fbc.m_iline_g; + case FBC_ILINE_B: + logerror("fbc_r: ILINE_B (%08x & %08x)\n", m_fbc.m_iline_b, mem_mask); + return m_fbc.m_iline_b; + case FBC_ILINE_A: + logerror("fbc_r: ILINE_A (%08x & %08x)\n", m_fbc.m_iline_a, mem_mask); + return m_fbc.m_iline_a; + + case FBC_ITRI_ABSX: + logerror("fbc_r: ITRI_ABSX (%08x & %08x)\n", m_fbc.m_itri_absx, mem_mask); + return m_fbc.m_itri_absx; + case FBC_ITRI_ABSY: + logerror("fbc_r: ITRI_ABSY (%08x & %08x)\n", m_fbc.m_itri_absy, mem_mask); + return m_fbc.m_itri_absy; + case FBC_ITRI_ABSZ: + logerror("fbc_r: ITRI_ABSZ (%08x & %08x)\n", m_fbc.m_itri_absz, mem_mask); + return m_fbc.m_itri_absz; + case FBC_ITRI_RELX: + logerror("fbc_r: ITRI_RELX (%08x & %08x)\n", m_fbc.m_itri_relx, mem_mask); + return m_fbc.m_itri_relx; + case FBC_ITRI_RELY: + logerror("fbc_r: ITRI_RELY (%08x & %08x)\n", m_fbc.m_itri_rely, mem_mask); + return m_fbc.m_itri_rely; + case FBC_ITRI_RELZ: + logerror("fbc_r: ITRI_RELZ (%08x & %08x)\n", m_fbc.m_itri_relz, mem_mask); + return m_fbc.m_itri_relz; + case FBC_ITRI_R: + logerror("fbc_r: ITRI_R (%08x & %08x)\n", m_fbc.m_itri_r, mem_mask); + return m_fbc.m_itri_r; + case FBC_ITRI_G: + logerror("fbc_r: ITRI_G (%08x & %08x)\n", m_fbc.m_itri_g, mem_mask); + return m_fbc.m_itri_g; + case FBC_ITRI_B: + logerror("fbc_r: ITRI_B (%08x & %08x)\n", m_fbc.m_itri_b, mem_mask); + return m_fbc.m_itri_b; + case FBC_ITRI_A: + logerror("fbc_r: ITRI_A (%08x & %08x)\n", m_fbc.m_itri_a, mem_mask); + return m_fbc.m_itri_a; + + case FBC_IQUAD_ABSX: + logerror("fbc_r: IQUAD_ABSX (%08x & %08x)\n", m_fbc.m_iquad_absx, mem_mask); + return m_fbc.m_iquad_absx; + case FBC_IQUAD_ABSY: + logerror("fbc_r: IQUAD_ABSY (%08x & %08x)\n", m_fbc.m_iquad_absy, mem_mask); + return m_fbc.m_iquad_absy; + case FBC_IQUAD_ABSZ: + logerror("fbc_r: IQUAD_ABSZ (%08x & %08x)\n", m_fbc.m_iquad_absz, mem_mask); + return m_fbc.m_iquad_absz; + case FBC_IQUAD_RELX: + logerror("fbc_r: IQUAD_RELX (%08x & %08x)\n", m_fbc.m_iquad_relx, mem_mask); + return m_fbc.m_iquad_relx; + case FBC_IQUAD_RELY: + logerror("fbc_r: IQUAD_RELY (%08x & %08x)\n", m_fbc.m_iquad_rely, mem_mask); + return m_fbc.m_iquad_rely; + case FBC_IQUAD_RELZ: + logerror("fbc_r: IQUAD_RELZ (%08x & %08x)\n", m_fbc.m_iquad_relz, mem_mask); + return m_fbc.m_iquad_relz; + case FBC_IQUAD_R: + logerror("fbc_r: IQUAD_R (%08x & %08x)\n", m_fbc.m_iquad_r, mem_mask); + return m_fbc.m_iquad_r; + case FBC_IQUAD_G: + logerror("fbc_r: IQUAD_G (%08x & %08x)\n", m_fbc.m_iquad_g, mem_mask); + return m_fbc.m_iquad_g; + case FBC_IQUAD_B: + logerror("fbc_r: IQUAD_B (%08x & %08x)\n", m_fbc.m_iquad_b, mem_mask); + return m_fbc.m_iquad_b; + case FBC_IQUAD_A: + logerror("fbc_r: IQUAD_A (%08x & %08x)\n", m_fbc.m_iquad_a, mem_mask); + return m_fbc.m_iquad_a; + + case FBC_IRECT_ABSX: + logerror("fbc_r: IRECT_ABSX (%08x & %08x)\n", m_fbc.m_irect_absx, mem_mask); + return m_fbc.m_irect_absx; + case FBC_IRECT_ABSY: + logerror("fbc_r: IRECT_ABSY (%08x & %08x)\n", m_fbc.m_irect_absy, mem_mask); + return m_fbc.m_irect_absy; + case FBC_IRECT_ABSZ: + logerror("fbc_r: IRECT_ABSZ (%08x & %08x)\n", m_fbc.m_irect_absz, mem_mask); + return m_fbc.m_irect_absz; + case FBC_IRECT_RELX: + logerror("fbc_r: IRECT_RELX (%08x & %08x)\n", m_fbc.m_irect_relx, mem_mask); + return m_fbc.m_irect_relx; + case FBC_IRECT_RELY: + logerror("fbc_r: IRECT_RELY (%08x & %08x)\n", m_fbc.m_irect_rely, mem_mask); + return m_fbc.m_irect_rely; + case FBC_IRECT_RELZ: + logerror("fbc_r: IRECT_RELZ (%08x & %08x)\n", m_fbc.m_irect_relz, mem_mask); + return m_fbc.m_irect_relz; + case FBC_IRECT_R: + logerror("fbc_r: IRECT_R (%08x & %08x)\n", m_fbc.m_irect_r, mem_mask); + return m_fbc.m_irect_r; + case FBC_IRECT_G: + logerror("fbc_r: IRECT_G (%08x & %08x)\n", m_fbc.m_irect_g, mem_mask); + return m_fbc.m_irect_g; + case FBC_IRECT_B: + logerror("fbc_r: IRECT_B (%08x & %08x)\n", m_fbc.m_irect_b, mem_mask); + return m_fbc.m_irect_b; + case FBC_IRECT_A: + logerror("fbc_r: IRECT_A (%08x & %08x)\n", m_fbc.m_irect_a, mem_mask); + return m_fbc.m_irect_a; + + default: + logerror("fbc_r: Unknown register %08x & %08x\n", 0x00700000 | (offset << 2), mem_mask); + break; + } + return ret; +} + +WRITE32_MEMBER(sbus_cgsix_device::fbc_w) +{ + static const char* misc_bdisp_name[4] = { "IGNORE", "0", "1", "ILLEGAL" }; + static const char* misc_bread_name[4] = { "IGNORE", "0", "1", "ILLEGAL" }; + static const char* misc_bwrite1_name[4] = { "IGNORE", "ENABLE", "DISABLE", "ILLEGAL" }; + static const char* misc_bwrite0_name[4] = { "IGNORE", "ENABLE", "DISABLE", "ILLEGAL" }; + static const char* misc_draw_name[4] = { "IGNORE", "RENDER", "PICK", "ILLEGAL" }; + static const char* misc_data_name[4] = { "IGNORE", "COLOR8", "COLOR1", "HRMONO" }; + static const char* misc_blit_name[4] = { "IGNORE", "NOSRC", "SRC", "ILLEGAL" }; + static const char* rasterop_rop_name[16] = + { + "CLR", "SRC_NOR_DST", "NSRC_AND_DST", "NOT_SRC", "SRC_AND_NDST", "NOT_DST", "SRC_XOR_DST", "SRC_NAND_DST", + "SRC_AND_DST", "SRC_XNOR_DST", "DST", "NSRC_OR_DST", "SRC", "SRC_OR_NDST", "SRC_OR_DST", "SET" + }; + static const char* rasterop_plot_name[2] = { "PLOT", "UNPLOT" }; + static const char* rasterop_rast_name[2] = { "BOOL", "LINEAR" }; + static const char* rasterop_attr_name[4] = { "IGNORE", "UNSUPP", "SUPP", "ILLEGAL" }; + static const char* rasterop_polyg_name[4] = { "IGNORE", "OVERLAP", "NONOVERLAP", "ILLEGAL" }; + static const char* rasterop_pattern_name[4] = { "IGNORE", "ZEROES", "ONES", "MASK" }; + static const char* rasterop_pixel_name[4] = { "IGNORE", "ZEROES", "ONES", "MASK" }; + static const char* rasterop_plane_name[4] = { "IGNORE", "ZEROES", "ONES", "MASK" }; + + switch (offset) + { + case FBC_MISC: + COMBINE_DATA(&m_fbc.m_misc); + logerror("fbc_w: MISC = %08x & %08x\n", data, mem_mask); + logerror(" MISC_INDEX = %d\n", fbc_misc_index()); + logerror(" MISC_INDEX_MOD = %d\n", fbc_misc_index_mod()); + logerror(" MISC_BDISP = %d (%s)\n", fbc_misc_bdisp(), misc_bdisp_name[fbc_misc_bdisp()]); + logerror(" MISC_BREAD = %d (%s)\n", fbc_misc_bread(), misc_bread_name[fbc_misc_bread()]); + logerror(" MISC_BWRITE1 = %d (%s)\n", fbc_misc_bwrite1(), misc_bwrite1_name[fbc_misc_bwrite1()]); + logerror(" MISC_BWRITE0 = %d (%s)\n", fbc_misc_bwrite0(), misc_bwrite0_name[fbc_misc_bwrite0()]); + logerror(" MISC_DRAW = %d (%s)\n", fbc_misc_draw(), misc_draw_name[fbc_misc_draw()]); + logerror(" MISC_DATA = %d (%s)\n", fbc_misc_data(), misc_data_name[fbc_misc_data()]); + logerror(" MISC_BLIT = %d (%s)\n", fbc_misc_blit(), misc_blit_name[fbc_misc_blit()]); + break; + case FBC_CLIP_CHECK: + logerror("fbc_w: CLIP_CHECK = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_clip_check); + break; + + case FBC_STATUS: + logerror("fbc_w: STATUS = %08x & %08x\n", data, mem_mask); + //COMBINE_DATA(&m_fbc.m_status); + break; + case FBC_DRAW_STATUS: + logerror("fbc_w: DRAW_STATUS = %08x & %08x\n", data, mem_mask); + //COMBINE_DATA(&m_fbc.m_draw_status); + break; + case FBC_BLIT_STATUS: + logerror("fbc_w: BLIT_STATUS = %08x & %08x\n", data, mem_mask); + //COMBINE_DATA(&m_fbc.m_blit_status); + break; + case FBC_FONT: + logerror("fbc_w: FONT = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_font); + break; + + case FBC_X0: + logerror("fbc_w: X0 = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_x0); + break; + case FBC_Y0: + logerror("fbc_w: Y0 = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_y0); + break; + case FBC_Z0: + logerror("fbc_w: Z0 = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_z0); + break; + case FBC_COLOR0: + logerror("fbc_w: COLOR0 = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_color0); + break; + case FBC_X1: + logerror("fbc_w: X1 = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_x1); + break; + case FBC_Y1: + logerror("fbc_w: Y1 = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_y1); + break; + case FBC_Z1: + logerror("fbc_w: Z1 = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_z1); + break; + case FBC_COLOR1: + logerror("fbc_w: COLOR1 = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_color1); + break; + case FBC_X2: + logerror("fbc_w: X2 = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_x2); + break; + case FBC_Y2: + logerror("fbc_w: Y2 = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_y2); + break; + case FBC_Z2: + logerror("fbc_w: Z2 = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_z2); + break; + case FBC_COLOR2: + logerror("fbc_w: COLOR2 = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_color2); + break; + case FBC_X3: + logerror("fbc_w: X3 = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_x3); + break; + case FBC_Y3: + logerror("fbc_w: Y3 = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_y3); + break; + case FBC_Z3: + logerror("fbc_w: Z3 = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_z3); + break; + case FBC_COLOR3: + logerror("fbc_w: COLOR3 = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_color3); + break; + + case FBC_RASTER_OFFX: + logerror("fbc_w: RASTER_OFFX = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_raster_offx); + break; + case FBC_RASTER_OFFY: + logerror("fbc_w: RASTER_OFFY = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_raster_offy); + break; + case FBC_AUTOINCX: + logerror("fbc_w: AUTOINCX = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_autoincx); + break; + case FBC_AUTOINCY: + logerror("fbc_w: AUTOINCY = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_autoincy); + break; + case FBC_CLIP_MINX: + logerror("fbc_w: CLIP_MINX = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_clip_minx); + break; + case FBC_CLIP_MINY: + logerror("fbc_w: CLIP_MINY = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_clip_miny); + break; + case FBC_CLIP_MAXX: + logerror("fbc_w: CLIP_MAXX = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_clip_maxx); + break; + case FBC_CLIP_MAXY: + logerror("fbc_w: CLIP_MAXY (%08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_clip_maxy); + break; + + case FBC_FCOLOR: + logerror("fbc_w: FCOLOR = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_fcolor); + break; + case FBC_BCOLOR: + logerror("fbc_w: BCOLOR = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_bcolor); + break; + case FBC_RASTEROP: + COMBINE_DATA(&m_fbc.m_rasterop); + logerror("fbc_w: RASTEROP = %08x & %08x\n", data, mem_mask); + logerror(" RASTEROP_ROP00 = %d (%s)\n", fbc_rasterop_rop00(), rasterop_rop_name[fbc_rasterop_rop00()]); + logerror(" RASTEROP_ROP01 = %d (%s)\n", fbc_rasterop_rop01(), rasterop_rop_name[fbc_rasterop_rop01()]); + logerror(" RASTEROP_ROP10 = %d (%s)\n", fbc_rasterop_rop10(), rasterop_rop_name[fbc_rasterop_rop10()]); + logerror(" RASTEROP_ROP11 = %d (%s)\n", fbc_rasterop_rop11(), rasterop_rop_name[fbc_rasterop_rop11()]); + logerror(" RASTEROP_PLOT = %d (%s)\n", fbc_rasterop_plot(), rasterop_plot_name[fbc_rasterop_plot()]); + logerror(" RASTEROP_RAST = %d (%s)\n", fbc_rasterop_rast(), rasterop_rast_name[fbc_rasterop_rast()]); + logerror(" RASTEROP_ATTR = %d (%s)\n", fbc_rasterop_attr(), rasterop_attr_name[fbc_rasterop_attr()]); + logerror(" RASTEROP_POLYG = %d (%s)\n", fbc_rasterop_polyg(), rasterop_polyg_name[fbc_rasterop_polyg()]); + logerror(" RASTEROP_PATT = %d (%s)\n", fbc_rasterop_pattern(), rasterop_pattern_name[fbc_rasterop_pattern()]); + logerror(" RASTEROP_PIXEL = %d (%s)\n", fbc_rasterop_pixel(), rasterop_pixel_name[fbc_rasterop_pixel()]); + logerror(" RASTEROP_PLANE = %d (%s)\n", fbc_rasterop_plane(), rasterop_plane_name[fbc_rasterop_plane()]); + break; + case FBC_PLANE_MASK: + logerror("fbc_w: PLANE_MASK = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_plane_mask); + break; + case FBC_PIXEL_MASK: + logerror("fbc_w: PIXEL_MASK = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_pixel_mask); + break; + + case FBC_PATT_ALIGN: + logerror("fbc_w: PATT_ALIGN = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_patt_align); + break; + case FBC_PATTERN0: + logerror("fbc_w: PATTERN0 = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_pattern[0]); + break; + case FBC_PATTERN1: + logerror("fbc_w: PATTERN1 = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_pattern[1]); + break; + case FBC_PATTERN2: + logerror("fbc_w: PATTERN2 = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_pattern[2]); + break; + case FBC_PATTERN3: + logerror("fbc_w: PATTERN3 = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_pattern[3]); + break; + case FBC_PATTERN4: + logerror("fbc_w: PATTERN4 = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_pattern[4]); + break; + case FBC_PATTERN5: + logerror("fbc_w: PATTERN5 = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_pattern[5]); + break; + case FBC_PATTERN6: + logerror("fbc_w: PATTERN6 = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_pattern[6]); + break; + case FBC_PATTERN7: + logerror("fbc_w: PATTERN7 = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_pattern[7]); + break; + + case FBC_IPOINT_ABSX: + logerror("fbc_w: IPOINT_ABSX = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_ipoint_absx); + break; + case FBC_IPOINT_ABSY: + logerror("fbc_w: IPOINT_ABSY = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_ipoint_absy); + break; + case FBC_IPOINT_ABSZ: + logerror("fbc_w: IPOINT_ABSZ = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_ipoint_absz); + break; + case FBC_IPOINT_RELX: + logerror("fbc_w: IPOINT_RELX = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_ipoint_relx); + break; + case FBC_IPOINT_RELY: + logerror("fbc_w: IPOINT_RELY = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_ipoint_rely); + break; + case FBC_IPOINT_RELZ: + logerror("fbc_w: IPOINT_RELZ = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_ipoint_relz); + break; + case FBC_IPOINT_R: + logerror("fbc_w: IPOINT_R = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_ipoint_r); + break; + case FBC_IPOINT_G: + logerror("fbc_w: IPOINT_G = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_ipoint_g); + break; + case FBC_IPOINT_B: + logerror("fbc_w: IPOINT_B = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_ipoint_b); + break; + case FBC_IPOINT_A: + logerror("fbc_w: IPOINT_A = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_ipoint_a); + break; + + case FBC_ILINE_ABSX: + logerror("fbc_w: ILINE_ABSX = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_iline_absx); + break; + case FBC_ILINE_ABSY: + logerror("fbc_w: ILINE_ABSY = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_iline_absy); + break; + case FBC_ILINE_ABSZ: + logerror("fbc_w: ILINE_ABSZ = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_iline_absz); + break; + case FBC_ILINE_RELX: + logerror("fbc_w: ILINE_RELX = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_iline_relx); + break; + case FBC_ILINE_RELY: + logerror("fbc_w: ILINE_RELY = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_iline_rely); + break; + case FBC_ILINE_RELZ: + logerror("fbc_w: ILINE_RELZ = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_iline_relz); + break; + case FBC_ILINE_R: + logerror("fbc_w: ILINE_R = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_iline_r); + break; + case FBC_ILINE_G: + logerror("fbc_w: ILINE_G = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_iline_g); + break; + case FBC_ILINE_B: + logerror("fbc_w: ILINE_B = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_iline_b); + break; + case FBC_ILINE_A: + logerror("fbc_w: ILINE_A = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_iline_a); + break; + + case FBC_ITRI_ABSX: + logerror("fbc_w: ITRI_ABSX = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_itri_absx); + break; + case FBC_ITRI_ABSY: + COMBINE_DATA(&m_fbc.m_itri_absy); + logerror("fbc_w: ITRI_ABSY = %08x & %08x\n", data, mem_mask); + break; + case FBC_ITRI_ABSZ: + logerror("fbc_w: ITRI_ABSZ = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_itri_absz); + break; + case FBC_ITRI_RELX: + logerror("fbc_w: ITRI_RELX = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_itri_relx); + break; + case FBC_ITRI_RELY: + logerror("fbc_w: ITRI_RELY = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_itri_rely); + break; + case FBC_ITRI_RELZ: + logerror("fbc_w: ITRI_RELZ = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_itri_relz); + break; + case FBC_ITRI_R: + logerror("fbc_w: ITRI_R = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_itri_r); + break; + case FBC_ITRI_G: + logerror("fbc_w: ITRI_G = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_itri_g); + break; + case FBC_ITRI_B: + logerror("fbc_w: ITRI_B = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_itri_b); + break; + case FBC_ITRI_A: + logerror("fbc_w: ITRI_A = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_itri_a); + break; + + case FBC_IQUAD_ABSX: + logerror("fbc_w: IQUAD_ABSX = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_iquad_absx); + break; + case FBC_IQUAD_ABSY: + logerror("fbc_w: IQUAD_ABSY = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_iquad_absy); + break; + case FBC_IQUAD_ABSZ: + logerror("fbc_w: IQUAD_ABSZ = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_iquad_absz); + break; + case FBC_IQUAD_RELX: + logerror("fbc_w: IQUAD_RELX = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_iquad_relx); + break; + case FBC_IQUAD_RELY: + logerror("fbc_w: IQUAD_RELY = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_iquad_rely); + break; + case FBC_IQUAD_RELZ: + logerror("fbc_w: IQUAD_RELZ = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_iquad_relz); + break; + case FBC_IQUAD_R: + logerror("fbc_w: IQUAD_R = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_iquad_r); + break; + case FBC_IQUAD_G: + logerror("fbc_w: IQUAD_G = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_iquad_g); + break; + case FBC_IQUAD_B: + logerror("fbc_w: IQUAD_B = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_iquad_b); + break; + case FBC_IQUAD_A: + logerror("fbc_w: IQUAD_A = %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_fbc.m_iquad_a); + break; + + case FBC_IRECT_ABSX: + logerror("fbc_w: IRECT_ABSX = %08x & %08x\n", data, mem_mask); + m_fbc.m_prim_buf[m_fbc.m_vertex_count].m_absx = data; + m_fbc.m_vertex_count++; + m_fbc.m_curr_prim_type = PRIM_RECT; + break; + case FBC_IRECT_ABSY: + logerror("fbc_w: IRECT_ABSY = %08x & %08x\n", data, mem_mask); + m_fbc.m_prim_buf[m_fbc.m_vertex_count].m_absy = data; + break; + case FBC_IRECT_ABSZ: + logerror("fbc_w: IRECT_ABSZ = %08x & %08x\n", data, mem_mask); + m_fbc.m_prim_buf[m_fbc.m_vertex_count].m_absz = data; + break; + case FBC_IRECT_RELX: + logerror("fbc_w: IRECT_RELX = %08x & %08x\n", data, mem_mask); + m_fbc.m_prim_buf[m_fbc.m_vertex_count].m_relx = data; + break; + case FBC_IRECT_RELY: + logerror("fbc_w: IRECT_RELY = %08x & %08x\n", data, mem_mask); + m_fbc.m_prim_buf[m_fbc.m_vertex_count].m_rely = data; + break; + case FBC_IRECT_RELZ: + logerror("fbc_w: IRECT_RELZ = %08x & %08x\n", data, mem_mask); + m_fbc.m_prim_buf[m_fbc.m_vertex_count].m_relz = data; + break; + case FBC_IRECT_R: + logerror("fbc_w: IRECT_R = %08x & %08x\n", data, mem_mask); + m_fbc.m_prim_buf[m_fbc.m_vertex_count].m_r = data; + break; + case FBC_IRECT_G: + logerror("fbc_w: IRECT_G = %08x & %08x\n", data, mem_mask); + m_fbc.m_prim_buf[m_fbc.m_vertex_count].m_g = data; + break; + case FBC_IRECT_B: + logerror("fbc_w: IRECT_B = %08x & %08x\n", data, mem_mask); + m_fbc.m_prim_buf[m_fbc.m_vertex_count].m_b = data; + break; + case FBC_IRECT_A: + logerror("fbc_w: IRECT_A = %08x & %08x\n", data, mem_mask); + m_fbc.m_prim_buf[m_fbc.m_vertex_count].m_a = data; + break; + + default: + logerror("fbc_w: Unknown register %08x = %08x & %08x\n", 0x00700000 | (offset << 2), data, mem_mask); + break; + } +} + +//------------------------------------------------- +// TurboGX implementation +//------------------------------------------------- + +void sbus_turbogx_device::mem_map(address_map &map) +{ + base_map(map); + map(0x00800000, 0x008fffff).rw(FUNC(sbus_turbogx_device::vram_r), FUNC(sbus_turbogx_device::vram_w)); +} + +ROM_START( sbus_turbogx ) + ROM_REGION32_BE(0x8000, "prom", ROMREGION_ERASEFF) + ROM_LOAD( "sunw,501-2325.bin", 0x0000, 0x8000, CRC(bbdc45f8) SHA1(e4a51d78e199cd57f2fcb9d45b25dfae2bd537e4)) +ROM_END + +const tiny_rom_entry *sbus_turbogx_device::device_rom_region() const +{ + return ROM_NAME( sbus_turbogx ); +} + +void sbus_turbogx_device::device_add_mconfig(machine_config &config) +{ + SCREEN(config, m_screen, SCREEN_TYPE_RASTER); + m_screen->set_screen_update(FUNC(sbus_turbogx_device::screen_update)); + m_screen->set_size(1152, 900); + m_screen->set_visarea(0, 1152-1, 0, 900-1); + m_screen->set_refresh_hz(72); + + BT458(config, m_ramdac, 0); +} + +sbus_turbogx_device::sbus_turbogx_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : sbus_cgsix_device(mconfig, SBUS_TURBOGX, tag, owner, clock, 0x100000) +{ +} + +void sbus_turbogx_device::install_device() +{ + m_sbus->install_device(m_base, m_base + 0x1ffffff, *this, &sbus_turbogx_device::mem_map); +} + +//------------------------------------------------- +// TurboGX+ implementation +//------------------------------------------------- + +void sbus_turbogxp_device::mem_map(address_map &map) +{ + base_map(map); + map(0x00800000, 0x00bfffff).rw(FUNC(sbus_turbogxp_device::vram_r), FUNC(sbus_turbogxp_device::vram_w)); +} + +ROM_START( sbus_turbogxp ) + ROM_REGION32_BE(0x8000, "prom", ROMREGION_ERASEFF) + ROM_LOAD( "sunw,501-2253.bin", 0x0000, 0x8000, CRC(525a58db) SHA1(721fc378d4b952b5cbb271e16bd67bc02439efdc)) +ROM_END + +const tiny_rom_entry *sbus_turbogxp_device::device_rom_region() const +{ + return ROM_NAME( sbus_turbogxp ); +} + +void sbus_turbogxp_device::device_add_mconfig(machine_config &config) +{ + SCREEN(config, m_screen, SCREEN_TYPE_RASTER); + m_screen->set_screen_update(FUNC(sbus_turbogxp_device::screen_update)); + m_screen->set_size(1152, 900); + m_screen->set_visarea(0, 1152-1, 0, 900-1); + m_screen->set_refresh_hz(72); + + BT467(config, m_ramdac, 0); +} + +sbus_turbogxp_device::sbus_turbogxp_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : sbus_cgsix_device(mconfig, SBUS_TURBOGXP, tag, owner, clock, 0x400000) +{ +} + +void sbus_turbogxp_device::install_device() +{ + m_sbus->install_device(m_base, m_base + 0x1ffffff, *this, &sbus_turbogxp_device::mem_map); +} + diff --git a/src/devices/bus/sbus/cgsix.h b/src/devices/bus/sbus/cgsix.h new file mode 100644 index 00000000000..681896c2744 --- /dev/null +++ b/src/devices/bus/sbus/cgsix.h @@ -0,0 +1,512 @@ +// license:BSD-3-Clause +// copyright-holders:Ryan Holtz +/*************************************************************************** + + Sun cgsix-series accelerated 8-bit color video controller + +***************************************************************************/ + +#ifndef MAME_BUS_SBUS_CGSIX_H +#define MAME_BUS_SBUS_CGSIX_H + +#pragma once + +#include "sbus.h" +#include "video/bt45x.h" +#include "screen.h" + +class sbus_cgsix_device : public device_t, public device_sbus_card_interface +{ +protected: + // construction/destruction + sbus_cgsix_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, const uint32_t vram_size) + : sbus_cgsix_device(mconfig, type, tag, owner, clock) + { + set_vram_size(vram_size); + } + + sbus_cgsix_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); + + // configuration + void set_vram_size(uint32_t vram_size) { m_vram_size = vram_size; } + + // device_t overrides + virtual void device_start() override; + virtual void device_reset() override; + + DECLARE_READ32_MEMBER(rom_r); + DECLARE_READ32_MEMBER(unknown_r); + DECLARE_WRITE32_MEMBER(unknown_w); + DECLARE_READ32_MEMBER(vram_r); + DECLARE_WRITE32_MEMBER(vram_w); + DECLARE_READ32_MEMBER(fbc_r); + DECLARE_WRITE32_MEMBER(fbc_w); + +protected: + uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); + uint8_t perform_rasterop(uint8_t src, uint8_t dst); + void handle_blit_command(); + void handle_draw_command(); + + void base_map(address_map &map); + + enum + { + ROP_CLR = 0x00, + ROP_SRC_NOR_DST = 0x01, + ROP_NSRC_AND_DST = 0x02, + ROP_NOT_SRC = 0x03, + ROP_SRC_AND_NDST = 0x04, + ROP_NOT_DST = 0x05, + ROP_SRC_XOR_DST = 0x06, + ROP_SRC_NAND_DST = 0x07, + ROP_SRC_AND_DST = 0x08, + ROP_SRC_XNOR_DST = 0x09, + ROP_DST = 0x0a, + ROP_NSRC_OR_DST = 0x0b, + ROP_SRC = 0x0c, + ROP_SRC_OR_NDST = 0x0d, + ROP_SRC_OR_DST = 0x0e, + ROP_SET = 0x0f + }; + + enum + { + FBC_MISC_INDEX_SHIFT = 4, + FBC_MISC_INDEX_MOD_SHIFT = 6, + FBC_MISC_BDISP_SHIFT = 7, + FBC_MISC_BREAD_SHIFT = 9, + FBC_MISC_BWRITE1_SHIFT = 11, + FBC_MISC_BWRITE0_SHIFT = 13, + FBC_MISC_DRAW_SHIFT = 15, + FBC_MISC_DATA_SHIFT = 17, + FBC_MISC_VBLANK_SHIFT = 19, + FBC_MISC_BLIT_SHIFT = 20 + }; + + enum + { + FBC_MISC_INDEX_MASK = 0x3, + FBC_MISC_INDEX_MOD_MASK = 0x1, + FBC_MISC_BDISP_MASK = 0x3, + FBC_MISC_BREAD_MASK = 0x3, + FBC_MISC_BWRITE1_MASK = 0x3, + FBC_MISC_BWRITE0_MASK = 0x3, + FBC_MISC_DRAW_MASK = 0x3, + FBC_MISC_DATA_MASK = 0x3, + FBC_MISC_VBLANK_MASK = 0x1, + FBC_MISC_BLIT_MASK = 0x3 + }; + + enum + { + FBC_MISC_BDISP_IGNORE = 0, + FBC_MISC_BDISP_0 = 1, + FBC_MISC_BDISP_1 = 2, + FBC_MISC_BDISP_ILLEGAL = 3, + + FBC_MISC_BREAD_IGNORE = 0, + FBC_MISC_BREAD_0 = 1, + FBC_MISC_BREAD_1 = 2, + FBC_MISC_BREAD_ILLEGAL = 3, + + FBC_MISC_BWRITE1_IGNORE = 0, + FBC_MISC_BWRITE1_ENABLE = 1, + FBC_MISC_BWRITE1_DISABLE = 2, + FBC_MISC_BWRITE1_ILLEGAL = 3, + + FBC_MISC_BWRITE0_IGNORE = 0, + FBC_MISC_BWRITE0_ENABLE = 1, + FBC_MISC_BWRITE0_DISABLE = 2, + FBC_MISC_BWRITE0_ILLEGAL = 3, + + FBC_MISC_DRAW_IGNORE = 0, + FBC_MISC_DRAW_RENDER = 1, + FBC_MISC_DRAW_PICK = 2, + FBC_MISC_DRAW_ILLEGAL = 3, + + FBC_MISC_DATA_IGNORE = 0, + FBC_MISC_DATA_COLOR8 = 1, + FBC_MISC_DATA_COLOR1 = 2, + FBC_MISC_DATA_HRMONO = 3, + + FBC_MISC_BLIT_IGNORE = 0, + FBC_MISC_BLIT_NOSRC = 1, + FBC_MISC_BLIT_SRC = 2, + FBC_MISC_BLIT_ILLEGAL = 3 + }; + + inline uint32_t fbc_misc_index() { return (m_fbc.m_misc >> FBC_MISC_INDEX_SHIFT) & FBC_MISC_INDEX_MASK; } + inline uint32_t fbc_misc_index_mod() { return (m_fbc.m_misc >> FBC_MISC_INDEX_MOD_SHIFT) & FBC_MISC_INDEX_MOD_MASK; } + inline uint32_t fbc_misc_bdisp() { return (m_fbc.m_misc >> FBC_MISC_BDISP_SHIFT) & FBC_MISC_BDISP_MASK; } + inline uint32_t fbc_misc_bread() { return (m_fbc.m_misc >> FBC_MISC_BREAD_SHIFT) & FBC_MISC_BREAD_MASK; } + inline uint32_t fbc_misc_bwrite1() { return (m_fbc.m_misc >> FBC_MISC_BWRITE1_SHIFT) & FBC_MISC_BWRITE1_MASK; } + inline uint32_t fbc_misc_bwrite0() { return (m_fbc.m_misc >> FBC_MISC_BWRITE0_SHIFT) & FBC_MISC_BWRITE0_MASK; } + inline uint32_t fbc_misc_draw() { return (m_fbc.m_misc >> FBC_MISC_DRAW_SHIFT) & FBC_MISC_DRAW_MASK; } + inline uint32_t fbc_misc_data() { return (m_fbc.m_misc >> FBC_MISC_DATA_SHIFT) & FBC_MISC_DATA_MASK; } + inline uint32_t fbc_misc_blit() { return (m_fbc.m_misc >> FBC_MISC_BLIT_SHIFT) & FBC_MISC_BLIT_MASK; } + + enum + { + FBC_RASTEROP_ROP00_SHIFT = 0, + FBC_RASTEROP_ROP01_SHIFT = 4, + FBC_RASTEROP_ROP10_SHIFT = 8, + FBC_RASTEROP_ROP11_SHIFT = 12, + FBC_RASTEROP_PLOT_SHIFT = 16, + FBC_RASTEROP_RAST_SHIFT = 17, + FBC_RASTEROP_ATTR_SHIFT = 22, + FBC_RASTEROP_POLYG_SHIFT = 24, + FBC_RASTEROP_PATT_SHIFT = 26, + FBC_RASTEROP_PIXEL_SHIFT = 28, + FBC_RASTEROP_PLANE_SHIFT = 30 + }; + + enum + { + FBC_RASTEROP_ROP00_MASK = 0xf, + FBC_RASTEROP_ROP01_MASK = 0xf, + FBC_RASTEROP_ROP10_MASK = 0xf, + FBC_RASTEROP_ROP11_MASK = 0xf, + FBC_RASTEROP_PLOT_MASK = 0x1, + FBC_RASTEROP_RAST_MASK = 0x1, + FBC_RASTEROP_ATTR_MASK = 0x3, + FBC_RASTEROP_POLYG_MASK = 0x3, + FBC_RASTEROP_PATT_MASK = 0x3, + FBC_RASTEROP_PIXEL_MASK = 0x3, + FBC_RASTEROP_PLANE_MASK = 0x3 + }; + + enum + { + FBC_RASTEROP_PLOT_PLOT = 0, + FBC_RASTEROP_PLOT_UNPLOT = 1, + + FBC_RASTEROP_RAST_BOOL = 0, + FBC_RASTEROP_RAST_LINEAR = 1, + + FBC_RASTEROP_ATTR_IGNORE = 0, + FBC_RASTEROP_ATTR_UNSUPP = 1, + FBC_RASTEROP_ATTR_SUPP = 2, + FBC_RASTEROP_ATTR_ILLEGAL = 3, + + FBC_RASTEROP_POLYG_IGNORE = 0, + FBC_RASTEROP_POLYG_OVERLAP = 1, + FBC_RASTEROP_POLYG_NONOVERLAP = 2, + FBC_RASTEROP_POLYG_ILLEGAL = 3, + + FBC_RASTEROP_PATTERN_IGNORE = 0, + FBC_RASTEROP_PATTERN_ZEROES = 1, + FBC_RASTEROP_PATTERN_ONES = 2, + FBC_RASTEROP_PATTERN_MSK = 3, + + FBC_RASTEROP_PIXEL_IGNORE = 0, + FBC_RASTEROP_PIXEL_ZEROES = 1, + FBC_RASTEROP_PIXEL_ONES = 2, + FBC_RASTEROP_PIXEL_MSK = 3, + + FBC_RASTEROP_PLANE_IGNORE = 0, + FBC_RASTEROP_PLANE_ZEROES = 1, + FBC_RASTEROP_PLANE_ONES = 2, + FBC_RASTEROP_PLANE_MSK = 3 + }; + + inline uint32_t fbc_rasterop_rop00() { return (m_fbc.m_rasterop >> FBC_RASTEROP_ROP00_SHIFT) & FBC_RASTEROP_ROP00_MASK; } + inline uint32_t fbc_rasterop_rop01() { return (m_fbc.m_rasterop >> FBC_RASTEROP_ROP01_SHIFT) & FBC_RASTEROP_ROP01_MASK; } + inline uint32_t fbc_rasterop_rop10() { return (m_fbc.m_rasterop >> FBC_RASTEROP_ROP10_SHIFT) & FBC_RASTEROP_ROP10_MASK; } + inline uint32_t fbc_rasterop_rop11() { return (m_fbc.m_rasterop >> FBC_RASTEROP_ROP11_SHIFT) & FBC_RASTEROP_ROP11_MASK; } + inline uint32_t fbc_rasterop_plot() { return (m_fbc.m_rasterop >> FBC_RASTEROP_PLOT_SHIFT) & FBC_RASTEROP_PLOT_MASK; } + inline uint32_t fbc_rasterop_rast() { return (m_fbc.m_rasterop >> FBC_RASTEROP_RAST_SHIFT) & FBC_RASTEROP_RAST_MASK; } + inline uint32_t fbc_rasterop_attr() { return (m_fbc.m_rasterop >> FBC_RASTEROP_ATTR_SHIFT) & FBC_RASTEROP_ATTR_MASK; } + inline uint32_t fbc_rasterop_polyg() { return (m_fbc.m_rasterop >> FBC_RASTEROP_POLYG_SHIFT) & FBC_RASTEROP_POLYG_MASK; } + inline uint32_t fbc_rasterop_pattern() { return (m_fbc.m_rasterop >> FBC_RASTEROP_PATT_SHIFT) & FBC_RASTEROP_PATT_MASK; } + inline uint32_t fbc_rasterop_pixel() { return (m_fbc.m_rasterop >> FBC_RASTEROP_PIXEL_SHIFT) & FBC_RASTEROP_PIXEL_MASK; } + inline uint32_t fbc_rasterop_plane() { return (m_fbc.m_rasterop >> FBC_RASTEROP_PLANE_SHIFT) & FBC_RASTEROP_PLANE_MASK; } + + enum + { + FBC_MISC = 0x004/4, + FBC_CLIP_CHECK = 0x008/4, + + FBC_STATUS = 0x010/4, + FBC_DRAW_STATUS = 0x014/4, + FBC_BLIT_STATUS = 0x018/4, + FBC_FONT = 0x01c/4, + + FBC_X0 = 0x080/4, + FBC_Y0 = 0x084/4, + FBC_Z0 = 0x088/4, + FBC_COLOR0 = 0x08c/4, + FBC_X1 = 0x090/4, + FBC_Y1 = 0x094/4, + FBC_Z1 = 0x098/4, + FBC_COLOR1 = 0x09c/4, + FBC_X2 = 0x0a0/4, + FBC_Y2 = 0x0a4/4, + FBC_Z2 = 0x0a8/4, + FBC_COLOR2 = 0x0ac/4, + FBC_X3 = 0x0b0/4, + FBC_Y3 = 0x0b4/4, + FBC_Z3 = 0x0b8/4, + FBC_COLOR3 = 0x0bc/4, + + FBC_RASTER_OFFX = 0x0c0/4, + FBC_RASTER_OFFY = 0x0c4/4, + FBC_AUTOINCX = 0x0d0/4, + FBC_AUTOINCY = 0x0d4/4, + FBC_CLIP_MINX = 0x0e0/4, + FBC_CLIP_MINY = 0x0e4/4, + FBC_CLIP_MAXX = 0x0f0/4, + FBC_CLIP_MAXY = 0x0f4/4, + + FBC_FCOLOR = 0x100/4, + FBC_BCOLOR = 0x104/4, + FBC_RASTEROP = 0x108/4, + FBC_PLANE_MASK = 0x10c/4, + FBC_PIXEL_MASK = 0x110/4, + + FBC_PATT_ALIGN = 0x11c/4, + FBC_PATTERN0 = 0x120/4, + FBC_PATTERN1 = 0x124/4, + FBC_PATTERN2 = 0x128/4, + FBC_PATTERN3 = 0x12c/4, + FBC_PATTERN4 = 0x130/4, + FBC_PATTERN5 = 0x134/4, + FBC_PATTERN6 = 0x138/4, + FBC_PATTERN7 = 0x13c/4, + + FBC_IPOINT_ABSX = 0x800/4, + FBC_IPOINT_ABSY = 0x804/4, + FBC_IPOINT_ABSZ = 0x808/4, + FBC_IPOINT_RELX = 0x810/4, + FBC_IPOINT_RELY = 0x814/4, + FBC_IPOINT_RELZ = 0x818/4, + FBC_IPOINT_R = 0x830/4, + FBC_IPOINT_G = 0x834/4, + FBC_IPOINT_B = 0x838/4, + FBC_IPOINT_A = 0x83c/4, + + FBC_ILINE_ABSX = 0x840/4, + FBC_ILINE_ABSY = 0x844/4, + FBC_ILINE_ABSZ = 0x848/4, + FBC_ILINE_RELX = 0x850/4, + FBC_ILINE_RELY = 0x854/4, + FBC_ILINE_RELZ = 0x858/4, + FBC_ILINE_R = 0x870/4, + FBC_ILINE_G = 0x874/4, + FBC_ILINE_B = 0x878/4, + FBC_ILINE_A = 0x87c/4, + + FBC_ITRI_ABSX = 0x880/4, + FBC_ITRI_ABSY = 0x884/4, + FBC_ITRI_ABSZ = 0x888/4, + FBC_ITRI_RELX = 0x890/4, + FBC_ITRI_RELY = 0x894/4, + FBC_ITRI_RELZ = 0x898/4, + FBC_ITRI_R = 0x8b0/4, + FBC_ITRI_G = 0x8b4/4, + FBC_ITRI_B = 0x8b8/4, + FBC_ITRI_A = 0x8bc/4, + + FBC_IQUAD_ABSX = 0x8c0/4, + FBC_IQUAD_ABSY = 0x8c4/4, + FBC_IQUAD_ABSZ = 0x8c8/4, + FBC_IQUAD_RELX = 0x8d0/4, + FBC_IQUAD_RELY = 0x8d4/4, + FBC_IQUAD_RELZ = 0x8d8/4, + FBC_IQUAD_R = 0x8f0/4, + FBC_IQUAD_G = 0x8f4/4, + FBC_IQUAD_B = 0x8f8/4, + FBC_IQUAD_A = 0x8fc/4, + + FBC_IRECT_ABSX = 0x900/4, + FBC_IRECT_ABSY = 0x904/4, + FBC_IRECT_ABSZ = 0x908/4, + FBC_IRECT_RELX = 0x910/4, + FBC_IRECT_RELY = 0x914/4, + FBC_IRECT_RELZ = 0x918/4, + FBC_IRECT_R = 0x930/4, + FBC_IRECT_G = 0x934/4, + FBC_IRECT_B = 0x938/4, + FBC_IRECT_A = 0x93c/4, + }; + + struct vertex_t + { + uint32_t m_absx; + uint32_t m_absy; + uint32_t m_absz; + uint32_t m_relx; + uint32_t m_rely; + uint32_t m_relz; + uint32_t m_r; + uint32_t m_g; + uint32_t m_b; + uint32_t m_a; + }; + + enum prim_type + { + PRIM_POINT = 0, + PRIM_LINE, + PRIM_TRI, + PRIM_QUAD, + PRIM_RECT, + + PRIM_COUNT + }; + + struct fbc_t + { + uint32_t m_misc; + uint32_t m_clip_check; + uint32_t m_status; + uint32_t m_draw_status; + uint32_t m_blit_status; + uint32_t m_font; + + uint32_t m_x0; + uint32_t m_y0; + uint32_t m_z0; + uint32_t m_color0; + uint32_t m_x1; + uint32_t m_y1; + uint32_t m_z1; + uint32_t m_color1; + uint32_t m_x2; + uint32_t m_y2; + uint32_t m_z2; + uint32_t m_color2; + uint32_t m_x3; + uint32_t m_y3; + uint32_t m_z3; + uint32_t m_color3; + + uint32_t m_raster_offx; + uint32_t m_raster_offy; + + uint32_t m_autoincx; + uint32_t m_autoincy; + + uint32_t m_clip_minx; + uint32_t m_clip_miny; + + uint32_t m_clip_maxx; + uint32_t m_clip_maxy; + + uint8_t m_fcolor; + uint8_t m_bcolor; + + uint32_t m_rasterop; + + uint32_t m_plane_mask; + uint32_t m_pixel_mask; + + uint32_t m_patt_align; + uint32_t m_pattern[8]; + + uint32_t m_ipoint_absx; + uint32_t m_ipoint_absy; + uint32_t m_ipoint_absz; + uint32_t m_ipoint_relx; + uint32_t m_ipoint_rely; + uint32_t m_ipoint_relz; + uint32_t m_ipoint_r; + uint32_t m_ipoint_g; + uint32_t m_ipoint_b; + uint32_t m_ipoint_a; + + uint32_t m_iline_absx; + uint32_t m_iline_absy; + uint32_t m_iline_absz; + uint32_t m_iline_relx; + uint32_t m_iline_rely; + uint32_t m_iline_relz; + uint32_t m_iline_r; + uint32_t m_iline_g; + uint32_t m_iline_b; + uint32_t m_iline_a; + + uint32_t m_itri_absx; + uint32_t m_itri_absy; + uint32_t m_itri_absz; + uint32_t m_itri_relx; + uint32_t m_itri_rely; + uint32_t m_itri_relz; + uint32_t m_itri_r; + uint32_t m_itri_g; + uint32_t m_itri_b; + uint32_t m_itri_a; + + uint32_t m_iquad_absx; + uint32_t m_iquad_absy; + uint32_t m_iquad_absz; + uint32_t m_iquad_relx; + uint32_t m_iquad_rely; + uint32_t m_iquad_relz; + uint32_t m_iquad_r; + uint32_t m_iquad_g; + uint32_t m_iquad_b; + uint32_t m_iquad_a; + + uint32_t m_irect_absx; + uint32_t m_irect_absy; + uint32_t m_irect_absz; + uint32_t m_irect_relx; + uint32_t m_irect_rely; + uint32_t m_irect_relz; + uint32_t m_irect_r; + uint32_t m_irect_g; + uint32_t m_irect_b; + uint32_t m_irect_a; + + vertex_t m_prim_buf[0x1000]; // unknown size + uint32_t m_vertex_count; + prim_type m_curr_prim_type; + }; + + required_memory_region m_rom; + std::unique_ptr m_vram; + required_device m_screen; + required_device m_ramdac; + + fbc_t m_fbc; + + uint32_t m_vram_size; +}; + +class sbus_turbogx_device : public sbus_cgsix_device +{ +public: + sbus_turbogx_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + +protected: + // device_t overrides + virtual const tiny_rom_entry *device_rom_region() const override; + void device_add_mconfig(machine_config &config) override; + + // device_sbus_slot_interface overrides + virtual void install_device() override; + + void mem_map(address_map &map) override; +}; + +class sbus_turbogxp_device : public sbus_cgsix_device +{ +public: + sbus_turbogxp_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + +protected: + // device_t overrides + virtual const tiny_rom_entry *device_rom_region() const override; + void device_add_mconfig(machine_config &config) override; + + // device_sbus_slot_interface overrides + virtual void install_device() override; + + void mem_map(address_map &map) override; +}; + +DECLARE_DEVICE_TYPE(SBUS_TURBOGX, sbus_turbogx_device) +DECLARE_DEVICE_TYPE(SBUS_TURBOGXP, sbus_turbogxp_device) + +#endif // MAME_BUS_SBUS_CGSIX_H diff --git a/src/devices/bus/sbus/cgthree.h b/src/devices/bus/sbus/cgthree.h index 113f5b14492..df016a55de7 100644 --- a/src/devices/bus/sbus/cgthree.h +++ b/src/devices/bus/sbus/cgthree.h @@ -50,7 +50,7 @@ private: required_device m_ramdac; }; -// device type definition + DECLARE_DEVICE_TYPE(SBUS_CGTHREE, sbus_cgthree_device) #endif // MAME_BUS_SBUS_CGTHREE_H diff --git a/src/devices/bus/sbus/hme.h b/src/devices/bus/sbus/hme.h index 9c1506d37a2..c3bb4ff2dfd 100644 --- a/src/devices/bus/sbus/hme.h +++ b/src/devices/bus/sbus/hme.h @@ -39,7 +39,7 @@ private: required_memory_region m_rom; }; -// device type definition + DECLARE_DEVICE_TYPE(SBUS_HME, sbus_hme_device) #endif // MAME_BUS_SBUS_HME_H diff --git a/src/devices/bus/sbus/sbus.cpp b/src/devices/bus/sbus/sbus.cpp index 0adb7159418..940e1931d8a 100644 --- a/src/devices/bus/sbus/sbus.cpp +++ b/src/devices/bus/sbus/sbus.cpp @@ -11,7 +11,7 @@ // Display boards #include "bwtwo.h" #include "cgthree.h" -#include "turbogx.h" +#include "cgsix.h" // Accelerator boards #include "sunpc.h" @@ -23,11 +23,12 @@ void sbus_cards(device_slot_interface &device) { - device.option_add("bwtwo", SBUS_BWTWO); /* Sun bwtwo monochrome display board */ - device.option_add("cgthree", SBUS_CGTHREE); /* Sun cgthree color display board */ - device.option_add("turbogx", SBUS_TURBOGX); /* Sun TurboGX 8-bit color display board */ - device.option_add("sunpc", SBUS_SUNPC); /* Sun SunPC 5x86 Accelerator board */ - device.option_add("hme", SBUS_HME); /* Sun SunSwift 10/100 + Fast Wide SCSI "Colossus" board */ + device.option_add("bwtwo", SBUS_BWTWO); /* Sun bwtwo monochrome display board */ + device.option_add("cgthree", SBUS_CGTHREE); /* Sun cgthree color display board */ + device.option_add("turbogx", SBUS_TURBOGX); /* Sun TurboGX 8-bit color display board */ + device.option_add("turbogxp", SBUS_TURBOGXP); /* Sun TurboGX+ 8-bit color display board */ + device.option_add("sunpc", SBUS_SUNPC); /* Sun SunPC 5x86 Accelerator board */ + device.option_add("hme", SBUS_HME); /* Sun SunSwift 10/100 + Fast Wide SCSI "Colossus" board */ } DEFINE_DEVICE_TYPE(SBUS_SLOT, sbus_slot_device, "sbus_slot", "Sun SBus Slot") diff --git a/src/devices/bus/sbus/sunpc.h b/src/devices/bus/sbus/sunpc.h index 3acc500827d..8c20c1be27e 100644 --- a/src/devices/bus/sbus/sunpc.h +++ b/src/devices/bus/sbus/sunpc.h @@ -39,7 +39,7 @@ private: required_memory_region m_rom; }; -// device type definition + DECLARE_DEVICE_TYPE(SBUS_SUNPC, sbus_sunpc_device) #endif // MAME_BUS_SBUS_SUNPC_H diff --git a/src/devices/bus/sbus/turbogx.cpp b/src/devices/bus/sbus/turbogx.cpp deleted file mode 100644 index 93608458814..00000000000 --- a/src/devices/bus/sbus/turbogx.cpp +++ /dev/null @@ -1,974 +0,0 @@ -// license:BSD-3-Clause -// copyright-holders:Ryan Holtz -/*************************************************************************** - - Sun TurboGX accelerated 8-bit color video controller - -***************************************************************************/ - -#include "emu.h" -#include "turbogx.h" -#include "screen.h" - -DEFINE_DEVICE_TYPE(SBUS_TURBOGX, sbus_turbogx_device, "turbogx", "Sun TurboGX SBus Video") - -void sbus_turbogx_device::mem_map(address_map &map) -{ - map(0x00000000, 0x01ffffff).rw(FUNC(sbus_turbogx_device::unknown_r), FUNC(sbus_turbogx_device::unknown_w)); - map(0x00000000, 0x00007fff).r(FUNC(sbus_turbogx_device::rom_r)); - map(0x00200000, 0x0020000f).m(m_ramdac, FUNC(bt458_device::map)).umask32(0xff000000); - map(0x00700000, 0x00700fff).rw(FUNC(sbus_turbogx_device::fbc_r), FUNC(sbus_turbogx_device::fbc_w)); - map(0x00800000, 0x008fffff).rw(FUNC(sbus_turbogx_device::vram_r), FUNC(sbus_turbogx_device::vram_w)); -} - -ROM_START( sbus_turbogx ) - ROM_REGION32_BE(0x8000, "prom", ROMREGION_ERASEFF) - ROM_LOAD( "sunw,501-2325.bin", 0x0000, 0x8000, CRC(bbdc45f8) SHA1(e4a51d78e199cd57f2fcb9d45b25dfae2bd537e4)) -ROM_END - -const tiny_rom_entry *sbus_turbogx_device::device_rom_region() const -{ - return ROM_NAME( sbus_turbogx ); -} - -void sbus_turbogx_device::device_add_mconfig(machine_config &config) -{ - SCREEN(config, m_screen, SCREEN_TYPE_RASTER); - m_screen->set_screen_update(FUNC(sbus_turbogx_device::screen_update)); - m_screen->set_size(1152, 900); - m_screen->set_visarea(0, 1152-1, 0, 900-1); - m_screen->set_refresh_hz(72); - - BT458(config, m_ramdac, 0); -} - - -sbus_turbogx_device::sbus_turbogx_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : device_t(mconfig, SBUS_TURBOGX, tag, owner, clock) - , device_sbus_card_interface(mconfig, *this) - , m_rom(*this, "prom") - , m_screen(*this, "screen") - , m_ramdac(*this, "ramdac") -{ -} - -void sbus_turbogx_device::device_start() -{ - m_vram = std::make_unique(0x100000/4); -} - -void sbus_turbogx_device::device_reset() -{ - memset(&m_fbc, 0, sizeof(m_fbc)); -} - -void sbus_turbogx_device::install_device() -{ - m_sbus->install_device(m_base, m_base + 0x1ffffff, *this, &sbus_turbogx_device::mem_map); -} - -uint32_t sbus_turbogx_device::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) -{ - const pen_t *pens = m_ramdac->pens(); - uint8_t *vram = (uint8_t *)&m_vram[0]; - - for (int y = 0; y < 900; y++) - { - uint32_t *scanline = &bitmap.pix32(y); - for (int x = 0; x < 1152; x++) - { - const uint8_t pixel = vram[y * 1152 + BYTE4_XOR_BE(x)]; - *scanline++ = pens[pixel]; - } - } - - return 0; -} - -READ32_MEMBER(sbus_turbogx_device::rom_r) -{ - return ((uint32_t*)m_rom->base())[offset]; -} - -READ32_MEMBER(sbus_turbogx_device::unknown_r) -{ - logerror("%s: unknown_r: %08x & %08x\n", machine().describe_context(), offset << 2, mem_mask); - return 0; -} - -WRITE32_MEMBER(sbus_turbogx_device::unknown_w) -{ - logerror("%s: unknown_w: %08x = %08x & %08x\n", machine().describe_context(), offset << 2, data, mem_mask); -} - -READ32_MEMBER(sbus_turbogx_device::vram_r) -{ - return m_vram[offset]; -} - -WRITE32_MEMBER(sbus_turbogx_device::vram_w) -{ - COMBINE_DATA(&m_vram[offset]); -} - -uint8_t sbus_turbogx_device::perform_rasterop(uint8_t src, uint8_t dst) -{ - const uint32_t rops[4] = { fbc_rasterop_rop00(), fbc_rasterop_rop01(), fbc_rasterop_rop10(), fbc_rasterop_rop11() }; - - uint8_t result = 0; - //logerror("src:%02x dst:%02x\n", src, dst); - for (int bit = 0; bit < 8; bit++) - { - const uint8_t mask = (1 << bit); - const uint8_t f = BIT(m_fbc.m_fcolor, bit) << 1; - const uint8_t b = BIT(m_fbc.m_bcolor, bit); - const uint8_t s = src & mask; - const uint8_t d = dst & mask; - const uint32_t rop = rops[f | b]; - //logerror("f:%d b:%d s:%02x d:%02x rop:%d\n", f >> 1, b, s, d, rop); - - uint8_t value = 0; - switch (rop) - { - case ROP_CLR: break; - case ROP_SRC_NOR_DST: value = ~(s | d); break; - case ROP_NSRC_AND_DST: value = ~s & d; break; - case ROP_NOT_SRC: value = ~s; break; - case ROP_SRC_AND_NDST: value = s & ~d; break; - case ROP_NOT_DST: value = ~d; break; - case ROP_SRC_XOR_DST: value = s ^ d; break; - case ROP_SRC_NAND_DST: value = ~(s & d); break; - case ROP_SRC_AND_DST: value = s & d; break; - case ROP_SRC_XNOR_DST: value = ~(s ^ d); break; - case ROP_DST: value = d; break; - case ROP_NSRC_OR_DST: value = ~s | d; break; - case ROP_SRC: value = s; break; - case ROP_SRC_OR_NDST: value = s | ~d; break; - case ROP_SRC_OR_DST: value = s | d; break; - case ROP_SET: value = 0xff; break; - default: value = 0; break; - } - result |= value & mask; - } - return result; -} - -// NOTE: This is basically untested, and probably full of bugs! -void sbus_turbogx_device::handle_draw_command() -{ - if (fbc_misc_draw() != FBC_MISC_DRAW_RENDER) - { - logerror("handle_draw_command: Unsupported draw mode %d, abandoning draw\n", fbc_misc_draw()); - return; - } - - if (m_fbc.m_curr_prim_type != PRIM_RECT) - { - logerror("handle_draw_command: Unsupported prim type %d, abandoning draw\n", m_fbc.m_curr_prim_type); - return; - } - - if (m_fbc.m_vertex_count < 2) - { - logerror("handle_draw_command: Insufficient number of vertices queued, abandoning draw\n"); - return; - } - - uint8_t *vram = (uint8_t*)&m_vram[0]; - - uint32_t vindex = 0; - while (vindex < m_fbc.m_vertex_count) - { - vertex_t &v0 = m_fbc.m_prim_buf[vindex++]; - vertex_t &v1 = m_fbc.m_prim_buf[vindex++]; - - for (uint32_t y = v0.m_absy; y < v1.m_absy; y++) - { - const uint32_t line = y * (m_fbc.m_clip_maxx + 1); - for (uint32_t x = v0.m_absx; x < v1.m_absx; x++) - { - const uint8_t src = vram[line + x]; - const uint8_t dst = src; - const uint8_t result = perform_rasterop(src, dst); - vram[line + x] = result; - } - } - } - m_fbc.m_vertex_count = 0; -} - -// NOTE: This is basically untested, and probably full of bugs! -void sbus_turbogx_device::handle_blit_command() -{ - uint8_t *vram = (uint8_t*)&m_vram[0]; - const uint32_t fbw = (m_fbc.m_clip_maxx + 1); - logerror("Copying from %d,%d-%d,%d to %d,%d-%d,%d, width %d, height %d\n" - , m_fbc.m_x0, m_fbc.m_y0 - , m_fbc.m_x1, m_fbc.m_y1 - , m_fbc.m_x2, m_fbc.m_y2 - , m_fbc.m_x3, m_fbc.m_y3 - , m_fbc.m_clip_maxx, m_fbc.m_clip_maxy); - uint32_t srcy = m_fbc.m_y0; - uint32_t dsty = m_fbc.m_y2; - for (; srcy < m_fbc.m_y1; srcy++, dsty++) - { - uint32_t srcy_index = srcy * fbw; - uint32_t dsty_index = dsty * fbw; - uint32_t srcx = m_fbc.m_x0; - uint32_t dstx = m_fbc.m_x2; - for (; srcx < m_fbc.m_x1; srcx++, dstx++) - { - const uint8_t src = vram[srcy_index + srcx]; - const uint8_t dst = vram[dsty_index + dstx]; - const uint8_t result = perform_rasterop(src, dst); - //logerror("vram[%d] = %02x\n", result); - vram[dsty_index + dstx] = result; - } - } -} - -READ32_MEMBER(sbus_turbogx_device::fbc_r) -{ - uint32_t ret = 0; - switch (offset) - { - case FBC_MISC: - logerror("fbc_r: MISC (%08x & %08x)\n", m_fbc.m_misc, mem_mask); - return m_fbc.m_misc; - case FBC_CLIP_CHECK: - logerror("fbc_r: CLIP_CHECK (%08x & %08x)\n", m_fbc.m_clip_check, mem_mask); - return m_fbc.m_clip_check; - - case FBC_STATUS: - logerror("fbc_r: STATUS (%08x & %08x)\n", m_fbc.m_status, mem_mask); - return m_fbc.m_status; - case FBC_DRAW_STATUS: - logerror("fbc_r: DRAW_STATUS (%08x & %08x)\n", m_fbc.m_draw_status, mem_mask); - handle_draw_command(); - return m_fbc.m_draw_status; - case FBC_BLIT_STATUS: - logerror("fbc_r: BLIT_STATUS (%08x & %08x)\n", m_fbc.m_blit_status, mem_mask); - handle_blit_command(); - return m_fbc.m_blit_status; - case FBC_FONT: - logerror("fbc_r: FONT (%08x & %08x)\n", m_fbc.m_font, mem_mask); - return m_fbc.m_font; - - case FBC_X0: - logerror("fbc_r: X0 (%08x & %08x)\n", m_fbc.m_x0, mem_mask); - return m_fbc.m_x0; - case FBC_Y0: - logerror("fbc_r: Y0 (%08x & %08x)\n", m_fbc.m_y0, mem_mask); - return m_fbc.m_y0; - case FBC_Z0: - logerror("fbc_r: Z0 (%08x & %08x)\n", m_fbc.m_z0, mem_mask); - return m_fbc.m_z0; - case FBC_COLOR0: - logerror("fbc_r: COLOR0 (%08x & %08x)\n", m_fbc.m_color0, mem_mask); - return m_fbc.m_color0; - case FBC_X1: - logerror("fbc_r: X1 (%08x & %08x)\n", m_fbc.m_x1, mem_mask); - return m_fbc.m_x1; - case FBC_Y1: - logerror("fbc_r: Y1 (%08x & %08x)\n", m_fbc.m_y1, mem_mask); - return m_fbc.m_y1; - case FBC_Z1: - logerror("fbc_r: Z1 (%08x & %08x)\n", m_fbc.m_z1, mem_mask); - return m_fbc.m_z1; - case FBC_COLOR1: - logerror("fbc_r: COLOR1 (%08x & %08x)\n", m_fbc.m_color1, mem_mask); - return m_fbc.m_color1; - case FBC_X2: - logerror("fbc_r: X2 (%08x & %08x)\n", m_fbc.m_x2, mem_mask); - return m_fbc.m_x2; - case FBC_Y2: - logerror("fbc_r: Y2 (%08x & %08x)\n", m_fbc.m_y2, mem_mask); - return m_fbc.m_y2; - case FBC_Z2: - logerror("fbc_r: Z2 (%08x & %08x)\n", m_fbc.m_z2, mem_mask); - return m_fbc.m_z2; - case FBC_COLOR2: - logerror("fbc_r: COLOR2 (%08x & %08x)\n", m_fbc.m_color2, mem_mask); - return m_fbc.m_color2; - case FBC_X3: - logerror("fbc_r: X3 (%08x & %08x)\n", m_fbc.m_x3, mem_mask); - return m_fbc.m_x3; - case FBC_Y3: - logerror("fbc_r: Y3 (%08x & %08x)\n", m_fbc.m_y3, mem_mask); - return m_fbc.m_y3; - case FBC_Z3: - logerror("fbc_r: Z3 (%08x & %08x)\n", m_fbc.m_z3, mem_mask); - return m_fbc.m_z3; - case FBC_COLOR3: - logerror("fbc_r: COLOR3 (%08x & %08x)\n", m_fbc.m_color3, mem_mask); - return m_fbc.m_color3; - - case FBC_RASTER_OFFX: - logerror("fbc_r: RASTER_OFFX (%08x & %08x)\n", m_fbc.m_raster_offx, mem_mask); - return m_fbc.m_raster_offx; - case FBC_RASTER_OFFY: - logerror("fbc_r: RASTER_OFFY (%08x & %08x)\n", m_fbc.m_raster_offy, mem_mask); - return m_fbc.m_raster_offy; - case FBC_AUTOINCX: - logerror("fbc_r: AUTOINCX (%08x & %08x)\n", m_fbc.m_autoincx, mem_mask); - return m_fbc.m_autoincx; - case FBC_AUTOINCY: - logerror("fbc_r: AUTOINCY (%08x & %08x)\n", m_fbc.m_autoincy, mem_mask); - return m_fbc.m_autoincy; - case FBC_CLIP_MINX: - logerror("fbc_r: CLIP_MINX (%08x & %08x)\n", m_fbc.m_clip_minx, mem_mask); - return m_fbc.m_clip_minx; - case FBC_CLIP_MINY: - logerror("fbc_r: CLIP_MINY (%08x & %08x)\n", m_fbc.m_clip_miny, mem_mask); - return m_fbc.m_clip_miny; - case FBC_CLIP_MAXX: - logerror("fbc_r: CLIP_MAXX (%08x & %08x)\n", m_fbc.m_clip_maxx, mem_mask); - return m_fbc.m_clip_maxx; - case FBC_CLIP_MAXY: - logerror("fbc_r: CLIP_MAXY (%08x & %08x)\n", m_fbc.m_clip_maxy, mem_mask); - return m_fbc.m_clip_maxy; - - case FBC_FCOLOR: - logerror("fbc_r: FCOLOR (%08x & %08x)\n", m_fbc.m_fcolor, mem_mask); - return m_fbc.m_fcolor; - case FBC_BCOLOR: - logerror("fbc_r: BCOLOR (%08x & %08x)\n", m_fbc.m_bcolor, mem_mask); - return m_fbc.m_bcolor; - case FBC_RASTEROP: - logerror("fbc_r: RASTEROP (%08x & %08x)\n", m_fbc.m_rasterop, mem_mask); - return m_fbc.m_rasterop; - case FBC_PLANE_MASK: - logerror("fbc_r: PLANE_MASK (%08x & %08x)\n", m_fbc.m_plane_mask, mem_mask); - return m_fbc.m_plane_mask; - case FBC_PIXEL_MASK: - logerror("fbc_r: PIXEL_MASK (%08x & %08x)\n", m_fbc.m_pixel_mask, mem_mask); - return m_fbc.m_pixel_mask; - - case FBC_PATT_ALIGN: - logerror("fbc_r: PATT_ALIGN (%08x & %08x)\n", m_fbc.m_patt_align, mem_mask); - return m_fbc.m_patt_align; - case FBC_PATTERN0: - logerror("fbc_r: PATTERN0 (%08x & %08x)\n", m_fbc.m_pattern[0], mem_mask); - return m_fbc.m_pattern[0]; - case FBC_PATTERN1: - logerror("fbc_r: PATTERN1 (%08x & %08x)\n", m_fbc.m_pattern[1], mem_mask); - return m_fbc.m_pattern[1]; - case FBC_PATTERN2: - logerror("fbc_r: PATTERN2 (%08x & %08x)\n", m_fbc.m_pattern[2], mem_mask); - return m_fbc.m_pattern[2]; - case FBC_PATTERN3: - logerror("fbc_r: PATTERN3 (%08x & %08x)\n", m_fbc.m_pattern[3], mem_mask); - return m_fbc.m_pattern[3]; - case FBC_PATTERN4: - logerror("fbc_r: PATTERN4 (%08x & %08x)\n", m_fbc.m_pattern[4], mem_mask); - return m_fbc.m_pattern[4]; - case FBC_PATTERN5: - logerror("fbc_r: PATTERN5 (%08x & %08x)\n", m_fbc.m_pattern[5], mem_mask); - return m_fbc.m_pattern[5]; - case FBC_PATTERN6: - logerror("fbc_r: PATTERN6 (%08x & %08x)\n", m_fbc.m_pattern[6], mem_mask); - return m_fbc.m_pattern[6]; - case FBC_PATTERN7: - logerror("fbc_r: PATTERN7 (%08x & %08x)\n", m_fbc.m_pattern[7], mem_mask); - return m_fbc.m_pattern[7]; - - case FBC_IPOINT_ABSX: - logerror("fbc_r: IPOINT_ABSX (%08x & %08x)\n", m_fbc.m_ipoint_absx, mem_mask); - return m_fbc.m_ipoint_absx; - case FBC_IPOINT_ABSY: - logerror("fbc_r: IPOINT_ABSY (%08x & %08x)\n", m_fbc.m_ipoint_absy, mem_mask); - return m_fbc.m_ipoint_absy; - case FBC_IPOINT_ABSZ: - logerror("fbc_r: IPOINT_ABSZ (%08x & %08x)\n", m_fbc.m_ipoint_absz, mem_mask); - return m_fbc.m_ipoint_absz; - case FBC_IPOINT_RELX: - logerror("fbc_r: IPOINT_RELX (%08x & %08x)\n", m_fbc.m_ipoint_relx, mem_mask); - return m_fbc.m_ipoint_relx; - case FBC_IPOINT_RELY: - logerror("fbc_r: IPOINT_RELY (%08x & %08x)\n", m_fbc.m_ipoint_rely, mem_mask); - return m_fbc.m_ipoint_rely; - case FBC_IPOINT_RELZ: - logerror("fbc_r: IPOINT_RELZ (%08x & %08x)\n", m_fbc.m_ipoint_relz, mem_mask); - return m_fbc.m_ipoint_relz; - case FBC_IPOINT_R: - logerror("fbc_r: IPOINT_R (%08x & %08x)\n", m_fbc.m_ipoint_r, mem_mask); - return m_fbc.m_ipoint_r; - case FBC_IPOINT_G: - logerror("fbc_r: IPOINT_G (%08x & %08x)\n", m_fbc.m_ipoint_g, mem_mask); - return m_fbc.m_ipoint_g; - case FBC_IPOINT_B: - logerror("fbc_r: IPOINT_B (%08x & %08x)\n", m_fbc.m_ipoint_b, mem_mask); - return m_fbc.m_ipoint_b; - case FBC_IPOINT_A: - logerror("fbc_r: IPOINT_A (%08x & %08x)\n", m_fbc.m_ipoint_a, mem_mask); - return m_fbc.m_ipoint_a; - - case FBC_ILINE_ABSX: - logerror("fbc_r: ILINE_ABSX (%08x & %08x)\n", m_fbc.m_iline_absx, mem_mask); - return m_fbc.m_iline_absx; - case FBC_ILINE_ABSY: - logerror("fbc_r: ILINE_ABSY (%08x & %08x)\n", m_fbc.m_iline_absy, mem_mask); - return m_fbc.m_iline_absy; - case FBC_ILINE_ABSZ: - logerror("fbc_r: ILINE_ABSZ (%08x & %08x)\n", m_fbc.m_iline_absz, mem_mask); - return m_fbc.m_iline_absz; - case FBC_ILINE_RELX: - logerror("fbc_r: ILINE_RELX (%08x & %08x)\n", m_fbc.m_iline_relx, mem_mask); - return m_fbc.m_iline_relx; - case FBC_ILINE_RELY: - logerror("fbc_r: ILINE_RELY (%08x & %08x)\n", m_fbc.m_iline_rely, mem_mask); - return m_fbc.m_iline_rely; - case FBC_ILINE_RELZ: - logerror("fbc_r: ILINE_RELZ (%08x & %08x)\n", m_fbc.m_iline_relz, mem_mask); - return m_fbc.m_iline_relz; - case FBC_ILINE_R: - logerror("fbc_r: ILINE_R (%08x & %08x)\n", m_fbc.m_iline_r, mem_mask); - return m_fbc.m_iline_r; - case FBC_ILINE_G: - logerror("fbc_r: ILINE_G (%08x & %08x)\n", m_fbc.m_iline_g, mem_mask); - return m_fbc.m_iline_g; - case FBC_ILINE_B: - logerror("fbc_r: ILINE_B (%08x & %08x)\n", m_fbc.m_iline_b, mem_mask); - return m_fbc.m_iline_b; - case FBC_ILINE_A: - logerror("fbc_r: ILINE_A (%08x & %08x)\n", m_fbc.m_iline_a, mem_mask); - return m_fbc.m_iline_a; - - case FBC_ITRI_ABSX: - logerror("fbc_r: ITRI_ABSX (%08x & %08x)\n", m_fbc.m_itri_absx, mem_mask); - return m_fbc.m_itri_absx; - case FBC_ITRI_ABSY: - logerror("fbc_r: ITRI_ABSY (%08x & %08x)\n", m_fbc.m_itri_absy, mem_mask); - return m_fbc.m_itri_absy; - case FBC_ITRI_ABSZ: - logerror("fbc_r: ITRI_ABSZ (%08x & %08x)\n", m_fbc.m_itri_absz, mem_mask); - return m_fbc.m_itri_absz; - case FBC_ITRI_RELX: - logerror("fbc_r: ITRI_RELX (%08x & %08x)\n", m_fbc.m_itri_relx, mem_mask); - return m_fbc.m_itri_relx; - case FBC_ITRI_RELY: - logerror("fbc_r: ITRI_RELY (%08x & %08x)\n", m_fbc.m_itri_rely, mem_mask); - return m_fbc.m_itri_rely; - case FBC_ITRI_RELZ: - logerror("fbc_r: ITRI_RELZ (%08x & %08x)\n", m_fbc.m_itri_relz, mem_mask); - return m_fbc.m_itri_relz; - case FBC_ITRI_R: - logerror("fbc_r: ITRI_R (%08x & %08x)\n", m_fbc.m_itri_r, mem_mask); - return m_fbc.m_itri_r; - case FBC_ITRI_G: - logerror("fbc_r: ITRI_G (%08x & %08x)\n", m_fbc.m_itri_g, mem_mask); - return m_fbc.m_itri_g; - case FBC_ITRI_B: - logerror("fbc_r: ITRI_B (%08x & %08x)\n", m_fbc.m_itri_b, mem_mask); - return m_fbc.m_itri_b; - case FBC_ITRI_A: - logerror("fbc_r: ITRI_A (%08x & %08x)\n", m_fbc.m_itri_a, mem_mask); - return m_fbc.m_itri_a; - - case FBC_IQUAD_ABSX: - logerror("fbc_r: IQUAD_ABSX (%08x & %08x)\n", m_fbc.m_iquad_absx, mem_mask); - return m_fbc.m_iquad_absx; - case FBC_IQUAD_ABSY: - logerror("fbc_r: IQUAD_ABSY (%08x & %08x)\n", m_fbc.m_iquad_absy, mem_mask); - return m_fbc.m_iquad_absy; - case FBC_IQUAD_ABSZ: - logerror("fbc_r: IQUAD_ABSZ (%08x & %08x)\n", m_fbc.m_iquad_absz, mem_mask); - return m_fbc.m_iquad_absz; - case FBC_IQUAD_RELX: - logerror("fbc_r: IQUAD_RELX (%08x & %08x)\n", m_fbc.m_iquad_relx, mem_mask); - return m_fbc.m_iquad_relx; - case FBC_IQUAD_RELY: - logerror("fbc_r: IQUAD_RELY (%08x & %08x)\n", m_fbc.m_iquad_rely, mem_mask); - return m_fbc.m_iquad_rely; - case FBC_IQUAD_RELZ: - logerror("fbc_r: IQUAD_RELZ (%08x & %08x)\n", m_fbc.m_iquad_relz, mem_mask); - return m_fbc.m_iquad_relz; - case FBC_IQUAD_R: - logerror("fbc_r: IQUAD_R (%08x & %08x)\n", m_fbc.m_iquad_r, mem_mask); - return m_fbc.m_iquad_r; - case FBC_IQUAD_G: - logerror("fbc_r: IQUAD_G (%08x & %08x)\n", m_fbc.m_iquad_g, mem_mask); - return m_fbc.m_iquad_g; - case FBC_IQUAD_B: - logerror("fbc_r: IQUAD_B (%08x & %08x)\n", m_fbc.m_iquad_b, mem_mask); - return m_fbc.m_iquad_b; - case FBC_IQUAD_A: - logerror("fbc_r: IQUAD_A (%08x & %08x)\n", m_fbc.m_iquad_a, mem_mask); - return m_fbc.m_iquad_a; - - case FBC_IRECT_ABSX: - logerror("fbc_r: IRECT_ABSX (%08x & %08x)\n", m_fbc.m_irect_absx, mem_mask); - return m_fbc.m_irect_absx; - case FBC_IRECT_ABSY: - logerror("fbc_r: IRECT_ABSY (%08x & %08x)\n", m_fbc.m_irect_absy, mem_mask); - return m_fbc.m_irect_absy; - case FBC_IRECT_ABSZ: - logerror("fbc_r: IRECT_ABSZ (%08x & %08x)\n", m_fbc.m_irect_absz, mem_mask); - return m_fbc.m_irect_absz; - case FBC_IRECT_RELX: - logerror("fbc_r: IRECT_RELX (%08x & %08x)\n", m_fbc.m_irect_relx, mem_mask); - return m_fbc.m_irect_relx; - case FBC_IRECT_RELY: - logerror("fbc_r: IRECT_RELY (%08x & %08x)\n", m_fbc.m_irect_rely, mem_mask); - return m_fbc.m_irect_rely; - case FBC_IRECT_RELZ: - logerror("fbc_r: IRECT_RELZ (%08x & %08x)\n", m_fbc.m_irect_relz, mem_mask); - return m_fbc.m_irect_relz; - case FBC_IRECT_R: - logerror("fbc_r: IRECT_R (%08x & %08x)\n", m_fbc.m_irect_r, mem_mask); - return m_fbc.m_irect_r; - case FBC_IRECT_G: - logerror("fbc_r: IRECT_G (%08x & %08x)\n", m_fbc.m_irect_g, mem_mask); - return m_fbc.m_irect_g; - case FBC_IRECT_B: - logerror("fbc_r: IRECT_B (%08x & %08x)\n", m_fbc.m_irect_b, mem_mask); - return m_fbc.m_irect_b; - case FBC_IRECT_A: - logerror("fbc_r: IRECT_A (%08x & %08x)\n", m_fbc.m_irect_a, mem_mask); - return m_fbc.m_irect_a; - - default: - logerror("fbc_r: Unknown register %08x & %08x\n", 0x00700000 | (offset << 2), mem_mask); - break; - } - return ret; -} - -WRITE32_MEMBER(sbus_turbogx_device::fbc_w) -{ - static const char* misc_bdisp_name[4] = { "IGNORE", "0", "1", "ILLEGAL" }; - static const char* misc_bread_name[4] = { "IGNORE", "0", "1", "ILLEGAL" }; - static const char* misc_bwrite1_name[4] = { "IGNORE", "ENABLE", "DISABLE", "ILLEGAL" }; - static const char* misc_bwrite0_name[4] = { "IGNORE", "ENABLE", "DISABLE", "ILLEGAL" }; - static const char* misc_draw_name[4] = { "IGNORE", "RENDER", "PICK", "ILLEGAL" }; - static const char* misc_data_name[4] = { "IGNORE", "COLOR8", "COLOR1", "HRMONO" }; - static const char* misc_blit_name[4] = { "IGNORE", "NOSRC", "SRC", "ILLEGAL" }; - static const char* rasterop_rop_name[16] = - { - "CLR", "SRC_NOR_DST", "NSRC_AND_DST", "NOT_SRC", "SRC_AND_NDST", "NOT_DST", "SRC_XOR_DST", "SRC_NAND_DST", - "SRC_AND_DST", "SRC_XNOR_DST", "DST", "NSRC_OR_DST", "SRC", "SRC_OR_NDST", "SRC_OR_DST", "SET" - }; - static const char* rasterop_plot_name[2] = { "PLOT", "UNPLOT" }; - static const char* rasterop_rast_name[2] = { "BOOL", "LINEAR" }; - static const char* rasterop_attr_name[4] = { "IGNORE", "UNSUPP", "SUPP", "ILLEGAL" }; - static const char* rasterop_polyg_name[4] = { "IGNORE", "OVERLAP", "NONOVERLAP", "ILLEGAL" }; - static const char* rasterop_pattern_name[4] = { "IGNORE", "ZEROES", "ONES", "MASK" }; - static const char* rasterop_pixel_name[4] = { "IGNORE", "ZEROES", "ONES", "MASK" }; - static const char* rasterop_plane_name[4] = { "IGNORE", "ZEROES", "ONES", "MASK" }; - - switch (offset) - { - case FBC_MISC: - COMBINE_DATA(&m_fbc.m_misc); - logerror("fbc_w: MISC = %08x & %08x\n", data, mem_mask); - logerror(" MISC_INDEX = %d\n", fbc_misc_index()); - logerror(" MISC_INDEX_MOD = %d\n", fbc_misc_index_mod()); - logerror(" MISC_BDISP = %d (%s)\n", fbc_misc_bdisp(), misc_bdisp_name[fbc_misc_bdisp()]); - logerror(" MISC_BREAD = %d (%s)\n", fbc_misc_bread(), misc_bread_name[fbc_misc_bread()]); - logerror(" MISC_BWRITE1 = %d (%s)\n", fbc_misc_bwrite1(), misc_bwrite1_name[fbc_misc_bwrite1()]); - logerror(" MISC_BWRITE0 = %d (%s)\n", fbc_misc_bwrite0(), misc_bwrite0_name[fbc_misc_bwrite0()]); - logerror(" MISC_DRAW = %d (%s)\n", fbc_misc_draw(), misc_draw_name[fbc_misc_draw()]); - logerror(" MISC_DATA = %d (%s)\n", fbc_misc_data(), misc_data_name[fbc_misc_data()]); - logerror(" MISC_BLIT = %d (%s)\n", fbc_misc_blit(), misc_blit_name[fbc_misc_blit()]); - break; - case FBC_CLIP_CHECK: - logerror("fbc_w: CLIP_CHECK = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_clip_check); - break; - - case FBC_STATUS: - logerror("fbc_w: STATUS = %08x & %08x\n", data, mem_mask); - //COMBINE_DATA(&m_fbc.m_status); - break; - case FBC_DRAW_STATUS: - logerror("fbc_w: DRAW_STATUS = %08x & %08x\n", data, mem_mask); - //COMBINE_DATA(&m_fbc.m_draw_status); - break; - case FBC_BLIT_STATUS: - logerror("fbc_w: BLIT_STATUS = %08x & %08x\n", data, mem_mask); - //COMBINE_DATA(&m_fbc.m_blit_status); - break; - case FBC_FONT: - logerror("fbc_w: FONT = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_font); - break; - - case FBC_X0: - logerror("fbc_w: X0 = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_x0); - break; - case FBC_Y0: - logerror("fbc_w: Y0 = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_y0); - break; - case FBC_Z0: - logerror("fbc_w: Z0 = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_z0); - break; - case FBC_COLOR0: - logerror("fbc_w: COLOR0 = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_color0); - break; - case FBC_X1: - logerror("fbc_w: X1 = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_x1); - break; - case FBC_Y1: - logerror("fbc_w: Y1 = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_y1); - break; - case FBC_Z1: - logerror("fbc_w: Z1 = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_z1); - break; - case FBC_COLOR1: - logerror("fbc_w: COLOR1 = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_color1); - break; - case FBC_X2: - logerror("fbc_w: X2 = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_x2); - break; - case FBC_Y2: - logerror("fbc_w: Y2 = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_y2); - break; - case FBC_Z2: - logerror("fbc_w: Z2 = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_z2); - break; - case FBC_COLOR2: - logerror("fbc_w: COLOR2 = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_color2); - break; - case FBC_X3: - logerror("fbc_w: X3 = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_x3); - break; - case FBC_Y3: - logerror("fbc_w: Y3 = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_y3); - break; - case FBC_Z3: - logerror("fbc_w: Z3 = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_z3); - break; - case FBC_COLOR3: - logerror("fbc_w: COLOR3 = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_color3); - break; - - case FBC_RASTER_OFFX: - logerror("fbc_w: RASTER_OFFX = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_raster_offx); - break; - case FBC_RASTER_OFFY: - logerror("fbc_w: RASTER_OFFY = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_raster_offy); - break; - case FBC_AUTOINCX: - logerror("fbc_w: AUTOINCX = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_autoincx); - break; - case FBC_AUTOINCY: - logerror("fbc_w: AUTOINCY = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_autoincy); - break; - case FBC_CLIP_MINX: - logerror("fbc_w: CLIP_MINX = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_clip_minx); - break; - case FBC_CLIP_MINY: - logerror("fbc_w: CLIP_MINY = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_clip_miny); - break; - case FBC_CLIP_MAXX: - logerror("fbc_w: CLIP_MAXX = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_clip_maxx); - break; - case FBC_CLIP_MAXY: - logerror("fbc_w: CLIP_MAXY (%08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_clip_maxy); - break; - - case FBC_FCOLOR: - logerror("fbc_w: FCOLOR = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_fcolor); - break; - case FBC_BCOLOR: - logerror("fbc_w: BCOLOR = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_bcolor); - break; - case FBC_RASTEROP: - COMBINE_DATA(&m_fbc.m_rasterop); - logerror("fbc_w: RASTEROP = %08x & %08x\n", data, mem_mask); - logerror(" RASTEROP_ROP00 = %d (%s)\n", fbc_rasterop_rop00(), rasterop_rop_name[fbc_rasterop_rop00()]); - logerror(" RASTEROP_ROP01 = %d (%s)\n", fbc_rasterop_rop01(), rasterop_rop_name[fbc_rasterop_rop01()]); - logerror(" RASTEROP_ROP10 = %d (%s)\n", fbc_rasterop_rop10(), rasterop_rop_name[fbc_rasterop_rop10()]); - logerror(" RASTEROP_ROP11 = %d (%s)\n", fbc_rasterop_rop11(), rasterop_rop_name[fbc_rasterop_rop11()]); - logerror(" RASTEROP_PLOT = %d (%s)\n", fbc_rasterop_plot(), rasterop_plot_name[fbc_rasterop_plot()]); - logerror(" RASTEROP_RAST = %d (%s)\n", fbc_rasterop_rast(), rasterop_rast_name[fbc_rasterop_rast()]); - logerror(" RASTEROP_ATTR = %d (%s)\n", fbc_rasterop_attr(), rasterop_attr_name[fbc_rasterop_attr()]); - logerror(" RASTEROP_POLYG = %d (%s)\n", fbc_rasterop_polyg(), rasterop_polyg_name[fbc_rasterop_polyg()]); - logerror(" RASTEROP_PATT = %d (%s)\n", fbc_rasterop_pattern(), rasterop_pattern_name[fbc_rasterop_pattern()]); - logerror(" RASTEROP_PIXEL = %d (%s)\n", fbc_rasterop_pixel(), rasterop_pixel_name[fbc_rasterop_pixel()]); - logerror(" RASTEROP_PLANE = %d (%s)\n", fbc_rasterop_plane(), rasterop_plane_name[fbc_rasterop_plane()]); - break; - case FBC_PLANE_MASK: - logerror("fbc_w: PLANE_MASK = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_plane_mask); - break; - case FBC_PIXEL_MASK: - logerror("fbc_w: PIXEL_MASK = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_pixel_mask); - break; - - case FBC_PATT_ALIGN: - logerror("fbc_w: PATT_ALIGN = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_patt_align); - break; - case FBC_PATTERN0: - logerror("fbc_w: PATTERN0 = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_pattern[0]); - break; - case FBC_PATTERN1: - logerror("fbc_w: PATTERN1 = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_pattern[1]); - break; - case FBC_PATTERN2: - logerror("fbc_w: PATTERN2 = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_pattern[2]); - break; - case FBC_PATTERN3: - logerror("fbc_w: PATTERN3 = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_pattern[3]); - break; - case FBC_PATTERN4: - logerror("fbc_w: PATTERN4 = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_pattern[4]); - break; - case FBC_PATTERN5: - logerror("fbc_w: PATTERN5 = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_pattern[5]); - break; - case FBC_PATTERN6: - logerror("fbc_w: PATTERN6 = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_pattern[6]); - break; - case FBC_PATTERN7: - logerror("fbc_w: PATTERN7 = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_pattern[7]); - break; - - case FBC_IPOINT_ABSX: - logerror("fbc_w: IPOINT_ABSX = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_ipoint_absx); - break; - case FBC_IPOINT_ABSY: - logerror("fbc_w: IPOINT_ABSY = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_ipoint_absy); - break; - case FBC_IPOINT_ABSZ: - logerror("fbc_w: IPOINT_ABSZ = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_ipoint_absz); - break; - case FBC_IPOINT_RELX: - logerror("fbc_w: IPOINT_RELX = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_ipoint_relx); - break; - case FBC_IPOINT_RELY: - logerror("fbc_w: IPOINT_RELY = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_ipoint_rely); - break; - case FBC_IPOINT_RELZ: - logerror("fbc_w: IPOINT_RELZ = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_ipoint_relz); - break; - case FBC_IPOINT_R: - logerror("fbc_w: IPOINT_R = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_ipoint_r); - break; - case FBC_IPOINT_G: - logerror("fbc_w: IPOINT_G = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_ipoint_g); - break; - case FBC_IPOINT_B: - logerror("fbc_w: IPOINT_B = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_ipoint_b); - break; - case FBC_IPOINT_A: - logerror("fbc_w: IPOINT_A = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_ipoint_a); - break; - - case FBC_ILINE_ABSX: - logerror("fbc_w: ILINE_ABSX = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_iline_absx); - break; - case FBC_ILINE_ABSY: - logerror("fbc_w: ILINE_ABSY = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_iline_absy); - break; - case FBC_ILINE_ABSZ: - logerror("fbc_w: ILINE_ABSZ = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_iline_absz); - break; - case FBC_ILINE_RELX: - logerror("fbc_w: ILINE_RELX = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_iline_relx); - break; - case FBC_ILINE_RELY: - logerror("fbc_w: ILINE_RELY = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_iline_rely); - break; - case FBC_ILINE_RELZ: - logerror("fbc_w: ILINE_RELZ = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_iline_relz); - break; - case FBC_ILINE_R: - logerror("fbc_w: ILINE_R = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_iline_r); - break; - case FBC_ILINE_G: - logerror("fbc_w: ILINE_G = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_iline_g); - break; - case FBC_ILINE_B: - logerror("fbc_w: ILINE_B = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_iline_b); - break; - case FBC_ILINE_A: - logerror("fbc_w: ILINE_A = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_iline_a); - break; - - case FBC_ITRI_ABSX: - logerror("fbc_w: ITRI_ABSX = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_itri_absx); - break; - case FBC_ITRI_ABSY: - COMBINE_DATA(&m_fbc.m_itri_absy); - logerror("fbc_w: ITRI_ABSY = %08x & %08x\n", data, mem_mask); - break; - case FBC_ITRI_ABSZ: - logerror("fbc_w: ITRI_ABSZ = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_itri_absz); - break; - case FBC_ITRI_RELX: - logerror("fbc_w: ITRI_RELX = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_itri_relx); - break; - case FBC_ITRI_RELY: - logerror("fbc_w: ITRI_RELY = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_itri_rely); - break; - case FBC_ITRI_RELZ: - logerror("fbc_w: ITRI_RELZ = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_itri_relz); - break; - case FBC_ITRI_R: - logerror("fbc_w: ITRI_R = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_itri_r); - break; - case FBC_ITRI_G: - logerror("fbc_w: ITRI_G = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_itri_g); - break; - case FBC_ITRI_B: - logerror("fbc_w: ITRI_B = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_itri_b); - break; - case FBC_ITRI_A: - logerror("fbc_w: ITRI_A = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_itri_a); - break; - - case FBC_IQUAD_ABSX: - logerror("fbc_w: IQUAD_ABSX = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_iquad_absx); - break; - case FBC_IQUAD_ABSY: - logerror("fbc_w: IQUAD_ABSY = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_iquad_absy); - break; - case FBC_IQUAD_ABSZ: - logerror("fbc_w: IQUAD_ABSZ = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_iquad_absz); - break; - case FBC_IQUAD_RELX: - logerror("fbc_w: IQUAD_RELX = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_iquad_relx); - break; - case FBC_IQUAD_RELY: - logerror("fbc_w: IQUAD_RELY = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_iquad_rely); - break; - case FBC_IQUAD_RELZ: - logerror("fbc_w: IQUAD_RELZ = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_iquad_relz); - break; - case FBC_IQUAD_R: - logerror("fbc_w: IQUAD_R = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_iquad_r); - break; - case FBC_IQUAD_G: - logerror("fbc_w: IQUAD_G = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_iquad_g); - break; - case FBC_IQUAD_B: - logerror("fbc_w: IQUAD_B = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_iquad_b); - break; - case FBC_IQUAD_A: - logerror("fbc_w: IQUAD_A = %08x & %08x\n", data, mem_mask); - COMBINE_DATA(&m_fbc.m_iquad_a); - break; - - case FBC_IRECT_ABSX: - logerror("fbc_w: IRECT_ABSX = %08x & %08x\n", data, mem_mask); - m_fbc.m_prim_buf[m_fbc.m_vertex_count].m_absx = data; - m_fbc.m_vertex_count++; - m_fbc.m_curr_prim_type = PRIM_RECT; - break; - case FBC_IRECT_ABSY: - logerror("fbc_w: IRECT_ABSY = %08x & %08x\n", data, mem_mask); - m_fbc.m_prim_buf[m_fbc.m_vertex_count].m_absy = data; - break; - case FBC_IRECT_ABSZ: - logerror("fbc_w: IRECT_ABSZ = %08x & %08x\n", data, mem_mask); - m_fbc.m_prim_buf[m_fbc.m_vertex_count].m_absz = data; - break; - case FBC_IRECT_RELX: - logerror("fbc_w: IRECT_RELX = %08x & %08x\n", data, mem_mask); - m_fbc.m_prim_buf[m_fbc.m_vertex_count].m_relx = data; - break; - case FBC_IRECT_RELY: - logerror("fbc_w: IRECT_RELY = %08x & %08x\n", data, mem_mask); - m_fbc.m_prim_buf[m_fbc.m_vertex_count].m_rely = data; - break; - case FBC_IRECT_RELZ: - logerror("fbc_w: IRECT_RELZ = %08x & %08x\n", data, mem_mask); - m_fbc.m_prim_buf[m_fbc.m_vertex_count].m_relz = data; - break; - case FBC_IRECT_R: - logerror("fbc_w: IRECT_R = %08x & %08x\n", data, mem_mask); - m_fbc.m_prim_buf[m_fbc.m_vertex_count].m_r = data; - break; - case FBC_IRECT_G: - logerror("fbc_w: IRECT_G = %08x & %08x\n", data, mem_mask); - m_fbc.m_prim_buf[m_fbc.m_vertex_count].m_g = data; - break; - case FBC_IRECT_B: - logerror("fbc_w: IRECT_B = %08x & %08x\n", data, mem_mask); - m_fbc.m_prim_buf[m_fbc.m_vertex_count].m_b = data; - break; - case FBC_IRECT_A: - logerror("fbc_w: IRECT_A = %08x & %08x\n", data, mem_mask); - m_fbc.m_prim_buf[m_fbc.m_vertex_count].m_a = data; - break; - - default: - logerror("fbc_w: Unknown register %08x = %08x & %08x\n", 0x00700000 | (offset << 2), data, mem_mask); - break; - } -} diff --git a/src/devices/bus/sbus/turbogx.h b/src/devices/bus/sbus/turbogx.h deleted file mode 100644 index 19b448ff837..00000000000 --- a/src/devices/bus/sbus/turbogx.h +++ /dev/null @@ -1,474 +0,0 @@ -// license:BSD-3-Clause -// copyright-holders:Ryan Holtz -/*************************************************************************** - - Sun TurboGX accelerated 8-bit color video controller - -***************************************************************************/ - -#ifndef MAME_BUS_SBUS_TURBOGX_H -#define MAME_BUS_SBUS_TURBOGX_H - -#pragma once - -#include "sbus.h" -#include "video/bt45x.h" - -class sbus_turbogx_device : public device_t, public device_sbus_card_interface -{ -public: - // construction/destruction - sbus_turbogx_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - -protected: - // device_t overrides - virtual const tiny_rom_entry *device_rom_region() const override; - virtual void device_add_mconfig(machine_config &config) override; - virtual void device_start() override; - virtual void device_reset() override; - - // device_sbus_slot_interface overrides - virtual void install_device() override; - - DECLARE_READ32_MEMBER(rom_r); - DECLARE_READ32_MEMBER(unknown_r); - DECLARE_WRITE32_MEMBER(unknown_w); - DECLARE_READ32_MEMBER(vram_r); - DECLARE_WRITE32_MEMBER(vram_w); - DECLARE_READ32_MEMBER(fbc_r); - DECLARE_WRITE32_MEMBER(fbc_w); - -private: - uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); - uint8_t perform_rasterop(uint8_t src, uint8_t dst); - void handle_blit_command(); - void handle_draw_command(); - - void mem_map(address_map &map) override; - - enum - { - ROP_CLR = 0x00, - ROP_SRC_NOR_DST = 0x01, - ROP_NSRC_AND_DST = 0x02, - ROP_NOT_SRC = 0x03, - ROP_SRC_AND_NDST = 0x04, - ROP_NOT_DST = 0x05, - ROP_SRC_XOR_DST = 0x06, - ROP_SRC_NAND_DST = 0x07, - ROP_SRC_AND_DST = 0x08, - ROP_SRC_XNOR_DST = 0x09, - ROP_DST = 0x0a, - ROP_NSRC_OR_DST = 0x0b, - ROP_SRC = 0x0c, - ROP_SRC_OR_NDST = 0x0d, - ROP_SRC_OR_DST = 0x0e, - ROP_SET = 0x0f - }; - - enum - { - FBC_MISC_INDEX_SHIFT = 4, - FBC_MISC_INDEX_MOD_SHIFT = 6, - FBC_MISC_BDISP_SHIFT = 7, - FBC_MISC_BREAD_SHIFT = 9, - FBC_MISC_BWRITE1_SHIFT = 11, - FBC_MISC_BWRITE0_SHIFT = 13, - FBC_MISC_DRAW_SHIFT = 15, - FBC_MISC_DATA_SHIFT = 17, - FBC_MISC_VBLANK_SHIFT = 19, - FBC_MISC_BLIT_SHIFT = 20 - }; - - enum - { - FBC_MISC_INDEX_MASK = 0x3, - FBC_MISC_INDEX_MOD_MASK = 0x1, - FBC_MISC_BDISP_MASK = 0x3, - FBC_MISC_BREAD_MASK = 0x3, - FBC_MISC_BWRITE1_MASK = 0x3, - FBC_MISC_BWRITE0_MASK = 0x3, - FBC_MISC_DRAW_MASK = 0x3, - FBC_MISC_DATA_MASK = 0x3, - FBC_MISC_VBLANK_MASK = 0x1, - FBC_MISC_BLIT_MASK = 0x3 - }; - - enum - { - FBC_MISC_BDISP_IGNORE = 0, - FBC_MISC_BDISP_0 = 1, - FBC_MISC_BDISP_1 = 2, - FBC_MISC_BDISP_ILLEGAL = 3, - - FBC_MISC_BREAD_IGNORE = 0, - FBC_MISC_BREAD_0 = 1, - FBC_MISC_BREAD_1 = 2, - FBC_MISC_BREAD_ILLEGAL = 3, - - FBC_MISC_BWRITE1_IGNORE = 0, - FBC_MISC_BWRITE1_ENABLE = 1, - FBC_MISC_BWRITE1_DISABLE = 2, - FBC_MISC_BWRITE1_ILLEGAL = 3, - - FBC_MISC_BWRITE0_IGNORE = 0, - FBC_MISC_BWRITE0_ENABLE = 1, - FBC_MISC_BWRITE0_DISABLE = 2, - FBC_MISC_BWRITE0_ILLEGAL = 3, - - FBC_MISC_DRAW_IGNORE = 0, - FBC_MISC_DRAW_RENDER = 1, - FBC_MISC_DRAW_PICK = 2, - FBC_MISC_DRAW_ILLEGAL = 3, - - FBC_MISC_DATA_IGNORE = 0, - FBC_MISC_DATA_COLOR8 = 1, - FBC_MISC_DATA_COLOR1 = 2, - FBC_MISC_DATA_HRMONO = 3, - - FBC_MISC_BLIT_IGNORE = 0, - FBC_MISC_BLIT_NOSRC = 1, - FBC_MISC_BLIT_SRC = 2, - FBC_MISC_BLIT_ILLEGAL = 3 - }; - - inline uint32_t fbc_misc_index() { return (m_fbc.m_misc >> FBC_MISC_INDEX_SHIFT) & FBC_MISC_INDEX_MASK; } - inline uint32_t fbc_misc_index_mod() { return (m_fbc.m_misc >> FBC_MISC_INDEX_MOD_SHIFT) & FBC_MISC_INDEX_MOD_MASK; } - inline uint32_t fbc_misc_bdisp() { return (m_fbc.m_misc >> FBC_MISC_BDISP_SHIFT) & FBC_MISC_BDISP_MASK; } - inline uint32_t fbc_misc_bread() { return (m_fbc.m_misc >> FBC_MISC_BREAD_SHIFT) & FBC_MISC_BREAD_MASK; } - inline uint32_t fbc_misc_bwrite1() { return (m_fbc.m_misc >> FBC_MISC_BWRITE1_SHIFT) & FBC_MISC_BWRITE1_MASK; } - inline uint32_t fbc_misc_bwrite0() { return (m_fbc.m_misc >> FBC_MISC_BWRITE0_SHIFT) & FBC_MISC_BWRITE0_MASK; } - inline uint32_t fbc_misc_draw() { return (m_fbc.m_misc >> FBC_MISC_DRAW_SHIFT) & FBC_MISC_DRAW_MASK; } - inline uint32_t fbc_misc_data() { return (m_fbc.m_misc >> FBC_MISC_DATA_SHIFT) & FBC_MISC_DATA_MASK; } - inline uint32_t fbc_misc_blit() { return (m_fbc.m_misc >> FBC_MISC_BLIT_SHIFT) & FBC_MISC_BLIT_MASK; } - - enum - { - FBC_RASTEROP_ROP00_SHIFT = 0, - FBC_RASTEROP_ROP01_SHIFT = 4, - FBC_RASTEROP_ROP10_SHIFT = 8, - FBC_RASTEROP_ROP11_SHIFT = 12, - FBC_RASTEROP_PLOT_SHIFT = 16, - FBC_RASTEROP_RAST_SHIFT = 17, - FBC_RASTEROP_ATTR_SHIFT = 22, - FBC_RASTEROP_POLYG_SHIFT = 24, - FBC_RASTEROP_PATT_SHIFT = 26, - FBC_RASTEROP_PIXEL_SHIFT = 28, - FBC_RASTEROP_PLANE_SHIFT = 30 - }; - - enum - { - FBC_RASTEROP_ROP00_MASK = 0xf, - FBC_RASTEROP_ROP01_MASK = 0xf, - FBC_RASTEROP_ROP10_MASK = 0xf, - FBC_RASTEROP_ROP11_MASK = 0xf, - FBC_RASTEROP_PLOT_MASK = 0x1, - FBC_RASTEROP_RAST_MASK = 0x1, - FBC_RASTEROP_ATTR_MASK = 0x3, - FBC_RASTEROP_POLYG_MASK = 0x3, - FBC_RASTEROP_PATT_MASK = 0x3, - FBC_RASTEROP_PIXEL_MASK = 0x3, - FBC_RASTEROP_PLANE_MASK = 0x3 - }; - - enum - { - FBC_RASTEROP_PLOT_PLOT = 0, - FBC_RASTEROP_PLOT_UNPLOT = 1, - - FBC_RASTEROP_RAST_BOOL = 0, - FBC_RASTEROP_RAST_LINEAR = 1, - - FBC_RASTEROP_ATTR_IGNORE = 0, - FBC_RASTEROP_ATTR_UNSUPP = 1, - FBC_RASTEROP_ATTR_SUPP = 2, - FBC_RASTEROP_ATTR_ILLEGAL = 3, - - FBC_RASTEROP_POLYG_IGNORE = 0, - FBC_RASTEROP_POLYG_OVERLAP = 1, - FBC_RASTEROP_POLYG_NONOVERLAP = 2, - FBC_RASTEROP_POLYG_ILLEGAL = 3, - - FBC_RASTEROP_PATTERN_IGNORE = 0, - FBC_RASTEROP_PATTERN_ZEROES = 1, - FBC_RASTEROP_PATTERN_ONES = 2, - FBC_RASTEROP_PATTERN_MSK = 3, - - FBC_RASTEROP_PIXEL_IGNORE = 0, - FBC_RASTEROP_PIXEL_ZEROES = 1, - FBC_RASTEROP_PIXEL_ONES = 2, - FBC_RASTEROP_PIXEL_MSK = 3, - - FBC_RASTEROP_PLANE_IGNORE = 0, - FBC_RASTEROP_PLANE_ZEROES = 1, - FBC_RASTEROP_PLANE_ONES = 2, - FBC_RASTEROP_PLANE_MSK = 3 - }; - - inline uint32_t fbc_rasterop_rop00() { return (m_fbc.m_rasterop >> FBC_RASTEROP_ROP00_SHIFT) & FBC_RASTEROP_ROP00_MASK; } - inline uint32_t fbc_rasterop_rop01() { return (m_fbc.m_rasterop >> FBC_RASTEROP_ROP01_SHIFT) & FBC_RASTEROP_ROP01_MASK; } - inline uint32_t fbc_rasterop_rop10() { return (m_fbc.m_rasterop >> FBC_RASTEROP_ROP10_SHIFT) & FBC_RASTEROP_ROP10_MASK; } - inline uint32_t fbc_rasterop_rop11() { return (m_fbc.m_rasterop >> FBC_RASTEROP_ROP11_SHIFT) & FBC_RASTEROP_ROP11_MASK; } - inline uint32_t fbc_rasterop_plot() { return (m_fbc.m_rasterop >> FBC_RASTEROP_PLOT_SHIFT) & FBC_RASTEROP_PLOT_MASK; } - inline uint32_t fbc_rasterop_rast() { return (m_fbc.m_rasterop >> FBC_RASTEROP_RAST_SHIFT) & FBC_RASTEROP_RAST_MASK; } - inline uint32_t fbc_rasterop_attr() { return (m_fbc.m_rasterop >> FBC_RASTEROP_ATTR_SHIFT) & FBC_RASTEROP_ATTR_MASK; } - inline uint32_t fbc_rasterop_polyg() { return (m_fbc.m_rasterop >> FBC_RASTEROP_POLYG_SHIFT) & FBC_RASTEROP_POLYG_MASK; } - inline uint32_t fbc_rasterop_pattern() { return (m_fbc.m_rasterop >> FBC_RASTEROP_PATT_SHIFT) & FBC_RASTEROP_PATT_MASK; } - inline uint32_t fbc_rasterop_pixel() { return (m_fbc.m_rasterop >> FBC_RASTEROP_PIXEL_SHIFT) & FBC_RASTEROP_PIXEL_MASK; } - inline uint32_t fbc_rasterop_plane() { return (m_fbc.m_rasterop >> FBC_RASTEROP_PLANE_SHIFT) & FBC_RASTEROP_PLANE_MASK; } - - enum - { - FBC_MISC = 0x004/4, - FBC_CLIP_CHECK = 0x008/4, - - FBC_STATUS = 0x010/4, - FBC_DRAW_STATUS = 0x014/4, - FBC_BLIT_STATUS = 0x018/4, - FBC_FONT = 0x01c/4, - - FBC_X0 = 0x080/4, - FBC_Y0 = 0x084/4, - FBC_Z0 = 0x088/4, - FBC_COLOR0 = 0x08c/4, - FBC_X1 = 0x090/4, - FBC_Y1 = 0x094/4, - FBC_Z1 = 0x098/4, - FBC_COLOR1 = 0x09c/4, - FBC_X2 = 0x0a0/4, - FBC_Y2 = 0x0a4/4, - FBC_Z2 = 0x0a8/4, - FBC_COLOR2 = 0x0ac/4, - FBC_X3 = 0x0b0/4, - FBC_Y3 = 0x0b4/4, - FBC_Z3 = 0x0b8/4, - FBC_COLOR3 = 0x0bc/4, - - FBC_RASTER_OFFX = 0x0c0/4, - FBC_RASTER_OFFY = 0x0c4/4, - FBC_AUTOINCX = 0x0d0/4, - FBC_AUTOINCY = 0x0d4/4, - FBC_CLIP_MINX = 0x0e0/4, - FBC_CLIP_MINY = 0x0e4/4, - FBC_CLIP_MAXX = 0x0f0/4, - FBC_CLIP_MAXY = 0x0f4/4, - - FBC_FCOLOR = 0x100/4, - FBC_BCOLOR = 0x104/4, - FBC_RASTEROP = 0x108/4, - FBC_PLANE_MASK = 0x10c/4, - FBC_PIXEL_MASK = 0x110/4, - - FBC_PATT_ALIGN = 0x11c/4, - FBC_PATTERN0 = 0x120/4, - FBC_PATTERN1 = 0x124/4, - FBC_PATTERN2 = 0x128/4, - FBC_PATTERN3 = 0x12c/4, - FBC_PATTERN4 = 0x130/4, - FBC_PATTERN5 = 0x134/4, - FBC_PATTERN6 = 0x138/4, - FBC_PATTERN7 = 0x13c/4, - - FBC_IPOINT_ABSX = 0x800/4, - FBC_IPOINT_ABSY = 0x804/4, - FBC_IPOINT_ABSZ = 0x808/4, - FBC_IPOINT_RELX = 0x810/4, - FBC_IPOINT_RELY = 0x814/4, - FBC_IPOINT_RELZ = 0x818/4, - FBC_IPOINT_R = 0x830/4, - FBC_IPOINT_G = 0x834/4, - FBC_IPOINT_B = 0x838/4, - FBC_IPOINT_A = 0x83c/4, - - FBC_ILINE_ABSX = 0x840/4, - FBC_ILINE_ABSY = 0x844/4, - FBC_ILINE_ABSZ = 0x848/4, - FBC_ILINE_RELX = 0x850/4, - FBC_ILINE_RELY = 0x854/4, - FBC_ILINE_RELZ = 0x858/4, - FBC_ILINE_R = 0x870/4, - FBC_ILINE_G = 0x874/4, - FBC_ILINE_B = 0x878/4, - FBC_ILINE_A = 0x87c/4, - - FBC_ITRI_ABSX = 0x880/4, - FBC_ITRI_ABSY = 0x884/4, - FBC_ITRI_ABSZ = 0x888/4, - FBC_ITRI_RELX = 0x890/4, - FBC_ITRI_RELY = 0x894/4, - FBC_ITRI_RELZ = 0x898/4, - FBC_ITRI_R = 0x8b0/4, - FBC_ITRI_G = 0x8b4/4, - FBC_ITRI_B = 0x8b8/4, - FBC_ITRI_A = 0x8bc/4, - - FBC_IQUAD_ABSX = 0x8c0/4, - FBC_IQUAD_ABSY = 0x8c4/4, - FBC_IQUAD_ABSZ = 0x8c8/4, - FBC_IQUAD_RELX = 0x8d0/4, - FBC_IQUAD_RELY = 0x8d4/4, - FBC_IQUAD_RELZ = 0x8d8/4, - FBC_IQUAD_R = 0x8f0/4, - FBC_IQUAD_G = 0x8f4/4, - FBC_IQUAD_B = 0x8f8/4, - FBC_IQUAD_A = 0x8fc/4, - - FBC_IRECT_ABSX = 0x900/4, - FBC_IRECT_ABSY = 0x904/4, - FBC_IRECT_ABSZ = 0x908/4, - FBC_IRECT_RELX = 0x910/4, - FBC_IRECT_RELY = 0x914/4, - FBC_IRECT_RELZ = 0x918/4, - FBC_IRECT_R = 0x930/4, - FBC_IRECT_G = 0x934/4, - FBC_IRECT_B = 0x938/4, - FBC_IRECT_A = 0x93c/4, - }; - - struct vertex_t - { - uint32_t m_absx; - uint32_t m_absy; - uint32_t m_absz; - uint32_t m_relx; - uint32_t m_rely; - uint32_t m_relz; - uint32_t m_r; - uint32_t m_g; - uint32_t m_b; - uint32_t m_a; - }; - - enum prim_type - { - PRIM_POINT = 0, - PRIM_LINE, - PRIM_TRI, - PRIM_QUAD, - PRIM_RECT, - - PRIM_COUNT - }; - - struct fbc_t - { - uint32_t m_misc; - uint32_t m_clip_check; - uint32_t m_status; - uint32_t m_draw_status; - uint32_t m_blit_status; - uint32_t m_font; - - uint32_t m_x0; - uint32_t m_y0; - uint32_t m_z0; - uint32_t m_color0; - uint32_t m_x1; - uint32_t m_y1; - uint32_t m_z1; - uint32_t m_color1; - uint32_t m_x2; - uint32_t m_y2; - uint32_t m_z2; - uint32_t m_color2; - uint32_t m_x3; - uint32_t m_y3; - uint32_t m_z3; - uint32_t m_color3; - - uint32_t m_raster_offx; - uint32_t m_raster_offy; - - uint32_t m_autoincx; - uint32_t m_autoincy; - - uint32_t m_clip_minx; - uint32_t m_clip_miny; - - uint32_t m_clip_maxx; - uint32_t m_clip_maxy; - - uint8_t m_fcolor; - uint8_t m_bcolor; - - uint32_t m_rasterop; - - uint32_t m_plane_mask; - uint32_t m_pixel_mask; - - uint32_t m_patt_align; - uint32_t m_pattern[8]; - - uint32_t m_ipoint_absx; - uint32_t m_ipoint_absy; - uint32_t m_ipoint_absz; - uint32_t m_ipoint_relx; - uint32_t m_ipoint_rely; - uint32_t m_ipoint_relz; - uint32_t m_ipoint_r; - uint32_t m_ipoint_g; - uint32_t m_ipoint_b; - uint32_t m_ipoint_a; - - uint32_t m_iline_absx; - uint32_t m_iline_absy; - uint32_t m_iline_absz; - uint32_t m_iline_relx; - uint32_t m_iline_rely; - uint32_t m_iline_relz; - uint32_t m_iline_r; - uint32_t m_iline_g; - uint32_t m_iline_b; - uint32_t m_iline_a; - - uint32_t m_itri_absx; - uint32_t m_itri_absy; - uint32_t m_itri_absz; - uint32_t m_itri_relx; - uint32_t m_itri_rely; - uint32_t m_itri_relz; - uint32_t m_itri_r; - uint32_t m_itri_g; - uint32_t m_itri_b; - uint32_t m_itri_a; - - uint32_t m_iquad_absx; - uint32_t m_iquad_absy; - uint32_t m_iquad_absz; - uint32_t m_iquad_relx; - uint32_t m_iquad_rely; - uint32_t m_iquad_relz; - uint32_t m_iquad_r; - uint32_t m_iquad_g; - uint32_t m_iquad_b; - uint32_t m_iquad_a; - - uint32_t m_irect_absx; - uint32_t m_irect_absy; - uint32_t m_irect_absz; - uint32_t m_irect_relx; - uint32_t m_irect_rely; - uint32_t m_irect_relz; - uint32_t m_irect_r; - uint32_t m_irect_g; - uint32_t m_irect_b; - uint32_t m_irect_a; - - vertex_t m_prim_buf[0x1000]; // unknown size - uint32_t m_vertex_count; - prim_type m_curr_prim_type; - }; - - required_memory_region m_rom; - std::unique_ptr m_vram; - required_device m_screen; - required_device m_ramdac; - - fbc_t m_fbc; -}; - -// device type definition -DECLARE_DEVICE_TYPE(SBUS_TURBOGX, sbus_turbogx_device) - -#endif // MAME_BUS_SBUS_TURBOGX_H diff --git a/src/devices/cpu/sparc/mb86901.cpp b/src/devices/cpu/sparc/mb86901.cpp index f01e21909f1..ec7671333d7 100644 --- a/src/devices/cpu/sparc/mb86901.cpp +++ b/src/devices/cpu/sparc/mb86901.cpp @@ -2846,7 +2846,7 @@ void mb86901_device::dispatch_instruction(uint32_t op) if (illegal_IU_instr) { - printf("illegal instruction at %08x\n", PC); + printf("illegal instruction at %08x: %08x\n", PC, op); m_trap = 1; m_illegal_instruction = 1; } diff --git a/src/devices/video/bt45x.cpp b/src/devices/video/bt45x.cpp index 2f676c831fe..4ab4f687e67 100644 --- a/src/devices/video/bt45x.cpp +++ b/src/devices/video/bt45x.cpp @@ -17,12 +17,16 @@ * Bt455 170MHz 4 bit 1 bit 1 4 bit * Bt457 165Mhz 8 bit 2 bit 1 8 bit blinking, multiplexing * Bt458 165MHz 8 bit 2 bit 3 8 bit blinking, multiplexing + * Bt467 220MHz 8 bit 2 bit 3 8 bit blinking, multiplexing [NOTE: Specs are assumed based on Bt458 compatibility) * * Reference: http://www.bitsavers.org/components/brooktree/_dataBooks/1991_Brooktree_Product_Databook.pdf * * The bt45x_mono_device_base uses the standard red/green/blue read/write * cycles defined in the databook, with color data active on the green cycle. * + * The Bt467 is specified in its datasheet as register-compatible with the Bt458. + * As such, it is currently implemented as a simple alias of the Bt458. + * * TODO * - refactor to separate devices with registers * - implement blinking and overlay @@ -45,6 +49,7 @@ DEFINE_DEVICE_TYPE(BT454, bt454_device, "bt454", "Brooktree Bt454 16 Color RAMDA DEFINE_DEVICE_TYPE(BT455, bt455_device, "bt455", "Brooktree Bt455 16 Color RAMDAC") DEFINE_DEVICE_TYPE(BT457, bt457_device, "bt457", "Brooktree Bt457 256 Color RAMDAC") DEFINE_DEVICE_TYPE(BT458, bt458_device, "bt458", "Brooktree Bt458 256 Color RAMDAC") +DEFINE_DEVICE_TYPE(BT467, bt467_device, "bt467", "Brooktree Bt467 256 Color RAMDAC") void bt45x_device_base::map(address_map &map) { @@ -122,8 +127,18 @@ bt457_device::bt457_device(const machine_config &mconfig, const char *tag, devic { } +bt458_device::bt458_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) + : bt45x_rgb_device_base(mconfig, type, tag, owner, clock, 256, 3) +{ +} + bt458_device::bt458_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : bt45x_rgb_device_base(mconfig, BT458, tag, owner, clock, 256, 3) + : bt458_device(mconfig, BT458, tag, owner, clock) +{ +} + +bt467_device::bt467_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : bt458_device(mconfig, BT467, tag, owner, clock) { } diff --git a/src/devices/video/bt45x.h b/src/devices/video/bt45x.h index a81b415eca6..df1114f74dd 100644 --- a/src/devices/video/bt45x.h +++ b/src/devices/video/bt45x.h @@ -169,6 +169,15 @@ class bt458_device : public bt45x_rgb_device_base { public: bt458_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + +protected: + bt458_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); +}; + +class bt467_device : public bt458_device +{ +public: + bt467_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); }; DECLARE_DEVICE_TYPE(BT451, bt451_device) @@ -177,5 +186,6 @@ DECLARE_DEVICE_TYPE(BT454, bt454_device) DECLARE_DEVICE_TYPE(BT455, bt455_device) DECLARE_DEVICE_TYPE(BT457, bt457_device) DECLARE_DEVICE_TYPE(BT458, bt458_device) +DECLARE_DEVICE_TYPE(BT467, bt467_device) #endif // MAME_VIDEO_BT45X_H -- cgit v1.2.3