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Diffstat (limited to 'src/mame/machine/twincobr.cpp')
-rw-r--r--src/mame/machine/twincobr.cpp39
1 files changed, 17 insertions, 22 deletions
diff --git a/src/mame/machine/twincobr.cpp b/src/mame/machine/twincobr.cpp
index 5fa63ece69a..2bfdbbf9f79 100644
--- a/src/mame/machine/twincobr.cpp
+++ b/src/mame/machine/twincobr.cpp
@@ -34,7 +34,7 @@ WRITE_LINE_MEMBER(twincobr_state::wardner_vblank_irq)
}
-WRITE16_MEMBER(twincobr_state::twincobr_dsp_addrsel_w)
+void twincobr_state::twincobr_dsp_addrsel_w(u16 data)
{
/* This sets the main CPU RAM address the DSP should */
/* read/write, via the DSP IO port 0 */
@@ -50,11 +50,11 @@ WRITE16_MEMBER(twincobr_state::twincobr_dsp_addrsel_w)
LOG(("DSP PC:%04x IO write %04x (%08x) at port 0\n",m_dsp->pcbase(),data,m_main_ram_seg + m_dsp_addr_w));
}
-READ16_MEMBER(twincobr_state::twincobr_dsp_r)
+u16 twincobr_state::twincobr_dsp_r()
{
/* DSP can read data from main CPU RAM via DSP IO port 1 */
- uint16_t input_data = 0;
+ u16 input_data = 0;
switch (m_main_ram_seg)
{
case 0x30000:
@@ -68,7 +68,7 @@ READ16_MEMBER(twincobr_state::twincobr_dsp_r)
return input_data;
}
-WRITE16_MEMBER(twincobr_state::twincobr_dsp_w)
+void twincobr_state::twincobr_dsp_w(u16 data)
{
/* Data written to main CPU RAM via DSP IO port 1 */
m_dsp_execute = 0;
@@ -84,7 +84,7 @@ WRITE16_MEMBER(twincobr_state::twincobr_dsp_w)
LOG(("DSP PC:%04x IO write %04x at %08x (port 1)\n",m_dsp->pcbase(),data,m_main_ram_seg + m_dsp_addr_w));
}
-WRITE16_MEMBER(twincobr_state::wardner_dsp_addrsel_w)
+void twincobr_state::wardner_dsp_addrsel_w(u16 data)
{
/* This sets the main CPU RAM address the DSP should */
/* read/write, via the DSP IO port 0 */
@@ -99,11 +99,11 @@ WRITE16_MEMBER(twincobr_state::wardner_dsp_addrsel_w)
LOG(("DSP PC:%04x IO write %04x (%08x) at port 0\n",m_dsp->pcbase(),data,m_main_ram_seg + m_dsp_addr_w));
}
-READ16_MEMBER(twincobr_state::wardner_dsp_r)
+u16 twincobr_state::wardner_dsp_r()
{
/* DSP can read data from main CPU RAM via DSP IO port 1 */
- uint16_t input_data = 0;
+ u16 input_data = 0;
switch (m_main_ram_seg)
{
case 0x7000:
@@ -118,7 +118,7 @@ READ16_MEMBER(twincobr_state::wardner_dsp_r)
return input_data;
}
-WRITE16_MEMBER(twincobr_state::wardner_dsp_w)
+void twincobr_state::wardner_dsp_w(u16 data)
{
/* Data written to main CPU RAM via DSP IO port 1 */
m_dsp_execute = 0;
@@ -135,7 +135,7 @@ WRITE16_MEMBER(twincobr_state::wardner_dsp_w)
LOG(("DSP PC:%04x IO write %04x at %08x (port 1)\n",m_dsp->pcbase(),data,m_main_ram_seg + m_dsp_addr_w));
}
-WRITE16_MEMBER(twincobr_state::twincobr_dsp_bio_w)
+void twincobr_state::twincobr_dsp_bio_w(u16 data)
{
/* data 0xffff means inhibit BIO line to DSP and enable */
/* communication to main processor */
@@ -159,7 +159,7 @@ WRITE16_MEMBER(twincobr_state::twincobr_dsp_bio_w)
}
}
-READ16_MEMBER(twincobr_state::fsharkbt_dsp_r)
+u16 twincobr_state::fsharkbt_dsp_r()
{
/* IO Port 2 used by Flying Shark bootleg */
/* DSP reads data from an extra MCU (8741) at IO port 2 */
@@ -170,7 +170,7 @@ READ16_MEMBER(twincobr_state::fsharkbt_dsp_r)
return (m_fsharkbt_8741 & 1);
}
-WRITE16_MEMBER(twincobr_state::fsharkbt_dsp_w)
+void twincobr_state::fsharkbt_dsp_w(u16 data)
{
/* Flying Shark bootleg DSP writes data to an extra MCU (8741) at IO port 2 */
#if 0
@@ -209,7 +209,7 @@ WRITE_LINE_MEMBER(twincobr_state::dsp_int_w)
}
}
-void twincobr_state::twincobr_restore_dsp()
+void twincobr_state::device_post_load()
{
dsp_int_w(m_dsp_on);
}
@@ -236,21 +236,18 @@ WRITE_LINE_MEMBER(twincobr_state::coin_lockout_2_w)
}
-READ16_MEMBER(twincobr_state::twincobr_sharedram_r)
+u8 twincobr_state::twincobr_sharedram_r(offs_t offset)
{
return m_sharedram[offset];
}
-WRITE16_MEMBER(twincobr_state::twincobr_sharedram_w)
+void twincobr_state::twincobr_sharedram_w(offs_t offset, u8 data)
{
- if (ACCESSING_BITS_0_7)
- {
- m_sharedram[offset] = data & 0xff;
- }
+ m_sharedram[offset] = data;
}
-MACHINE_RESET_MEMBER(twincobr_state,twincobr)
+void twincobr_state::machine_reset()
{
m_dsp_addr_w = 0;
m_main_ram_seg = 0;
@@ -259,7 +256,7 @@ MACHINE_RESET_MEMBER(twincobr_state,twincobr)
m_fsharkbt_8741 = -1;
}
-void twincobr_state::twincobr_driver_savestate()
+void twincobr_state::driver_savestate()
{
save_item(NAME(m_intenable));
save_item(NAME(m_dsp_on));
@@ -268,6 +265,4 @@ void twincobr_state::twincobr_driver_savestate()
save_item(NAME(m_dsp_bio));
save_item(NAME(m_dsp_execute));
save_item(NAME(m_fsharkbt_8741));
-
- machine().save().register_postload(save_prepost_delegate(FUNC(twincobr_state::twincobr_restore_dsp), this));
}