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Diffstat (limited to 'src/mame/drivers/vp101.cpp')
-rw-r--r--src/mame/drivers/vp101.cpp105
1 files changed, 93 insertions, 12 deletions
diff --git a/src/mame/drivers/vp101.cpp b/src/mame/drivers/vp101.cpp
index 69987b5d419..6353ac6bb17 100644
--- a/src/mame/drivers/vp101.cpp
+++ b/src/mame/drivers/vp101.cpp
@@ -5,51 +5,116 @@
Play Mechanix / Right Hand Tech "VP100" and "VP101" platforms
(PCBs are also marked "Raw Thrills" but all RT games appear to be on PC hardware)
- Skeleton driver by R. Belmont
+ Preliminary driver by R. Belmont
MIPS VR5500 at 300 to 400 MHz
Xilinx Virtex-II FPGA with custom 3D hardware and 1 or 2 PowerPC 405 CPU cores
AC97 audio with custom DMA frontend which streams 8 stereo channels
PIC18c442 protection chip (not readable) on VP101 only (VP100 is unprotected?)
+ 1 MB of VRAM at main RAM offset 0x07400000
+
****************************************************************************/
#include "emu.h"
#include "cpu/mips/mips3.h"
#include "machine/ataintf.h"
+#include "machine/nvram.h"
+#include "imagedev/harddriv.h"
#include "screen.h"
-
class vp10x_state : public driver_device
{
public:
vp10x_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
- m_maincpu(*this, "maincpu")
+ m_maincpu(*this, "maincpu"),
+ m_mainram(*this, "mainram"),
+ m_ata(*this, "ata")
{ }
DECLARE_READ32_MEMBER(tty_ready_r);
DECLARE_WRITE32_MEMBER(tty_w);
-
- uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
+ DECLARE_READ32_MEMBER(test_r) { return 0xffffffff; }
+
+ DECLARE_READ32_MEMBER(pic_r);
+ DECLARE_WRITE32_MEMBER(pic_w);
+
+ uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
protected:
// devices
required_device<mips3_device> m_maincpu;
+ required_shared_ptr<uint32_t> m_mainram;
+ required_device<ata_interface_device> m_ata;
// driver_device overrides
virtual void video_start() override;
+ int pic_cmd;
+ int pic_state;
};
+READ32_MEMBER(vp10x_state::pic_r)
+{
+ static const uint8_t vers[5] = { 0x00, 0x01, 0x00, 0x00, 0x00 };
+ static const uint8_t serial[10] = { 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0a };
+ static const uint8_t magic[10] = { 0xaa, 0x55, 0x18, 0x18, 0xc0, 0x03, 0xf0, 0x0f, 0x09, 0x0a };
+
+ switch (pic_cmd)
+ {
+ case 0x20:
+ return vers[pic_state++];
+
+ case 0x21:
+ case 0x22:
+ return serial[pic_state++];
+
+ case 0x23: // this is the same for jnero and specfrce. great security!
+ return magic[pic_state++];
+ }
+
+ return 0;
+}
+
+WRITE32_MEMBER(vp10x_state::pic_w)
+{
+ //printf("%02x to pic_cmd\n", data&0xff);
+ if ((data & 0xff) == 0)
+ {
+ return;
+ }
+ pic_cmd = data & 0xff;
+ pic_state = 0;
+}
+
void vp10x_state::video_start()
{
+ pic_cmd = pic_state = 0;
}
-uint32_t vp10x_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
+uint32_t vp10x_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
{
+ const uint32_t *video_ram;
+ uint32_t word;
+ uint32_t *line;
+ int y, x;
+
+ for (y = 0; y < 240; y++)
+ {
+ line = &bitmap.pix32(y);
+ video_ram = (const uint32_t *) &m_mainram[(0x7400000/4) + (y * (0x1000/4)) + 4];
+
+ for (x = 0; x < 320; x++)
+ {
+ word = *(video_ram++);
+ video_ram++;
+ *line++ = word;
+ }
+ }
+
return 0;
}
@@ -62,24 +127,39 @@ WRITE32_MEMBER(vp10x_state::tty_w) // set breakpoint at bfc01430 to catch when
{
// uncomment to see startup messages - it says "RAM OK" and "EPI RSS Ver 4.5.1" followed by "<RSS active>" and then lots of dots
// Special Forces also says "<inited tv_cap> = 00000032"
-// printf("%c", data);
+// printf("%c", data);
}
static ADDRESS_MAP_START( main_map, AS_PROGRAM, 32, vp10x_state )
- AM_RANGE(0x00000000, 0x07ffffff) AM_RAM // this is a sufficient amount to get "RAM OK"
+ AM_RANGE(0x00000000, 0x07ffffff) AM_RAM AM_SHARE("mainram") // this is a sufficient amount to get "RAM OK"
+ AM_RANGE(0x14000000, 0x14000003) AM_READ(test_r)
AM_RANGE(0x1c000000, 0x1c000003) AM_WRITE(tty_w) // RSS OS code uses this one
AM_RANGE(0x1c000014, 0x1c000017) AM_READ(tty_ready_r)
AM_RANGE(0x1c400000, 0x1c400003) AM_WRITE(tty_w) // boot ROM code uses this one
AM_RANGE(0x1c400014, 0x1c400017) AM_READ(tty_ready_r)
+ AM_RANGE(0x1ca0000c, 0x1ca0000f) AM_READ_PORT("IN0")
+ AM_RANGE(0x1ca00010, 0x1ca00013) AM_READ(test_r) // bits here cause various test mode stuff
+ AM_RANGE(0x1cf00000, 0x1cf00003) AM_NOP AM_READNOP
+ AM_RANGE(0x1d000040, 0x1d00005f) AM_DEVREADWRITE16("ata", ata_interface_device, read_cs0, write_cs0, 0x0000ffff)
+ AM_RANGE(0x1d000060, 0x1d00007f) AM_DEVREADWRITE16("ata", ata_interface_device, read_cs1, write_cs1, 0x0000ffff)
+ AM_RANGE(0x1f200000, 0x1f200003) AM_READWRITE(pic_r, pic_w)
+ AM_RANGE(0x1f807000, 0x1f807fff) AM_RAM AM_SHARE("nvram")
AM_RANGE(0x1fc00000, 0x1fffffff) AM_ROM AM_REGION("maincpu", 0)
ADDRESS_MAP_END
static INPUT_PORTS_START( vp101 )
+ PORT_START("IN0")
+ PORT_BIT( 0x00000001, IP_ACTIVE_LOW, IPT_COIN1 )
+ PORT_BIT( 0x00000002, IP_ACTIVE_LOW, IPT_START1 )
+ PORT_BIT( 0x00000004, IP_ACTIVE_LOW, IPT_COIN2 )
+ PORT_BIT( 0x00000008, IP_ACTIVE_LOW, IPT_START2 )
+
+ PORT_BIT( 0xfffffff0, IP_ACTIVE_HIGH, IPT_UNKNOWN )
INPUT_PORTS_END
static MACHINE_CONFIG_START( vp101, vp10x_state )
- MCFG_CPU_ADD("maincpu", R5000LE, 300000000) /* actually VR5500 with added NEC VR-series custom instructions */
+ MCFG_CPU_ADD("maincpu", R5000LE, 400000000) /* actually VR5500 with added NEC VR-series custom instructions */
MCFG_MIPS3_ICACHE_SIZE(32768)
MCFG_MIPS3_DCACHE_SIZE(32768)
MCFG_MIPS3_SYSTEM_CLOCK(100000000)
@@ -91,9 +171,10 @@ static MACHINE_CONFIG_START( vp101, vp10x_state )
MCFG_SCREEN_UPDATE_DRIVER(vp10x_state, screen_update)
MCFG_SCREEN_SIZE(320, 240)
MCFG_SCREEN_VISIBLE_AREA(0, 319, 0, 239)
- MCFG_SCREEN_PALETTE("palette")
-
- MCFG_PALETTE_ADD("palette", 32768)
+
+ MCFG_ATA_INTERFACE_ADD("ata", ata_devices, "hdd", nullptr, false)
+
+ MCFG_NVRAM_ADD_0FILL("nvram")
MACHINE_CONFIG_END