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Diffstat (limited to 'src/mame/drivers/trs80.cpp')
-rw-r--r--src/mame/drivers/trs80.cpp92
1 files changed, 44 insertions, 48 deletions
diff --git a/src/mame/drivers/trs80.cpp b/src/mame/drivers/trs80.cpp
index 41bb67287bf..9d1d20c9c66 100644
--- a/src/mame/drivers/trs80.cpp
+++ b/src/mame/drivers/trs80.cpp
@@ -502,17 +502,18 @@ static void trs80_floppies(device_slot_interface &device)
}
-MACHINE_CONFIG_START(trs80_state::trs80) // the original model I, level I, with no extras
+void trs80_state::trs80(machine_config &config) // the original model I, level I, with no extras
+{
/* basic machine hardware */
- MCFG_DEVICE_ADD("maincpu", Z80, 10.6445_MHz_XTAL / 6)
- MCFG_DEVICE_PROGRAM_MAP(trs80_mem)
- MCFG_DEVICE_IO_MAP(trs80_io)
+ Z80(config, m_maincpu, 10.6445_MHz_XTAL / 6);
+ m_maincpu->set_addrmap(AS_PROGRAM, &trs80_state::trs80_mem);
+ m_maincpu->set_addrmap(AS_IO, &trs80_state::trs80_io);
/* video hardware */
- MCFG_SCREEN_ADD("screen", RASTER)
- MCFG_SCREEN_RAW_PARAMS(10.6445_MHz_XTAL, 672, 0, 384, 264, 0, 192)
- MCFG_SCREEN_UPDATE_DRIVER(trs80_state, screen_update_trs80)
- MCFG_SCREEN_PALETTE("palette")
+ screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
+ screen.set_raw(10.6445_MHz_XTAL, 672, 0, 384, 264, 0, 192);
+ screen.set_screen_update(FUNC(trs80_state::screen_update_trs80));
+ screen.set_palette("palette");
GFXDECODE(config, "gfxdecode", "palette", gfx_trs80);
PALETTE(config, "palette", palette_device::MONOCHROME);
@@ -524,15 +525,14 @@ MACHINE_CONFIG_START(trs80_state::trs80) // the original model I, level I,
/* devices */
CASSETTE(config, m_cassette);
-MACHINE_CONFIG_END
+}
MACHINE_CONFIG_START(trs80_state::model1) // model I, level II
trs80(config);
- MCFG_DEVICE_MODIFY("maincpu")
- MCFG_DEVICE_PROGRAM_MAP(m1_mem)
- MCFG_DEVICE_IO_MAP(m1_io)
- MCFG_DEVICE_PERIODIC_INT_DRIVER(trs80_state, rtc_interrupt, 40)
+ m_maincpu->set_addrmap(AS_PROGRAM, &trs80_state::m1_mem);
+ m_maincpu->set_addrmap(AS_IO, &trs80_state::m1_io);
+ m_maincpu->set_periodic_int(FUNC(trs80_state::rtc_interrupt), attotime::from_hz(40));
/* devices */
m_cassette->set_formats(trs80l2_cassette_formats);
@@ -571,46 +571,44 @@ MACHINE_CONFIG_START(trs80_state::model1) // model I, level II
RS232_PORT(config, "rs232", default_rs232_devices, nullptr);
MACHINE_CONFIG_END
-MACHINE_CONFIG_START(trs80_state::sys80)
+void trs80_state::sys80(machine_config &config)
+{
model1(config);
- MCFG_DEVICE_MODIFY("maincpu")
- MCFG_DEVICE_IO_MAP(sys80_io)
+ m_maincpu->set_addrmap(AS_IO, &trs80_state::sys80_io);
config.device_remove("brg");
CLOCK(config, m_uart_clock, 19200 * 16);
m_uart_clock->signal_handler().set(m_uart, FUNC(ay31015_device::write_rcp));
m_uart_clock->signal_handler().append(m_uart, FUNC(ay31015_device::write_tcp));
-MACHINE_CONFIG_END
+}
-MACHINE_CONFIG_START(trs80_state::sys80p)
+void trs80_state::sys80p(machine_config &config)
+{
sys80(config);
- MCFG_DEVICE_MODIFY("maincpu")
- MCFG_DEVICE_CLOCK(10.48_MHz_XTAL / 6)
- MCFG_DEVICE_MODIFY("screen")
- MCFG_SCREEN_RAW_PARAMS(10.48_MHz_XTAL, 672, 0, 384, 312, 0, 192)
-MACHINE_CONFIG_END
+ m_maincpu->set_clock(10.48_MHz_XTAL / 6);
+ subdevice<screen_device>("screen")->set_raw(10.48_MHz_XTAL, 672, 0, 384, 312, 0, 192);
+}
-MACHINE_CONFIG_START(trs80_state::ht1080z)
+void trs80_state::ht1080z(machine_config &config)
+{
sys80p(config);
- MCFG_DEVICE_MODIFY("maincpu")
- MCFG_DEVICE_IO_MAP(ht1080z_io)
+ m_maincpu->set_addrmap(AS_IO, &trs80_state::ht1080z_io);
- MCFG_SCREEN_MODIFY("screen")
- MCFG_SCREEN_UPDATE_DRIVER(trs80_state, screen_update_ht1080z)
+ subdevice<screen_device>("screen")->set_screen_update(FUNC(trs80_state::screen_update_ht1080z));
subdevice<gfxdecode_device>("gfxdecode")->set_info(gfx_ht1080z);
AY8910(config, "ay1", 1'500'000).add_route(ALL_OUTPUTS, "mono", 0.25); // guess of clock
//ay1.port_a_read_callback(FUNC(trs80_state::...); // ports are some kind of expansion slot
//ay1.port_b_read_callback(FUNC(trs80_state::...);
-MACHINE_CONFIG_END
+}
-MACHINE_CONFIG_START(trs80_state::lnw80)
+void trs80_state::lnw80(machine_config &config)
+{
model1(config);
- MCFG_DEVICE_MODIFY("maincpu")
- //MCFG_DEVICE_CLOCK(16_MHz_XTAL / 4) // or 16MHz / 9; 4MHz or 1.77MHz operation selected by HI/LO switch
- MCFG_DEVICE_CLOCK(16_MHz_XTAL / 9) // need this so cassette can work
- MCFG_DEVICE_PROGRAM_MAP(lnw80_mem)
- MCFG_DEVICE_IO_MAP(lnw80_io)
+ //m_maincpu->set_clock(16_MHz_XTAL / 4); // or 16MHz / 9; 4MHz or 1.77MHz operation selected by HI/LO switch
+ m_maincpu->set_clock(16_MHz_XTAL / 9); // need this so cassette can work
+ m_maincpu->set_addrmap(AS_PROGRAM, &trs80_state::lnw80_mem);
+ m_maincpu->set_addrmap(AS_IO, &trs80_state::lnw80_io);
ADDRESS_MAP_BANK(config, m_lnw_bank, 0);
m_lnw_bank->set_addrmap(0, &trs80_state::lnw_banked_mem);
@@ -623,30 +621,28 @@ MACHINE_CONFIG_START(trs80_state::lnw80)
subdevice<gfxdecode_device>("gfxdecode")->set_info(gfx_lnw80);
subdevice<palette_device>("palette")->set_entries(8).set_init(FUNC(trs80_state::lnw80_palette));
- MCFG_SCREEN_MODIFY("screen")
- MCFG_SCREEN_RAW_PARAMS(3.579545_MHz_XTAL * 3, 682, 0, 480, 264, 0, 192) // 10.738MHz generated by tank circuit (top left of page 2 of schematics)
+ subdevice<screen_device>("screen")->set_raw(3.579545_MHz_XTAL * 3, 682, 0, 480, 264, 0, 192); // 10.738MHz generated by tank circuit (top left of page 2 of schematics)
// LNW80 Theory of Operations gives H and V periods as 15.750kHz and 59.66Hz, probably due to rounding the calculated ~15.7468kHz to 4 figures
- MCFG_SCREEN_UPDATE_DRIVER(trs80_state, screen_update_lnw80)
+ subdevice<screen_device>("screen")->set_screen_update(FUNC(trs80_state::screen_update_lnw80));
config.device_remove("brg");
CLOCK(config, m_uart_clock, 19200 * 16);
m_uart_clock->signal_handler().set(m_uart, FUNC(ay31015_device::write_rcp));
m_uart_clock->signal_handler().append(m_uart, FUNC(ay31015_device::write_tcp));
-MACHINE_CONFIG_END
+}
-MACHINE_CONFIG_START(trs80_state::radionic)
+void trs80_state::radionic(machine_config &config)
+{
model1(config);
- MCFG_DEVICE_MODIFY("maincpu")
- MCFG_DEVICE_CLOCK(12_MHz_XTAL / 6) // or 3.579MHz / 2 (selectable?)
+ m_maincpu->set_clock(12_MHz_XTAL / 6); // or 3.579MHz / 2 (selectable?)
// Komtek I "User Friendly Manual" calls for "Z80 running at 1.97 MHz." This likely refers to an alternate NTSC version
// whose master clock was approximately 11.8005 MHz (6 times ~1.966 MHz and 750 times 15.734 kHz). Though the schematics
// provide the main XTAL frequency as 12 MHz, that they also include a 3.579 MHz XTAL suggests this possibility.
- MCFG_DEVICE_PERIODIC_INT_DRIVER(trs80_state, nmi_line_pulse, 12_MHz_XTAL / 12 / 16384)
- MCFG_DEVICE_PROGRAM_MAP(radionic_mem)
+ m_maincpu->set_periodic_int(FUNC(trs80_state::nmi_line_pulse), attotime::from_hz(12_MHz_XTAL / 12 / 16384));
+ m_maincpu->set_addrmap(AS_PROGRAM, &trs80_state::radionic_mem);
- MCFG_SCREEN_MODIFY("screen")
- MCFG_SCREEN_RAW_PARAMS(12_MHz_XTAL, 768, 0, 512, 312, 0, 256)
- MCFG_SCREEN_UPDATE_DRIVER(trs80_state, screen_update_radionic)
+ subdevice<screen_device>("screen")->set_raw(12_MHz_XTAL, 768, 0, 512, 312, 0, 256);
+ subdevice<screen_device>("screen")->set_screen_update(FUNC(trs80_state::screen_update_radionic));
subdevice<gfxdecode_device>("gfxdecode")->set_info(gfx_radionic);
// Interface to external circuits
@@ -655,7 +651,7 @@ MACHINE_CONFIG_START(trs80_state::radionic)
//m_ppi->out_pa_callback().set(FUNC(pulsar_state::ppi_pa_w)); // Data for external plugin printer module
//m_ppi->out_pb_callback().set(FUNC(pulsar_state::ppi_pb_w)); // Control data to external
//m_ppi->out_pc_callback().set(FUNC(pulsar_state::ppi_pc_w)); // Printer strobe
-MACHINE_CONFIG_END
+}
/***************************************************************************