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Diffstat (limited to 'src/mame/drivers/suna8.cpp')
-rw-r--r--src/mame/drivers/suna8.cpp87
1 files changed, 43 insertions, 44 deletions
diff --git a/src/mame/drivers/suna8.cpp b/src/mame/drivers/suna8.cpp
index c95e0de37b1..61e0e1cbb55 100644
--- a/src/mame/drivers/suna8.cpp
+++ b/src/mame/drivers/suna8.cpp
@@ -477,7 +477,7 @@ void suna8_state::init_sparkman()
Hard Head
***************************************************************************/
-READ8_MEMBER(suna8_state::hardhead_protection_r)
+uint8_t suna8_state::hardhead_protection_r(offs_t offset)
{
uint8_t protection_val = m_protection_val;
@@ -490,7 +490,7 @@ READ8_MEMBER(suna8_state::hardhead_protection_r)
(((offset ^ protection_val) & 0x01) ? 0x84 : 0);
}
-WRITE8_MEMBER(suna8_state::hardhead_protection_w)
+void suna8_state::hardhead_protection_w(offs_t offset, uint8_t data)
{
if (data & 0x80) m_protection_val = data;
else m_protection_val = offset & 1;
@@ -509,7 +509,7 @@ WRITE8_MEMBER(suna8_state::hardhead_protection_w)
Hard Head
***************************************************************************/
-READ8_MEMBER(suna8_state::hardhead_ip_r)
+uint8_t suna8_state::hardhead_ip_r()
{
switch (*m_hardhead_ip)
{
@@ -528,7 +528,7 @@ READ8_MEMBER(suna8_state::hardhead_ip_r)
---4 ----
---- 3210 ROM Bank
*/
-WRITE8_MEMBER(suna8_state::hardhead_bankswitch_w)
+void suna8_state::hardhead_bankswitch_w(uint8_t data)
{
int bank = data & 0x0f;
@@ -543,7 +543,7 @@ WRITE8_MEMBER(suna8_state::hardhead_bankswitch_w)
---- -2-- Flip Screen
---- --10
*/
-WRITE8_MEMBER(suna8_state::hardhead_flipscreen_w)
+void suna8_state::hardhead_flipscreen_w(uint8_t data)
{
flip_screen_set(data & 0x04);
machine().bookkeeping().coin_lockout_w(0, data & 0x08);
@@ -584,7 +584,7 @@ void suna8_state::hardhead_io_map(address_map &map)
---- 3---
---- -210 ROM Bank
*/
-WRITE8_MEMBER(suna8_state::rranger_bankswitch_w)
+void suna8_state::rranger_bankswitch_w(uint8_t data)
{
int bank = data & 0x07;
if ((~data & 0x10) && (bank >= 4)) bank += 4;
@@ -606,13 +606,13 @@ WRITE8_MEMBER(suna8_state::rranger_bankswitch_w)
---- --1- 1 -> Interlude screens
---- ---0
*/
-READ8_MEMBER(suna8_state::rranger_soundstatus_r)
+uint8_t suna8_state::rranger_soundstatus_r()
{
m_soundlatch2->read();
return 0x02;
}
-WRITE8_MEMBER(suna8_state::sranger_prot_w)
+void suna8_state::sranger_prot_w(uint8_t data)
{
/* check code at 0x2ce2 (in sranger), protection is so dire that I can't even exactly
estabilish if what I'm doing can be considered or not a kludge... -AS */
@@ -655,7 +655,7 @@ void suna8_state::rranger_io_map(address_map &map)
---- --1-
---- ---0 Use Cheat 1 and 2 (driver config)
*/
-READ8_MEMBER(suna8_state::brickzn_cheats_r)
+uint8_t suna8_state::brickzn_cheats_r()
{
static uint8_t bit2 = 0;
bit2 = 1 - bit2; // see code at 2b48
@@ -670,7 +670,7 @@ READ8_MEMBER(suna8_state::brickzn_cheats_r)
---- --1- Sprite RAM Bank
---- ---0 Flip Screen
*/
-WRITE8_MEMBER(suna8_state::brickzn_sprbank_w)
+void suna8_state::brickzn_sprbank_w(uint8_t data)
{
m_protection_val = data;
@@ -686,7 +686,7 @@ WRITE8_MEMBER(suna8_state::brickzn_sprbank_w)
C060: 7654 ----
---- 3210 ROM Bank
*/
-WRITE8_MEMBER(suna8_state::brickzn_rombank_w)
+void suna8_state::brickzn_rombank_w(uint8_t data)
{
int bank = data & 0x0f;
@@ -706,7 +706,7 @@ WRITE8_MEMBER(suna8_state::brickzn_rombank_w)
---- --1- Start 2 Led
---- ---0 Start 1 Led
*/
-WRITE8_MEMBER(suna8_state::brickzn_leds_w)
+void suna8_state::brickzn_leds_w(uint8_t data)
{
m_leds[0] = BIT(data, 0);
m_leds[1] = BIT(data, 1);
@@ -720,7 +720,7 @@ WRITE8_MEMBER(suna8_state::brickzn_leds_w)
C0A0: 7654 321-
---- ---0 Palette RAM Bank
*/
-WRITE8_MEMBER(suna8_state::brickzn_palbank_w)
+void suna8_state::brickzn_palbank_w(uint8_t data)
{
m_palettebank = data & 0x01;
@@ -763,13 +763,13 @@ void suna8_state::brickzn11_map(address_map &map)
C0A0: Leds
*/
-WRITE8_MEMBER(suna8_state::brickzn_multi_w)
+void suna8_state::brickzn_multi_w(uint8_t data)
{
int protselect = m_protection_val & 0xfc;
if ((protselect == 0x88) || (protselect == 0x8c))
{
- brickzn_palbank_w(space, offset, data, mem_mask);
+ brickzn_palbank_w(data);
}
else if (protselect == 0x90)
{
@@ -790,7 +790,7 @@ WRITE8_MEMBER(suna8_state::brickzn_multi_w)
}
else if (protselect == 0x04)
{
- brickzn_leds_w(space, offset, data, mem_mask);
+ brickzn_leds_w(data);
}
else if (protselect == 0x80)
{
@@ -826,7 +826,7 @@ WRITE8_MEMBER(suna8_state::brickzn_multi_w)
(newer sets only)
C0C0: two protection values written in rapid succession
*/
-WRITE8_MEMBER(suna8_state::brickzn_prot2_w)
+void suna8_state::brickzn_prot2_w(uint8_t data)
{
// Disable work RAM write, see code at 96a:
if ((m_prot2 ^ data) == 0x24)
@@ -848,11 +848,11 @@ WRITE8_MEMBER(suna8_state::brickzn_prot2_w)
}
// (newer sets only) Disable palette RAM writes, see code at 4990:
-WRITE8_MEMBER(suna8_state::brickzn_enab_palram_w)
+void suna8_state::brickzn_enab_palram_w(uint8_t data)
{
m_paletteram_enab = 1;
}
-WRITE8_MEMBER(suna8_state::brickzn_disab_palram_w)
+void suna8_state::brickzn_disab_palram_w(uint8_t data)
{
m_paletteram_enab = 0;
}
@@ -904,7 +904,7 @@ void suna8_state::brickzn_io_map(address_map &map)
***************************************************************************/
/* Probably wrong: */
-WRITE8_MEMBER(suna8_state::hardhea2_nmi_w)
+void suna8_state::hardhea2_nmi_w(uint8_t data)
{
m_nmi_enable = data & 0x01;
// if (data & ~0x01) logerror("CPU #0 - PC %04X: unknown nmi bits: %02X\n",m_maincpu->pc(),data);
@@ -914,13 +914,13 @@ WRITE8_MEMBER(suna8_state::hardhea2_nmi_w)
7654 321-
---- ---0 Flip Screen
*/
-WRITE8_MEMBER(suna8_state::hardhea2_flipscreen_w)
+void suna8_state::hardhea2_flipscreen_w(uint8_t data)
{
flip_screen_set(data & 0x01);
if (data & ~0x01) logerror("CPU #0 - PC %04X: unknown flipscreen bits: %02X\n",m_maincpu->pc(),data);
}
-WRITE8_MEMBER(suna8_state::hardhea2_leds_w)
+void suna8_state::hardhea2_leds_w(uint8_t data)
{
m_leds[0] = BIT(data, 0);
m_leds[1] = BIT(data, 1);
@@ -933,7 +933,7 @@ WRITE8_MEMBER(suna8_state::hardhea2_leds_w)
---- --1- Sprite RAM Bank
---- ---0 Sprite RAM Bank?
*/
-WRITE8_MEMBER(suna8_state::hardhea2_spritebank_w)
+void suna8_state::hardhea2_spritebank_w(uint8_t data)
{
m_spritebank = (data >> 1) & 1;
if (data & ~0x02) logerror("CPU #0 - PC %04X: unknown spritebank bits: %02X\n",m_maincpu->pc(),data);
@@ -943,7 +943,7 @@ WRITE8_MEMBER(suna8_state::hardhea2_spritebank_w)
7654 ----
---- 3210 ROM Bank
*/
-WRITE8_MEMBER(suna8_state::hardhea2_rombank_w)
+void suna8_state::hardhea2_rombank_w(uint8_t data)
{
int bank = data & 0x0f;
@@ -954,21 +954,21 @@ WRITE8_MEMBER(suna8_state::hardhea2_rombank_w)
m_rombank = data;
}
-WRITE8_MEMBER(suna8_state::hardhea2_spritebank_0_w)
+void suna8_state::hardhea2_spritebank_0_w(uint8_t data)
{
m_spritebank = 0;
}
-WRITE8_MEMBER(suna8_state::hardhea2_spritebank_1_w)
+void suna8_state::hardhea2_spritebank_1_w(uint8_t data)
{
m_spritebank = 1;
}
-WRITE8_MEMBER(suna8_state::hardhea2_rambank_0_w)
+void suna8_state::hardhea2_rambank_0_w(uint8_t data)
{
membank("bank2")->set_entry(0);
}
-WRITE8_MEMBER(suna8_state::hardhea2_rambank_1_w)
+void suna8_state::hardhea2_rambank_1_w(uint8_t data)
{
membank("bank2")->set_entry(1);
}
@@ -1039,7 +1039,7 @@ void suna8_state::hardhea2b_decrypted_opcodes_map(address_map &map)
---4 ----
---- 3210 ROM Bank (Latched)
*/
-WRITE8_MEMBER(suna8_state::starfigh_rombank_latch_w)
+void suna8_state::starfigh_rombank_latch_w(offs_t offset, uint8_t data)
{
logerror("CPU #0 - PC %04X: rom bank latch %04X = %02X\n",m_maincpu->pc(), 0xc280 + offset, data);
m_rombank_latch = data;
@@ -1048,7 +1048,7 @@ WRITE8_MEMBER(suna8_state::starfigh_rombank_latch_w)
/*
C500: Sound Latch
*/
-WRITE8_MEMBER(suna8_state::starfigh_sound_latch_w)
+void suna8_state::starfigh_sound_latch_w(uint8_t data)
{
if ( !(m_rombank_latch & 0x20) )
m_soundlatch->write(data);
@@ -1057,7 +1057,7 @@ WRITE8_MEMBER(suna8_state::starfigh_sound_latch_w)
/*
C080:
*/
-READ8_MEMBER(suna8_state::starfigh_cheats_r)
+uint8_t suna8_state::starfigh_cheats_r()
{
return ioport("CHEATS")->read();
}
@@ -1065,7 +1065,7 @@ READ8_MEMBER(suna8_state::starfigh_cheats_r)
/*
C380-C3FF:
*/
-WRITE8_MEMBER(suna8_state::starfigh_spritebank_latch_w)
+void suna8_state::starfigh_spritebank_latch_w(uint8_t data)
{
// bit 1 = disable RAM writes. See code at 2696, 4e8f
m_spritebank_latch = (data >> 2) & 1;
@@ -1076,7 +1076,7 @@ WRITE8_MEMBER(suna8_state::starfigh_spritebank_latch_w)
/*
C200:
*/
-WRITE8_MEMBER(suna8_state::starfigh_spritebank_w)
+void suna8_state::starfigh_spritebank_w(uint8_t data)
{
m_spritebank = m_spritebank_latch;
}
@@ -1090,7 +1090,7 @@ WRITE8_MEMBER(suna8_state::starfigh_spritebank_w)
Writes to C400 also set ROM bank from latch
*/
-WRITE8_MEMBER(suna8_state::starfigh_leds_w)
+void suna8_state::starfigh_leds_w(uint8_t data)
{
m_leds[0] = BIT(data, 0);
m_leds[1] = BIT(data, 1);
@@ -1143,7 +1143,7 @@ void suna8_state::starfigh_map(address_map &map)
------1- Sprite RAM Bank (Inverted by Sprite Bank Latch)
-------0 Sprite "chip" ""
*/
-WRITE8_MEMBER(suna8_state::sparkman_spritebank_w)
+void suna8_state::sparkman_spritebank_w(uint8_t data)
{
m_spritebank = ((data >> 1) & 0x01) | ((data << 1) & 0x02);
if ((m_spritebank_latch >> 1) & 0x01)
@@ -1158,7 +1158,7 @@ WRITE8_MEMBER(suna8_state::sparkman_spritebank_w)
---4 ----
---- 3210 ROM Bank (Latched)
*/
-WRITE8_MEMBER(suna8_state::sparkman_rombank_latch_w)
+void suna8_state::sparkman_rombank_latch_w(offs_t offset, uint8_t data)
{
m_rombank_latch = data;
logerror("CPU #0 - PC %04X: rom bank latch %04X = %02X\n",m_maincpu->pc(), 0xc280 + offset, data);
@@ -1171,7 +1171,7 @@ WRITE8_MEMBER(suna8_state::sparkman_rombank_latch_w)
---- 321-
---- ---0 Flip Screen
*/
-WRITE8_MEMBER(suna8_state::sparkman_spritebank_latch_w)
+void suna8_state::sparkman_spritebank_latch_w(uint8_t data)
{
flip_screen_set(data & 0x01);
m_spritebank_latch = (data >> 4) & 0x03;
@@ -1184,7 +1184,7 @@ WRITE8_MEMBER(suna8_state::sparkman_spritebank_latch_w)
---4321-
-------0 Work RAM Writes Disable
*/
-WRITE8_MEMBER(suna8_state::sparkman_write_disable_w)
+void suna8_state::sparkman_write_disable_w(uint8_t data)
{
m_write_disable = (data >> 0) & 1; // bit 0 = disable RAM writes. See code at b48, d4d
m_nmi_enable = (data >> 5) & 1; // see code at 66
@@ -1192,7 +1192,7 @@ WRITE8_MEMBER(suna8_state::sparkman_write_disable_w)
}
// RAM writes can be disabled
-WRITE8_MEMBER(suna8_state::suna8_wram_w)
+void suna8_state::suna8_wram_w(offs_t offset, uint8_t data)
{
if (!m_write_disable)
m_wram[offset] = data;
@@ -1205,7 +1205,7 @@ WRITE8_MEMBER(suna8_state::suna8_wram_w)
Writes to C400 also set ROM bank from latch
*/
-WRITE8_MEMBER(suna8_state::sparkman_rombank_w)
+void suna8_state::sparkman_rombank_w(uint8_t data)
{
m_leds[0] = BIT(data, 0);
m_leds[1] = BIT(data, 1);
@@ -1226,13 +1226,13 @@ WRITE8_MEMBER(suna8_state::sparkman_rombank_w)
C480: 7654321-
-------0 Coin Counter
*/
-WRITE8_MEMBER(suna8_state::sparkman_coin_counter_w)
+void suna8_state::sparkman_coin_counter_w(uint8_t data)
{
machine().bookkeeping().coin_counter_w(0, data & 0x01);
}
// To do: implement this, affects the duration of copyright screen
-READ8_MEMBER(suna8_state::sparkman_c0a3_r)
+uint8_t suna8_state::sparkman_c0a3_r()
{
return (m_screen->frame_number() & 1) ? 0x80 : 0;
}
@@ -2094,8 +2094,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(suna8_state::hardhea2_interrupt)
MACHINE_RESET_MEMBER(suna8_state,hardhea2)
{
- address_space &space = m_maincpu->space(AS_PROGRAM);
- hardhea2_rambank_0_w(space,0,0);
+ hardhea2_rambank_0_w(0);
}
void suna8_state::hardhea2(machine_config &config)