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-rw-r--r--src/mame/drivers/pacman.cpp345
1 files changed, 343 insertions, 2 deletions
diff --git a/src/mame/drivers/pacman.cpp b/src/mame/drivers/pacman.cpp
index 802df68ecac..f2a94454996 100644
--- a/src/mame/drivers/pacman.cpp
+++ b/src/mame/drivers/pacman.cpp
@@ -1134,6 +1134,35 @@ void clubpacm_state::clubpacm_map(address_map &map)
map(0x8000, 0xbfff).rom();
}
+void mspactwin_state::mspactwin_map(address_map &map)
+{
+ map(0x0000, 0x1fff).rom();
+ map(0x2000, 0x3fff).mirror(0x4000).rom();
+ map(0x4000, 0x43ff).mirror(0xa000).mirror(0x8000).ram().w(FUNC(mspactwin_state::mspactwin_videoram_w)).share("videoram");
+ map(0x4400, 0x47ff).mirror(0xa000).mirror(0x8000).ram().w(FUNC(mspactwin_state::pacman_colorram_w)).share("colorram");
+ map(0x4800, 0x4bff).mirror(0xa000).r(FUNC(mspactwin_state::pacman_read_nop)).nopw();
+ map(0x4c00, 0x4fef).mirror(0xa000).ram();
+ map(0x4ff0, 0x4fff).mirror(0xa000).ram().share("spriteram");
+ map(0x5000, 0x5007).mirror(0xaf38).mirror(0x0030).w(m_mainlatch, FUNC(ls259_device::write_d0));
+ map(0x5040, 0x505f).mirror(0xaf00).w(m_namco_sound, FUNC(namco_device::pacman_sound_w));
+ map(0x5060, 0x506f).mirror(0xaf00).writeonly().share("spriteram2");
+ map(0x5070, 0x507f).mirror(0xaf00).nopw();
+ map(0x5080, 0x5080).mirror(0xaf3f).w(m_sublatch, FUNC(generic_latch_8_device::write));
+ map(0x50c0, 0x50c0).mirror(0xaf3f).w(m_watchdog, FUNC(watchdog_timer_device::reset_w));
+ map(0x5000, 0x5000).mirror(0xaf3f).portr("IN0");
+ map(0x5040, 0x5040).mirror(0xaf3f).portr("IN1");
+ map(0x5080, 0x5080).mirror(0xaf3f).portr("DSW1");
+ map(0x50c0, 0x50c0).mirror(0xaf3f).r(m_sublatch, FUNC(generic_latch_8_device::read));
+ map(0x8000, 0xbfff).rom();
+}
+
+void mspactwin_state::mspactwin_decrypted_map(address_map &map)
+{
+ map(0x0000, 0x3fff).rom().share("decrypted_opcodes");
+ map(0x6000, 0x7fff).rom().share("decrypted_opcodes_mirror");
+ map(0x8000, 0xbfff).rom().share("decrypted_opcodes_high");
+}
+
void pacman_state::numcrash_map(address_map &map)
{
@@ -1845,6 +1874,46 @@ static INPUT_PORTS_START( clubpacma )
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
INPUT_PORTS_END
+static INPUT_PORTS_START( mspactwin )
+ PORT_INCLUDE( clubpacm )
+
+ PORT_MODIFY("IN0")
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_4WAY
+ PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_4WAY
+ PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_4WAY
+ PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_4WAY
+ PORT_DIPNAME( 0x10, 0x10, "Jama" )
+ PORT_DIPSETTING( 0x10, "Slow" )
+ PORT_DIPSETTING( 0x00, "Fast" )
+
+ PORT_MODIFY("IN1")
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_4WAY PORT_COCKTAIL
+ PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_4WAY PORT_COCKTAIL
+ PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_4WAY PORT_COCKTAIL
+ PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_4WAY PORT_COCKTAIL
+ PORT_DIPNAME( 0x80, 0x80, "Skip Screen" ) // Used to skip level
+ PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+
+ PORT_MODIFY("P1")
+ PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
+
+ PORT_MODIFY("P2")
+ PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
+
+ PORT_MODIFY("DSW1")
+ PORT_DIPNAME( 0x0C, 0x08, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW:3,4")
+ PORT_DIPSETTING( 0x00, "1" )
+ PORT_DIPSETTING( 0x04, "2" )
+ PORT_DIPSETTING( 0x08, "3" )
+ PORT_DIPSETTING( 0x0C, "5" )
+ PORT_DIPNAME( 0x30, 0x00, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW:5,6")
+ PORT_DIPSETTING( 0x00, "10000" )
+ PORT_DIPSETTING( 0x10, "15000" )
+ PORT_DIPSETTING( 0x20, "20000" )
+ PORT_DIPSETTING( 0x30, "None" )
+
+INPUT_PORTS_END
static INPUT_PORTS_START( superabc )
PORT_INCLUDE( pacman )
@@ -3780,6 +3849,20 @@ void clubpacm_state::clubpacm(machine_config &config)
}
+void mspactwin_state::mspactwin(machine_config &config)
+{
+ mspacman(config);
+
+ // Basic machine hardware
+ m_maincpu->set_addrmap(AS_PROGRAM, &mspactwin_state::mspactwin_map);
+ m_maincpu->set_addrmap(AS_OPCODES, &mspactwin_state::mspactwin_decrypted_map);
+
+ m_mainlatch->q_out_cb<3>().set(FUNC(mspactwin_state::flipscreen_w));
+
+ GENERIC_LATCH_8(config, m_sublatch);
+}
+
+
void pacman_state::numcrash(machine_config &config)
{
pacman(config);
@@ -4699,6 +4782,236 @@ ROM_START( clubpacma )
ROM_END
+/*****************************************************************************
+
+ Ms PacMan Twin (SUSILU)
+ -----------------------
+
+ Argentine official hack of Ms. PacMan that allows 2 players simultaneously.
+ Very rare PCB. Was avoiding us for more of 22 years...
+ The mainboard is a PacMan bootleg PCB, with a mini daughterboard
+ (normal in mspacman boards) plugged in the Z80 socket.
+
+
+ Here the specs:
+
+ Mini daughterboard 3" x 5.5" aprox.
+
+ In the upper-left corner is vertically printed "SUSILU" and "NMPT008",
+ and across: "MOD REG 294535" and "INDUSTRIA ARGENTINA".
+
+ .----------------------------.
+ | .----------. |
+ | | 74LS245N < U5 |
+ | '----------' |
+ | |
+ | .--------------------. |
+ | | | |
+ | | UNKNOWN DIP40 IC < |
+ | | |U3 |
+ | '--------------------' |
+ | |
+ | oooooooooooooooooooo |
+ | 1 |
+ | U1 |
+ | 40 |
+ | oooooooooooooooooooo |
+ | |
+ | .--------------------. |
+ | | | |
+ | | NEC D780C < |
+ | | |U2 |
+ | '--------------------' |
+ | |
+ | .--------------. |
+ | | | |
+ | | M27256 < |
+ | | | U4 |
+ | '--------------' |
+ '----------------------------'
+
+ Viewing from the top you can find: U5 U3 U1 U2 U4
+
+ U5: 74LS245N (Octal Bus Tranceivers with 3-state outputs, DIP20),
+ with a decoupling cap soldered from leg 10 to leg 20.
+
+ U3: Unknown 40 pins IC, scratched to avoid recognition. Could be either
+ a big PLD/CPLD/EPLD, or a kind of protection device.
+
+ U1: 40 pins male connector, to plug the kit into Z80's mainboard socket.
+
+ U2: NEC D780C (Z80).
+
+ U4: ST M27256 ROM (program).
+ NOTE: There was a TOSHIBA TMM24512AP-20 (28 pins), 512 Kbit OTPROM
+ in the first board I found, but remains undumped.
+
+
+ ---------------------------------------------------------
+
+ 40-pins connector @ U1:
+
+ 40-pins connector
+ +-------------------------+
+ Z80 pin 01 (A11) ---o 01 (A11) (A10) 40 o--- Z80 pin 40 (A10)
+ Z80 pin 02 (A12) ---o 02 (A12) (A09) 39 o--- Z80 pin 39 (A09)
+ Z80 pin 03 (A13) ---o 03 (A13) (A08) 38 o--- Z80 pin 38 (A08)
+ Z80 pin 04 (A14) ---o 04 (A14) (A07) 37 o--- Z80 pin 37 (A07)
+ Z80 pin 05 (A15) ---o 05 (A15) (A06) 36 o--- Z80 pin 36 (A06)
+ Z80 pin 06 (CLK) ---o 06 (CLK) (A05) 35 o--- Z80 pin 35 (A05)
+ 74LS245 pin 02 (A1) ---o 07 (D4) (A04) 34 o--- Z80 pin 34 (A04)
+ 74LS245 pin 03 (A2) ---o 08 (D3) (A03) 33 o--- Z80 pin 33 (A03)
+ 74LS245 pin 04 (A3) ---o 09 (D5) (A02) 32 o--- Z80 pin 32 (A02)
+ 74LS245 pin 05 (A4) ---o 10 (D6) (A01) 31 o--- Z80 pin 31 (A01)
+ Z80 pin 11 (VCC) ---o 11 (VCC) (A00) 30 o--- Z80 pin 30 (A00)
+ 74LS245 pin 06 (A5) ---o 12 (D2) (GND) 29 o--- Z80 pin 29 (GND)
+ 74LS245 pin 07 (A6) ---o 13 (D7) (/RFSH) 28 o--- Z80 pin 28 (/RFSH)
+ 74LS245 pin 08 (A7) ---o 14 (D0) (/M1) 27 o--- Z80 pin 27 (/M1)
+ 74LS245 pin 09 (A8) ---o 15 (D1) (/RESET) 26 o--- Z80 pin 26 (/RESET)
+ Z80 pin 16 (/INT) ---o 16 (/INT) (/BUSRQ) 25 o--- N/C
+ N/C ---o 17 (/NMI) (/WAIT) 24 o--- Z80 pin 24 (/WAIT)
+ N/C ---o 18 (/HALT) (/BUSAK) 23 o--- N/C
+ Z80 pin 19 (/MREQ) ---o 19 (/MREQ) (/WR) 22 o--- Z80 pin 22 (/WR)
+ Z80 pin 20 (/IORQ) ---o 20 (/IORQ) (/RD) 21 o--- Z80 pin 21 (/RD)
+ +-------------------------+
+
+
+ NEC D780C (Z80) @ U2:
+
+ NEC D780C (Z80)
+ .-----------v-----------.
+ connector pin 01 (A11) ---|01 (A11) (A10) 40|--- connector pin 40 (A10)
+ connector pin 02 (A12) ---|02 (A12) (A09) 39|--- connector pin 39 (A09)
+ connector pin 03 (A13) ---|03 (A13) (A08) 38|--- connector pin 38 (A08)
+ connector pin 04 (A14) ---|04 (A14) (A07) 37|--- connector pin 37 (A07)
+ connector pin 05 (A15) ---|05 (A15) (A06) 36|--- connector pin 36 (A06)
+ connector pin 06 (CLK) ---|06 (CLK) (A05) 35|--- connector pin 35 (A05)
+ unknown DIP40 pin 32 ---|07 (D4) (A04) 34|--- connector pin 34 (A04)
+ unknown DIP40 pin 31 ---|08 (D3) (A03) 33|--- connector pin 33 (A03)
+ unknown DIP40 pin 30 ---|09 (D5) (A02) 32|--- connector pin 32 (A02)
+ unknown DIP40 pin 29 ---|10 (D6) (A01) 31|--- connector pin 31 (A01)
+ connector pin 11 (VCC) ---|11 (VCC) (A00) 30|--- connector pin 30 (A00)
+ unknown DIP40 pin 28 ---|12 (D2) (GND) 29|--- connector pin 29 (GND)
+ unknown DIP40 pin 27 ---|13 (D7) (/RFSH) 28|--- connector pin 28 (/RFSH)
+ unknown DIP40 pin 26 ---|14 (D0) (/M1) 27|--- connector pin 27 (/M1)
+ unknown DIP40 pin 25 ---|15 (D1) (/RESET) 26|--- connector pin 26 (/RESET)
+ connector pin 16 (/INT) ---|16 (/INT) (/BUSRQ) 25|--- VCC
+ VCC ---|17 (/NMI) (/WAIT) 24|--- connector pin 24 (/WAIT)
+ N/C ---|18 (/HALT) (/BUSAK) 23|--- N/C
+ connector pin 19 (/MREQ) ---|19 (/MREQ) (/WR) 22|--- connector pin 22 (/WR)
+ connector pin 20 (/IORQ) ---|20 (/IORQ) (/RD) 21|--- connector pin 21 (/RD)
+ '-----------------------'
+
+
+ Unknown DIP40 @ U3:
+
+ Is this a big PLD?
+ Like Altera EP900 (24 macrocell EPLD),
+ or Intel 5C090 (24 macrocell CMOS PLD)?
+
+
+ unknown DIL40
+ .-----v-----.
+ GND -|01 ? 40|- VCC
+ connector/Z80 pin 21 (/RD) -|02 39|- GND
+ 74LS245 pin 19 (/OE) -|03-. 38|- GND
+ connector/Z80 pin 27 (/M1) -|04 | 37|- GND
+ N/C -|05 | 36|- GND
+ 74LS245 pin 19 (/OE) -|06-' 35|- GND
+ N/C -|07 34|- M27256 pin 20 (/CE)
+ connector/Z80 pin 03 (A13) -|08 33|- connector/Z80 pin 30 (A0)
+ 74LS245 pin 02 (D4) -|09 32|- Z80 pin 07 (D4)
+ 74LS245 pin 03 (D3) -|10 31|- Z80 pin 08 (D3)
+ 74LS245 pin 04 (D5) -|11 30|- Z80 pin 09 (D5)
+ 74LS245 pin 05 (D6) -|12 29|- Z80 pin 10 (D6)
+ 74LS245 pin 06 (D2) -|13 28|- Z80 pin 12 (D2)
+ 74LS245 pin 07 (D7) -|14 27|- Z80 pin 13 (D7)
+ 74LS245 pin 08 (D0) -|15 26|- Z80 pin 14 (D0)
+ 74LS245 pin 09 (D1) -|16 25|- Z80 pin 15 (D1)
+ connector/Z80 pin 04 (A14) -|17 24|- GND
+ connector/Z80 pin 05 (A15) -|18 23|- GND
+ GND -|19 22|- GND
+ GND -|20 21|- GND
+ '-----------'
+
+
+ M27256 @ U4:
+
+ M27256
+ .-------v-------.
+ VCC -|01 VPP VCC 28|- VCC
+ connector/Z80 pin 02 (A12) -|02 A12 A14 27|- connector/Z80 pin 05 (A15) & unknown DIP40 pin 18
+ connector/Z80 pin 37 (A07) -|03 A07 A13 26|- connector/Z80 pin 03 (A13)
+ connector/Z80 pin 36 (A06) -|04 A06 A08 25|- connector/Z80 pin 38 (A08)
+ connector/Z80 pin 35 (A05) -|05 A05 A09 24|- connector/Z80 pin 39 (A09)
+ connector/Z80 pin 34 (A04) -|06 A04 A11 23|- connector/Z80 pin 01 (A11)
+ connector/Z80 pin 33 (A03) -|07 A03 /OE 22|- connector/Z80 pin 21 (/RD) & unknown DIP40 pin 02
+ connector/Z80 pin 32 (A02) -|08 A02 A10 21|- connector/Z80 pin 40 (A10)
+ connector/Z80 pin 31 (A01) -|09 A01 /CE 20|- unknown DIP40 pin 34
+ connector/Z80 pin 30 (A00) -|10 A00 O7 19|- 74LS245 pin 07 (D7)
+ 74LS245 pin 08 (D0) -|11 O0 O6 18|- 74LS245 pin 05 (D6)
+ 74LS245 pin 09 (D1) -|12 O1 O5 17|- 74LS245 pin 04 (D5)
+ 74LS245 pin 06 (D2) -|13 O2 O4 16|- 74LS245 pin 02 (D4)
+ GND -|14 GND O3 15|- 74LS245 pin 03 (D3)
+ '---------------'
+
+
+ 74LS245N @ U5:
+
+ 74LS245
+ .-------v-------.
+ GND -|01 DIR VCC 20|- VCC
+ connector pin 07 (D4) -|02 A1 /OE 19|- unknown DIP40 pins 03 & 06
+ connector pin 08 (D3) -|03 A2 B1 18|- Z80 pin 07 (D4)
+ connector pin 09 (D5) -|04 A3 B2 17|- Z80 pin 08 (D3)
+ connector pin 10 (D6) -|05 A4 B3 16|- Z80 pin 09 (D5)
+ connector pin 12 (D2) -|06 A5 B4 15|- Z80 pin 10 (D6)
+ connector pin 13 (D7) -|07 A6 B5 14|- Z80 pin 12 (D2)
+ connector pin 14 (D0) -|08 A7 B6 13|- Z80 pin 13 (D7)
+ connector pin 15 (D1) -|09 A8 B7 12|- Z80 pin 14 (D0)
+ GND -|10 GND B8 11|- Z80 pin 15 (D1)
+ '---------------'
+
+
+ Because program EPROM A14 goes to Z80 A15, and Z80 A14 isn't connected to anything,
+ the EPROM data should be offset as follows:
+
+ Z80 address | EPROM offset
+ ------------+-------------
+ 0000-3FFF | 0000-3FFF
+ 4000-7FFF | 0000-3FFF
+ 8000-BFFF | 4000-7FFF
+ C000-FFFF | 4000-7FFF
+
+ All the graphics ROMs and bipolar PROMs are located
+ in the mainboard, at normal positions.
+
+
+ Docs by Roberto Fresca.
+
+*****************************************************************************/
+
+ROM_START( mspactwin )
+ ROM_REGION( 0x10000, "maincpu", 0 ) /* 64k for encrypted code */
+ ROM_LOAD( "m27256.bin", 0x0000, 0x4000, CRC(77a99184) SHA1(9dcb1a1b78994aa401d653bec571cb3e6f9d900b) )
+ ROM_CONTINUE(0x8000,0x4000)
+
+ ROM_REGION( 0x2000, "gfx1", 0 )
+ ROM_LOAD( "4__2716.5d", 0x0000, 0x0800, CRC(483c1d1c) SHA1(d3b967c6a71cf02b825d800f56d5268f2e0e60eb) )
+ ROM_LOAD( "2__2716.5g", 0x0800, 0x0800, CRC(c08d73a2) SHA1(072e57641ac5ae3c47b4f8d9c55e3da5b35489ea) )
+ ROM_LOAD( "3__2516.5f", 0x1000, 0x0800, CRC(22b0188a) SHA1(a9ed9ca8b36a60081fd364abc9bc23963932cc0b) )
+ ROM_LOAD( "1__2516.5j", 0x1800, 0x0800, CRC(0a8c46a0) SHA1(e38e9e3258ab26fcbc6fdf258844e364f4b165ab) )
+
+ ROM_REGION( 0x0120, "proms", 0 )
+ ROM_LOAD( "mb7051.8h", 0x0000, 0x0020, CRC(ff344446) SHA1(45eb37533da8912645a089b014f3b3384702114a) )
+ ROM_LOAD( "82s129.4a", 0x0020, 0x0100, CRC(a8202d0d) SHA1(2a615211c33f3ef75af14e4bbedd2a700100be29) )
+
+ ROM_REGION( 0x0200, "namco", 0 ) // Sound PROMs
+ ROM_LOAD( "mb7052.1k", 0x0000, 0x0100, CRC(a9cc86bf) SHA1(bbcec0570aeceb582ff8238a4bc8546a23430081) )
+ ROM_LOAD( "82s129.3k", 0x0100, 0x0100, CRC(77245b66) SHA1(0c4d0bee858b97632411c440bea6948a74759746) )
+ROM_END
+
+
ROM_START( hangly )
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD( "hangly.6e", 0x0000, 0x1000, CRC(5fe8610a) SHA1(d63eaebd85e10aa6c27bb7f47642dd403eeb6934) )
@@ -7867,6 +8180,33 @@ void clubpacm_state::init_clubpacma()
rom[i] = bitswap<8>(rom[i], 6, 7, 5, 4, 3, 2, 1, 0);
}
+void mspactwin_state::init_mspactwin()
+{
+ uint8_t *rom = memregion("maincpu")->base();
+
+ for (int A = 0x0000; A < 0x4000; A+=2) {
+
+ // decode opcode
+ m_decrypted_opcodes [A ] = bitswap<8>(rom[ A ] , 4, 5, 6, 7, 0, 1, 2, 3);
+ m_decrypted_opcodes [A+1] = bitswap<8>(rom[ A+1] ^ 0x9A, 6, 4, 5, 7, 2, 0, 3, 1);
+ m_decrypted_opcodes_high[A ] = bitswap<8>(rom[0x8000+A ] , 4, 5, 6, 7, 0, 1, 2, 3);
+ m_decrypted_opcodes_high[A+1] = bitswap<8>(rom[0x8000+A+1] ^ 0x9A, 6, 4, 5, 7, 2, 0, 3, 1);
+
+ // decode operand
+ rom[ A ] = bitswap<8>(rom[ A ] , 0, 1, 2, 3, 4, 5, 6, 7);
+ rom[ A+1] = bitswap<8>(rom[ A+1] ^ 0xA3, 2, 4, 6, 3, 7, 0, 5, 1);
+ rom[0x8000+A ] = bitswap<8>(rom[0x8000+A ] , 0, 1, 2, 3, 4, 5, 6, 7);
+ rom[0x8000+A+1] = bitswap<8>(rom[0x8000+A+1] ^ 0xA3, 2, 4, 6, 3, 7, 0, 5, 1);
+
+ }
+
+ for (int A = 0x0000; A < 0x2000; A++) {
+ m_decrypted_opcodes_mirror[A] = m_decrypted_opcodes[A+0x2000];
+ }
+
+}
+
+
/*************************************
*
* Game drivers
@@ -7945,9 +8285,10 @@ GAME( 1993, mspacmanbi, mspacman, woodpek, mspacman, pacman_state, empty_init
GAME( 198?, pacmansp, puckman, pacman, pacmansp, pacman_state, empty_init, ROT90, "bootleg (Video Game SA)", "Puck Man (Spanish, 'Made in Greece' bootleg)", MACHINE_SUPPORTS_SAVE ) // probably a further conversion of the mspacmanbg bootleg, still has some MS Pacman code + extra features
+GAME( 1992, mspactwin, 0, mspactwin, mspactwin, mspactwin_state, init_mspactwin, ROT90, "SUSILU", "Ms PacMan Twin (Argentina)", MACHINE_SUPPORTS_SAVE )
-GAME( 1989, clubpacm, 0, clubpacm, clubpacm, clubpacm_state,empty_init, ROT90, "Miky SRL", "Pacman Club / Club Lambada (Argentina)", MACHINE_SUPPORTS_SAVE )
-GAME( 1990, clubpacma, clubpacm, clubpacm, clubpacma, clubpacm_state,init_clubpacma,ROT90, "Miky SRL", "Pacman Club (Argentina)", MACHINE_SUPPORTS_SAVE )
+GAME( 1989, clubpacm, 0, clubpacm, clubpacm, clubpacm_state, empty_init, ROT90, "Miky SRL", "Pacman Club / Club Lambada (Argentina)", MACHINE_SUPPORTS_SAVE )
+GAME( 1990, clubpacma, clubpacm, clubpacm, clubpacma, clubpacm_state, init_clubpacma, ROT90, "Miky SRL", "Pacman Club (Argentina)", MACHINE_SUPPORTS_SAVE )
GAME( 1985, jumpshot, 0, pacman, jumpshot, pacman_state, init_jumpshot, ROT90, "Bally Midway", "Jump Shot", MACHINE_SUPPORTS_SAVE )
GAME( 1985, jumpshotp,jumpshot, pacman, jumpshotp,pacman_state, init_jumpshot, ROT90, "Bally Midway", "Jump Shot Engineering Sample", MACHINE_SUPPORTS_SAVE )