diff options
Diffstat (limited to 'src/mame/drivers/force68k.cpp')
-rw-r--r-- | src/mame/drivers/force68k.cpp | 180 |
1 files changed, 109 insertions, 71 deletions
diff --git a/src/mame/drivers/force68k.cpp b/src/mame/drivers/force68k.cpp index df819171453..ce88a10c054 100644 --- a/src/mame/drivers/force68k.cpp +++ b/src/mame/drivers/force68k.cpp @@ -81,6 +81,7 @@ #include "machine/mm58167.h" #include "machine/68230pit.h" #include "machine/6850acia.h" +#include "machine/mc14411.h" #include "machine/clock.h" #include "bus/centronics/ctronics.h" #include "bus/generic/slot.h" @@ -90,9 +91,6 @@ #include "bus/vme/vme_fcisio.h" #include "bus/vme/vme_fcscsi.h" -#define LOG(x) x - -#define BAUDGEN_CLOCK XTAL_1_8432MHz /* * The baudrate on the Force68k CPU-1 to CPU-6 is generated by a * Motorola 14411 bitrate generator, the CPU-6 documents matches the circuits @@ -123,6 +121,31 @@ * so the system rom MUST setup the acia to divide by 16 to generate the correct baudrate. * */ + +//************************************************************************** +// CONFIGURABLE LOGGING +//************************************************************************** +//#define LOG_GENERAL (1U << 0) // defined in logmacro.h +#define LOG_SETUP (1U << 1) + +//#define VERBOSE (LOG_GENERAL | LOG_SETUP) +//#define LOG_OUTPUT_FUNC printf +#include "logmacro.h" + +// #define LOG(...) LOGMASKED(LOG_SETUP, __VA_ARGS__) // defined in logmacro.h +#define LOGSETUP(...) LOGMASKED(LOG_SETUP, __VA_ARGS__) + +//************************************************************************** +// MACROS / CONSTANTS +//************************************************************************** + +#ifdef _MSC_VER +#define FUNCNAME __func__ +#else +#define FUNCNAME __PRETTY_FUNCTION__ +#endif + +#define BAUDGEN_CLOCK XTAL_1_8432MHz #define ACIA_CLOCK (BAUDGEN_CLOCK / 12) class force68k_state : public driver_device @@ -133,6 +156,7 @@ public: , m_maincpu(*this, "maincpu") , m_rtc(*this, "rtc") , m_pit(*this, "pit") + , m_brg(*this, "brg") , m_aciahost(*this, "aciahost") , m_aciaterm(*this, "aciaterm") , m_aciaremt(*this, "aciaremt") @@ -152,6 +176,7 @@ public: DECLARE_WRITE16_MEMBER (vme_a16_w); virtual void machine_start () override; // clocks + DECLARE_WRITE_LINE_MEMBER (write_acia_clock); DECLARE_WRITE_LINE_MEMBER (write_aciahost_clock); DECLARE_WRITE_LINE_MEMBER (write_aciaterm_clock); DECLARE_WRITE_LINE_MEMBER (write_aciaremt_clock); @@ -169,6 +194,7 @@ private: required_device<cpu_device> m_maincpu; required_device<mm58167_device> m_rtc; required_device<pit68230_device> m_pit; + required_device<mc14411_device> m_brg; required_device<acia6850_device> m_aciahost; required_device<acia6850_device> m_aciaterm; required_device<acia6850_device> m_aciaremt; @@ -187,24 +213,24 @@ private: }; static ADDRESS_MAP_START (force68k_mem, AS_PROGRAM, 16, force68k_state) -ADDRESS_MAP_UNMAP_HIGH -AM_RANGE (0x000000, 0x000007) AM_ROM AM_READ (bootvect_r) /* Vectors mapped from System EPROM */ -AM_RANGE (0x000008, 0x01ffff) AM_RAM /* DRAM CPU-1B */ + ADDRESS_MAP_UNMAP_HIGH + AM_RANGE (0x000000, 0x000007) AM_ROM AM_READ (bootvect_r) /* Vectors mapped from System EPROM */ + AM_RANGE (0x000008, 0x01ffff) AM_RAM /* DRAM CPU-1B */ //AM_RANGE (0x020000, 0x07ffff) AM_RAM /* Additional DRAM CPU-1D */ -AM_RANGE (0x080000, 0x083fff) AM_ROM /* System EPROM Area 16Kb DEBUGGER supplied as default on CPU-1B/D */ -AM_RANGE (0x084000, 0x09ffff) AM_ROM /* System EPROM Area 112Kb additional space for System ROM */ + AM_RANGE (0x080000, 0x083fff) AM_ROM /* System EPROM Area 16Kb DEBUGGER supplied as default on CPU-1B/D */ + AM_RANGE (0x084000, 0x09ffff) AM_ROM /* System EPROM Area 112Kb additional space for System ROM */ //AM_RANGE (0x0a0000, 0x0bffff) AM_ROM /* User EPROM/SRAM Area, max 128Kb mapped by a cartslot */ -AM_RANGE (0x0c0040, 0x0c0041) AM_DEVREADWRITE8 ("aciahost", acia6850_device, status_r, control_w, 0x00ff) -AM_RANGE (0x0c0042, 0x0c0043) AM_DEVREADWRITE8 ("aciahost", acia6850_device, data_r, data_w, 0x00ff) -AM_RANGE (0x0c0080, 0x0c0081) AM_DEVREADWRITE8 ("aciaterm", acia6850_device, status_r, control_w, 0xff00) -AM_RANGE (0x0c0082, 0x0c0083) AM_DEVREADWRITE8 ("aciaterm", acia6850_device, data_r, data_w, 0xff00) -AM_RANGE (0x0c0100, 0x0c0101) AM_DEVREADWRITE8 ("aciaremt", acia6850_device, status_r, control_w, 0x00ff) -AM_RANGE (0x0c0102, 0x0c0103) AM_DEVREADWRITE8 ("aciaremt", acia6850_device, data_r, data_w, 0x00ff) -AM_RANGE (0x0c0400, 0x0c042f) AM_DEVREADWRITE8 ("rtc", mm58167_device, read, write, 0x00ff) -AM_RANGE (0x0e0000, 0x0e0035) AM_DEVREADWRITE8 ("pit", pit68230_device, read, write, 0x00ff) -// AM_RANGE(0x0e0200, 0x0e0380) AM_READWRITE(fpu_r, fpu_w) /* optional FPCP 68881 FPU interface */ -AM_RANGE(0x100000, 0xfeffff) AM_READWRITE(vme_a24_r, vme_a24_w) /* VMEbus Rev B addresses (24 bits) */ -AM_RANGE(0xff0000, 0xffffff) AM_READWRITE(vme_a16_r, vme_a16_w) /* VMEbus Rev B addresses (16 bits) */ + AM_RANGE (0x0c0040, 0x0c0041) AM_DEVREADWRITE8 ("aciahost", acia6850_device, status_r, control_w, 0x00ff) + AM_RANGE (0x0c0042, 0x0c0043) AM_DEVREADWRITE8 ("aciahost", acia6850_device, data_r, data_w, 0x00ff) + AM_RANGE (0x0c0080, 0x0c0081) AM_DEVREADWRITE8 ("aciaterm", acia6850_device, status_r, control_w, 0xff00) + AM_RANGE (0x0c0082, 0x0c0083) AM_DEVREADWRITE8 ("aciaterm", acia6850_device, data_r, data_w, 0xff00) + AM_RANGE (0x0c0100, 0x0c0101) AM_DEVREADWRITE8 ("aciaremt", acia6850_device, status_r, control_w, 0x00ff) + AM_RANGE (0x0c0102, 0x0c0103) AM_DEVREADWRITE8 ("aciaremt", acia6850_device, data_r, data_w, 0x00ff) + AM_RANGE (0x0c0400, 0x0c042f) AM_DEVREADWRITE8 ("rtc", mm58167_device, read, write, 0x00ff) + AM_RANGE (0x0e0000, 0x0e0035) AM_DEVREADWRITE8 ("pit", pit68230_device, read, write, 0x00ff) +//AM_RANGE(0x0e0200, 0x0e0380) AM_READWRITE(fpu_r, fpu_w) /* optional FPCP 68881 FPU interface */ + AM_RANGE(0x100000, 0xfeffff) AM_READWRITE(vme_a24_r, vme_a24_w) /* VMEbus Rev B addresses (24 bits) */ + AM_RANGE(0xff0000, 0xffffff) AM_READWRITE(vme_a16_r, vme_a16_w) /* VMEbus Rev B addresses (16 bits) */ ADDRESS_MAP_END /* Input ports */ @@ -253,7 +279,7 @@ INPUT_PORTS_END */ WRITE_LINE_MEMBER (force68k_state::centronics_ack_w) { -// LOG (logerror ("centronics_ack_w(%d) %lld\n", state, m_maincpu->total_cycles ())); + LOG("%s(%d)\n", FUNCNAME, state); m_centronics_ack = state; m_pit->h1_set (state); } @@ -262,7 +288,7 @@ WRITE_LINE_MEMBER (force68k_state::centronics_ack_w) * The centronics busy signal is not used by the ROM driver afaik */ WRITE_LINE_MEMBER (force68k_state::centronics_busy_w){ -// LOG (logerror ("centronics_busy_w(%d) %lld\n", state, m_maincpu->total_cycles ())); + LOG("%s(%d)\n", FUNCNAME, state); m_centronics_busy = state; } @@ -270,7 +296,7 @@ WRITE_LINE_MEMBER (force68k_state::centronics_busy_w){ * The centronics perror signal is not used by the ROM driver afaik */ WRITE_LINE_MEMBER (force68k_state::centronics_perror_w){ -// LOG (logerror ("centronics_perror_w(%d) %lld\n", state, m_maincpu->total_cycles ())); + LOG("%s(%d)\n", FUNCNAME, state); m_centronics_perror = state; } @@ -278,7 +304,7 @@ WRITE_LINE_MEMBER (force68k_state::centronics_perror_w){ * The centronics select signal is expected by the ROM on Port B bit 0 */ WRITE_LINE_MEMBER (force68k_state::centronics_select_w){ -// LOG (logerror ("centronics_select_w(%d) %lld\n", state, m_maincpu->total_cycles ())); + LOG("%s(%d)\n", FUNCNAME, state); m_centronics_select = state; m_pit->portb_setbit (0, state); } @@ -286,26 +312,29 @@ WRITE_LINE_MEMBER (force68k_state::centronics_select_w){ /* Start it up */ void force68k_state::machine_start () { - LOG (logerror ("machine_start\n")); + LOG("%s\n", FUNCNAME); - save_item (NAME (m_centronics_busy)); - save_item (NAME (m_centronics_ack)); - save_item (NAME (m_centronics_select)); - save_item (NAME (m_centronics_perror)); + save_item (NAME (m_centronics_busy)); + save_item (NAME (m_centronics_ack)); + save_item (NAME (m_centronics_select)); + save_item (NAME (m_centronics_perror)); - /* Setup pointer to bootvector in ROM for bootvector handler bootvect_r */ - m_sysrom = (uint16_t*)(memregion ("maincpu")->base () + 0x080000); + /* Setup pointer to bootvector in ROM for bootvector handler bootvect_r */ + m_sysrom = (uint16_t*)(memregion ("maincpu")->base () + 0x080000); - /* Map user ROM/RAM socket(s) */ - if (m_cart->exists()) - { - m_usrrom = (uint16_t*)m_cart->get_rom_base(); + /* Map user ROM/RAM socket(s) */ + if (m_cart->exists()) + { + m_usrrom = (uint16_t*)m_cart->get_rom_base(); #if 0 // This should be the correct way but produces odd and even bytes swapped - m_maincpu->space(AS_PROGRAM).install_read_handler(0xa0000, 0xbffff, read16_delegate(FUNC(generic_slot_device::read16_rom), (generic_slot_device*)m_cart)); + m_maincpu->space(AS_PROGRAM).install_read_handler(0xa0000, 0xbffff, read16_delegate(FUNC(generic_slot_device::read16_rom), (generic_slot_device*)m_cart)); #else // So we installs a custom very ineffecient handler for now until we understand hwp to solve the problem better - m_maincpu->space(AS_PROGRAM).install_read_handler(0xa0000, 0xbffff, read16_delegate(FUNC(force68k_state::read16_rom), this)); + m_maincpu->space(AS_PROGRAM).install_read_handler(0xa0000, 0xbffff, read16_delegate(FUNC(force68k_state::read16_rom), this)); #endif - } + } + + // Set up the BRG divider. TODO: Make RSA a selectable DIP switch RSB is always set High + m_brg->rate_select_w( m_maincpu->space(AS_PROGRAM), 0, MCFG_MC14411_RSB, 0xff); } /* A very ineffecient User cart emulation of two 8 bit sockets (odd and even) */ @@ -316,7 +345,7 @@ READ16_MEMBER (force68k_state::read16_rom){ /* Boot vector handler, the PCB hardwires the first 8 bytes from 0x80000 to 0x0 */ READ16_MEMBER (force68k_state::bootvect_r){ - return m_sysrom [offset]; + return m_sysrom [offset]; } /* 10. The VMEbus (text from board documentation) @@ -339,39 +368,45 @@ READ16_MEMBER (force68k_state::bootvect_r){ /* Dummy VME access methods until the VME bus device is ready for use */ READ16_MEMBER (force68k_state::vme_a24_r){ - LOG (logerror ("vme_a24_r\n")); + LOG("%s\n", FUNCNAME); return (uint16_t) 0; } WRITE16_MEMBER (force68k_state::vme_a24_w){ - LOG (logerror ("vme_a24_w\n")); + LOG("%s\n", FUNCNAME); } READ16_MEMBER (force68k_state::vme_a16_r){ - LOG (logerror ("vme_16_r\n")); + LOG("%s\n", FUNCNAME); return (uint16_t) 0; } WRITE16_MEMBER (force68k_state::vme_a16_w){ - LOG (logerror ("vme_a16_w\n")); + LOG("%s\n", FUNCNAME); } /* * Serial port clock sources can all be driven by different outputs of the 14411 + * TODO: Add DIP switches so bitrate can be selected individually for all three ports */ -WRITE_LINE_MEMBER (force68k_state::write_aciahost_clock){ - m_aciahost->write_txc (state); - m_aciahost->write_rxc (state); +WRITE_LINE_MEMBER (force68k_state::write_acia_clock){ + write_aciahost_clock(state); + write_aciaterm_clock(state); + write_aciaremt_clock(state); } +WRITE_LINE_MEMBER (force68k_state::write_aciahost_clock){ + m_aciahost->write_txc (state); + m_aciahost->write_rxc (state); +} WRITE_LINE_MEMBER (force68k_state::write_aciaterm_clock){ - m_aciaterm->write_txc (state); - m_aciaterm->write_rxc (state); + m_aciaterm->write_txc (state); + m_aciaterm->write_rxc (state); } WRITE_LINE_MEMBER (force68k_state::write_aciaremt_clock){ - m_aciaremt->write_txc (state); - m_aciaremt->write_rxc (state); + m_aciaremt->write_txc (state); + m_aciaremt->write_rxc (state); } /* @@ -392,12 +427,12 @@ WRITE_LINE_MEMBER (force68k_state::write_aciaremt_clock){ // Implementation of static 2 x 64K EPROM in sockets J10/J11 as 16 bit wide cartridge for easier // software handling. TODO: make configurable according to table above. static MACHINE_CONFIG_START( fccpu1_eprom_sockets ) - MCFG_GENERIC_CARTSLOT_ADD("exp_rom1", generic_plain_slot, "fccpu1_cart") - MCFG_GENERIC_EXTENSIONS("bin,rom") - MCFG_GENERIC_WIDTH(GENERIC_ROM16_WIDTH) - MCFG_GENERIC_ENDIAN(ENDIANNESS_BIG) - MCFG_GENERIC_LOAD(force68k_state, exp1_load) -// MCFG_SOFTWARE_LIST_ADD("cart_list", "fccpu1_cart") + MCFG_GENERIC_CARTSLOT_ADD("exp_rom1", generic_plain_slot, "fccpu1_cart") + MCFG_GENERIC_EXTENSIONS("bin,rom") + MCFG_GENERIC_WIDTH(GENERIC_ROM16_WIDTH) + MCFG_GENERIC_ENDIAN(ENDIANNESS_BIG) + MCFG_GENERIC_LOAD(force68k_state, exp1_load) +// MCFG_SOFTWARE_LIST_ADD("cart_list", "fccpu1_cart") MACHINE_CONFIG_END /*************************** @@ -405,19 +440,19 @@ MACHINE_CONFIG_END ****************************/ image_init_result force68k_state::force68k_load_cart(device_image_interface &image, generic_slot_device *slot) { - uint32_t size = slot->common_get_size("rom"); + uint32_t size = slot->common_get_size("rom"); - if (size > 0x20000) // Max 128Kb - { - LOG( printf("Cartridge size exceeding max size (128Kb): %d\n", size) ); - image.seterror(IMAGE_ERROR_UNSPECIFIED, "Cartridge size exceeding max size (128Kb)"); - return image_init_result::FAIL; - } + if (size > 0x20000) // Max 128Kb + { + LOG("Cartridge size exceeding max size (128Kb): %d\n", size); + image.seterror(IMAGE_ERROR_UNSPECIFIED, "Cartridge size exceeding max size (128Kb)"); + return image_init_result::FAIL; + } - slot->rom_alloc(size, GENERIC_ROM16_WIDTH, ENDIANNESS_BIG); - slot->common_load_rom(slot->get_rom_base(), size, "rom"); + slot->rom_alloc(size, GENERIC_ROM16_WIDTH, ENDIANNESS_BIG); + slot->common_load_rom(slot->get_rom_base(), size, "rom"); - return image_init_result::PASS; + return image_init_result::PASS; } @@ -449,8 +484,8 @@ static MACHINE_CONFIG_START (fccpu1) MCFG_RS232_RXD_HANDLER (DEVWRITELINE ("aciahost", acia6850_device, write_rxd)) MCFG_RS232_CTS_HANDLER (DEVWRITELINE ("aciahost", acia6850_device, write_cts)) - MCFG_DEVICE_ADD ("aciahost_clock", CLOCK, ACIA_CLOCK) - MCFG_CLOCK_SIGNAL_HANDLER (WRITELINE (force68k_state, write_aciahost_clock)) +// MCFG_DEVICE_ADD ("aciahost_clock", CLOCK, ACIA_CLOCK) +// MCFG_CLOCK_SIGNAL_HANDLER (WRITELINE (force68k_state, write_aciahost_clock)) /* P4/Terminal Port config */ MCFG_DEVICE_ADD ("aciaterm", ACIA6850, 0) @@ -462,14 +497,17 @@ static MACHINE_CONFIG_START (fccpu1) MCFG_RS232_RXD_HANDLER (DEVWRITELINE ("aciaterm", acia6850_device, write_rxd)) MCFG_RS232_CTS_HANDLER (DEVWRITELINE ("aciaterm", acia6850_device, write_cts)) - MCFG_DEVICE_ADD ("aciaterm_clock", CLOCK, ACIA_CLOCK) - MCFG_CLOCK_SIGNAL_HANDLER (WRITELINE (force68k_state, write_aciaterm_clock)) +// MCFG_DEVICE_ADD ("aciaterm_clock", CLOCK, ACIA_CLOCK) +// MCFG_CLOCK_SIGNAL_HANDLER (WRITELINE (force68k_state, write_aciaterm_clock)) /* P5/Remote Port config */ MCFG_DEVICE_ADD ("aciaremt", ACIA6850, 0) - MCFG_DEVICE_ADD ("aciaremt_clock", CLOCK, ACIA_CLOCK) - MCFG_CLOCK_SIGNAL_HANDLER (WRITELINE (force68k_state, write_aciaterm_clock)) +// MCFG_DEVICE_ADD ("aciaremt_clock", CLOCK, ACIA_CLOCK) +// MCFG_CLOCK_SIGNAL_HANDLER (WRITELINE (force68k_state, write_aciaremt_clock)) + + MCFG_MC14411_ADD ("brg", XTAL_1_8432MHz) + MCFG_MC14411_F1_CB(WRITELINE (force68k_state, write_acia_clock)) /* RTC Real Time Clock device */ MCFG_DEVICE_ADD ("rtc", MM58167, XTAL_32_768kHz) |