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Diffstat (limited to 'src/mame/drivers/ec184x.cpp')
-rw-r--r--src/mame/drivers/ec184x.cpp35
1 files changed, 18 insertions, 17 deletions
diff --git a/src/mame/drivers/ec184x.cpp b/src/mame/drivers/ec184x.cpp
index f07609fab76..4a8a9188eb6 100644
--- a/src/mame/drivers/ec184x.cpp
+++ b/src/mame/drivers/ec184x.cpp
@@ -18,19 +18,20 @@
#include "machine/ram.h"
#include "softlist.h"
-#define EC1841_MEMBOARD_SIZE (512*1024)
-#define VERBOSE_DBG 1 /* general debug messages */
+//#define LOG_GENERAL (1U << 0) //defined in logmacro.h already
+#define LOG_KEYBOARD (1U << 1)
+#define LOG_DEBUG (1U << 2)
+
+//#define VERBOSE (LOG_DEBUG)
+//#define LOG_OUTPUT_FUNC printf
+#include "logmacro.h"
+
+#define LOGKBD(...) LOGMASKED(LOG_KEYBOARD, __VA_ARGS__)
+#define LOGDBG(...) LOGMASKED(LOG_DEBUG, __VA_ARGS__)
-#define DBG_LOG(N,M,A) \
- do { \
- if(VERBOSE_DBG>=N) \
- { \
- if( M ) \
- logerror("%11.6f at %s: %-24s",machine().time().as_double(),machine().describe_context(),(char*)M ); \
- logerror A; \
- } \
- } while (0)
+
+#define EC1841_MEMBOARD_SIZE (512*1024)
class ec184x_state : public driver_device
@@ -98,7 +99,7 @@ READ8_MEMBER(ec184x_state::memboard_r)
data = 0xff;
else
data = m_memory.enable[data];
- DBG_LOG(1, "ec1841_memboard", ("R (%d of %d) == %02X\n", offset + 1, m_memory.boards, data));
+ LOG("ec1841_memboard R (%d of %d) == %02X\n", offset + 1, m_memory.boards, data);
return data;
}
@@ -108,7 +109,7 @@ WRITE8_MEMBER(ec184x_state::memboard_w)
address_space &program = m_maincpu->space(AS_PROGRAM);
uint8_t current = m_memory.enable[offset];
- DBG_LOG(1, "ec1841_memboard", ("W (%d of %d) <- %02X (%02X)\n", offset + 1, m_memory.boards, data, current));
+ LOG("ec1841_memboard W (%d of %d) <- %02X (%02X)\n", offset + 1, m_memory.boards, data, current);
if (offset >= m_memory.boards)
{
@@ -119,14 +120,14 @@ WRITE8_MEMBER(ec184x_state::memboard_w)
{
// disable read access
program.unmap_read(0, EC1841_MEMBOARD_SIZE - 1);
- DBG_LOG(1, "ec1841_memboard_w", ("unmap_read(%d)\n", offset));
+ LOG("ec1841_memboard_w unmap_read(%d)\n", offset);
}
if (BIT(current, 3) && !BIT(data, 3))
{
// disable write access
program.unmap_write(0, EC1841_MEMBOARD_SIZE - 1);
- DBG_LOG(1, "ec1841_memboard_w", ("unmap_write(%d)\n", offset));
+ LOG("ec1841_memboard_w unmap_write(%d)\n", offset);
}
if (!BIT(current, 2) && BIT(data, 2))
@@ -136,7 +137,7 @@ WRITE8_MEMBER(ec184x_state::memboard_w)
// enable read access
membank("bank10")->set_base(m_ram->pointer() + offset * EC1841_MEMBOARD_SIZE);
program.install_read_bank(0, EC1841_MEMBOARD_SIZE - 1, "bank10");
- DBG_LOG(1, "ec1841_memboard_w", ("map_read(%d)\n", offset));
+ LOG("ec1841_memboard_w map_read(%d)\n", offset);
}
if (!BIT(current, 3) && BIT(data, 3))
@@ -146,7 +147,7 @@ WRITE8_MEMBER(ec184x_state::memboard_w)
// enable write access
membank("bank20")->set_base(m_ram->pointer() + offset * EC1841_MEMBOARD_SIZE);
program.install_write_bank(0, EC1841_MEMBOARD_SIZE - 1, "bank20");
- DBG_LOG(1, "ec1841_memboard_w", ("map_write(%d)\n", offset));
+ LOG("ec1841_memboard_w map_write(%d)\n", offset);
}
m_memory.enable[offset] = data;