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Diffstat (limited to 'src/mame/drivers/ddragon3.cpp')
-rw-r--r--src/mame/drivers/ddragon3.cpp20
1 files changed, 10 insertions, 10 deletions
diff --git a/src/mame/drivers/ddragon3.cpp b/src/mame/drivers/ddragon3.cpp
index d0128d7c991..d02d937bad6 100644
--- a/src/mame/drivers/ddragon3.cpp
+++ b/src/mame/drivers/ddragon3.cpp
@@ -198,39 +198,39 @@ ROMs (All ROMs are 27C010 EPROM. - means not populated)
*
*************************************/
-WRITE8_MEMBER(ddragon3_state::oki_bankswitch_w)
+void ddragon3_state::oki_bankswitch_w(uint8_t data)
{
m_oki->set_rom_bank(data & 1);
}
-WRITE16_MEMBER(wwfwfest_state::wwfwfest_soundwrite)
+void wwfwfest_state::wwfwfest_soundwrite(uint16_t data)
{
// upper byte is always set to 0x31 for some reason
m_soundlatch->write(data & 0xff);
}
-WRITE16_MEMBER(ddragon3_state::ddragon3_vreg_w)
+void ddragon3_state::ddragon3_vreg_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
COMBINE_DATA(&m_vreg);
}
-WRITE16_MEMBER(ddragon3_state::irq6_ack_w)
+void ddragon3_state::irq6_ack_w(uint16_t data)
{
// this gets written to on startup and at the end of IRQ6
m_maincpu->set_input_line(6, CLEAR_LINE);
}
-WRITE16_MEMBER(ddragon3_state::irq5_ack_w)
+void ddragon3_state::irq5_ack_w(uint16_t data)
{
// this gets written to on startup and at the end of IRQ5 (input port read)
m_maincpu->set_input_line(5, CLEAR_LINE);
}
-WRITE16_MEMBER(wwfwfest_state::wwfwfest_irq_ack_w)
+void wwfwfest_state::wwfwfest_irq_ack_w(offs_t offset, uint16_t data)
{
if (offset == 0)
m_maincpu->set_input_line(3, CLEAR_LINE);
@@ -239,20 +239,20 @@ WRITE16_MEMBER(wwfwfest_state::wwfwfest_irq_ack_w)
m_maincpu->set_input_line(2, CLEAR_LINE);
}
-WRITE16_MEMBER(wwfwfest_state::wwfwfest_flipscreen_w)
+void wwfwfest_state::wwfwfest_flipscreen_w(uint16_t data)
{
flip_screen_set(data&1);
}
/*- Palette Reads/Writes - A5 and A6 are not connected */
-READ16_MEMBER(wwfwfest_state::wwfwfest_paletteram_r)
+uint16_t wwfwfest_state::wwfwfest_paletteram_r(offs_t offset)
{
offset = (offset & 0x000f) | (offset & 0x7fc0) >> 2;
return m_paletteram[offset];
}
-WRITE16_MEMBER(wwfwfest_state::wwfwfest_paletteram_w)
+void wwfwfest_state::wwfwfest_paletteram_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
offset = (offset & 0x000f) | (offset & 0x7fc0) >> 2;
m_palette->write16(offset, data, mem_mask);
@@ -261,7 +261,7 @@ WRITE16_MEMBER(wwfwfest_state::wwfwfest_paletteram_w)
/*- Priority Control -*/
-WRITE8_MEMBER(wwfwfest_state::wwfwfest_priority_w)
+void wwfwfest_state::wwfwfest_priority_w(uint8_t data)
{
m_pri = data;
}