diff options
Diffstat (limited to 'src/mame/drivers/crystal.cpp')
-rw-r--r-- | src/mame/drivers/crystal.cpp | 1445 |
1 files changed, 188 insertions, 1257 deletions
diff --git a/src/mame/drivers/crystal.cpp b/src/mame/drivers/crystal.cpp index 23121983996..58fc5c8e9a7 100644 --- a/src/mame/drivers/crystal.cpp +++ b/src/mame/drivers/crystal.cpp @@ -116,121 +116,14 @@ Notes: Note: there are 8 spaces total for FlashROMs. Only U1, U2 & U3 are populated in this cart. - -P's Attack (c) 2004 Uniana Co., Ltd - -+----------54321---654321--654321---------------------------+ -|VOL TICKET GUN_1P GUN_2P +---------| -| | | -+-+ | 256MB | - | CC-DAC | Compact | -+-+ EMUL* | Flash | -| | | -|5 +---+ +---------| -|6 | | | -|P | R | 25.1750MHz +--------------+| -|I | A | | 42Pin* || -|N | M | +--------------+| -| | | +--------------+| -|C +---+ +------------+ | SYS || -|O | | +--------------+| -|N +---+ | | | -|N | | |VRenderZERO+| | -|E SERVICE | R | | MagicEyes | +-------+ 62256* | -|C | A | | | | RAM | | -|T TEST | M | | | +-------+ 62256* | -|O | | +------------+ | -|R RESET +---+ | -| 14.31818MHz | -+-+ | - | EEPROM | -+-+ GAL DSW | -| | -| VGA PIC BAT3.6V* | -+-----------------------------------------------------------+ - -* denotes unpopulated device - -RAM are Samsung K4S641632H-TC75 -VGA is a standard PC 15 pin VGA connection -DSW is 2 switch dipswitch (switches 3-8 are unpopulated) -PIC is a Microchip PIC16C711-041/P (silkscreened on the PCB as COSTOM) -SYS is a ST M27C160 EPROM (silkscreened on the PCB as SYSTEM_ROM_32M) -GAL is a GAL16V8B (not dumped) -EMUL is an unpopulated 8 pin connector -EEPROM is a 93C86 16K 5.0v Serial EEPROM (2048x8-bit or 1024x16-bit) -CC-DAC is a TDA1311A Stereo Continuous Calibration DAC - - - P's Attack non JAMMA standard 56pin Edge Connector Pinout: - - 56pin Edge Connector - Solder Side | Parts Side ------------------------------------------------------------------- - GND | A | 1 | GND - GND | B | 2 | GND - +5 | C | 3 | +5 - +5 | D | 4 | +5 - Player 1 Start Lamp | E | 5 | Coin Lamp - +12 | F | 6 | +12 ------------- KEY ------------| G | 7 |------------ KEY ----------- - Player 2 Start Lamp | H | 8 | Coin Counter - L Speaker (-) | J | 9 | L Speaker (+) - R Speaker (-) | K | 10| R Speaker (+) - Video Vertical Sync | L | 11| - Video Green | M | 12| Video Red - Video Sync | N | 13| Video Blue - Service Switch | P | 14| Video GND - Video Horizontal Sync | R | 15| Test Switch - | S | 16| Coin Switch - Start Player 2 | T | 17| Start Player 1 - | U | 18| - | V | 19| - | W | 20| - | X | 21| - | Y | 22| - | a | 23| - | b | 24| - | d | 25| - | e | 26| - GND | f | 27| GND - GND | g | 28| GND - - -TICKET is a 5 pin connector: - - 1| LED - 2| GND - 3| OUT - 4| IN - 5| +12v - -GUN_xP are 6 pin gun connectors (pins 3-6 match the UNICO sytle guns): - - GUN-1P: Left (Blue) Gun Connector Pinout - - 1| GND - 2| Solenoid - 3| Sensor - 4| +5V - 5| Switch (Trigger) - 6| GND - - GUN-2P: Right (Pink) Gun Connector Pinout - - 1| GND - 2| Solenoid - 3| Sensor - 4| +5V - 5| Switch (Trigger) - 6| GND - */ #include "emu.h" #include "cpu/se3208/se3208.h" #include "machine/ds1302.h" #include "machine/nvram.h" +#include "machine/eepromser.h" +#include "machine/vrender0.h" #include "sound/vrender0.h" #include "video/vrender0.h" #include "emupal.h" @@ -240,25 +133,27 @@ GUN_xP are 6 pin gun connectors (pins 3-6 match the UNICO sytle guns): #include <algorithm> #define IDLE_LOOP_SPEEDUP +// strip this define once we have actual credits from Smitdogg +//#define ROGUE_CARTS class crystal_state : public driver_device { public: crystal_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device(mconfig, type, tag), - m_sysregs(*this, "sysregs"), m_workram(*this, "workram"), - m_vidregs(*this, "vidregs"), m_textureram(*this, "textureram"), m_frameram(*this, "frameram"), m_reset_patch(*this, "reset_patch"), m_flash(*this, "flash"), m_mainbank(*this, "mainbank"), m_maincpu(*this, "maincpu"), + m_vr0soc(*this, "vr0soc"), m_vr0vid(*this, "vr0vid"), m_vr0snd(*this, "vr0snd"), m_ds1302(*this, "rtc"), - m_screen(*this, "screen") + m_screen(*this, "screen"), + m_eeprom(*this, "eeprom") { } void init_topbladv(); @@ -266,447 +161,111 @@ public: void init_crysking(); void init_evosocc(); void init_donghaer(); - void init_psattack(); +#ifdef ROGUE_CARTS + void init_maldaiza(); +#endif - void crospuzl(machine_config &config); void crystal(machine_config &config); - void crzyddz2(machine_config &config); - void trivrus(machine_config &config); + DECLARE_INPUT_CHANGED_MEMBER(coin_inserted); private: /* memory pointers */ - required_shared_ptr<uint32_t> m_sysregs; - uint32_t *m_crtcregs; required_shared_ptr<uint32_t> m_workram; - required_shared_ptr<uint32_t> m_vidregs; required_shared_ptr<uint32_t> m_textureram; required_shared_ptr<uint32_t> m_frameram; - optional_shared_ptr<uint32_t> m_reset_patch; // not needed for trivrus + optional_shared_ptr<uint32_t> m_reset_patch; optional_region_ptr<uint32_t> m_flash; optional_memory_bank m_mainbank; /* devices */ required_device<se3208_device> m_maincpu; + required_device<vrender0soc_device> m_vr0soc; required_device<vr0video_device> m_vr0vid; required_device<vr0sound_device> m_vr0snd; required_device<ds1302_device> m_ds1302; required_device<screen_device> m_screen; + optional_device<eeprom_serial_93cxx_device> m_eeprom; #ifdef IDLE_LOOP_SPEEDUP uint8_t m_FlipCntRead; + DECLARE_WRITE_LINE_MEMBER(idle_skip_resume_w); + DECLARE_WRITE_LINE_MEMBER(idle_skip_speedup_w); #endif uint32_t m_Bank; uint32_t m_maxbank; - uint8_t m_FlipCount; - uint8_t m_IntHigh; - emu_timer *m_Timer[4]; uint32_t m_FlashCmd; - uint32_t m_PIO; - uint32_t m_DMActrl[2]; - uint8_t m_OldPort4; - - uint32_t *TimerRegsPtr(int which) const; - void TimerStart(int which); - - DECLARE_READ32_MEMBER(FlipCount_r); - DECLARE_WRITE32_MEMBER(FlipCount_w); - DECLARE_WRITE32_MEMBER(IntAck_w); - template<int Which> DECLARE_WRITE32_MEMBER(Timer_w); - template<int Which> DECLARE_READ32_MEMBER(Timer_r); - template<int Which> DECLARE_READ32_MEMBER(DMA_r); - template<int Which> DECLARE_WRITE32_MEMBER(DMA_w); - DECLARE_READ32_MEMBER(crtc_r); - DECLARE_WRITE32_MEMBER(crtc_w); - void crtc_update(); - - DECLARE_READ32_MEMBER(Input_r); + + IRQ_CALLBACK_MEMBER(icallback); + DECLARE_READ32_MEMBER(system_input_r); DECLARE_WRITE32_MEMBER(Banksw_w); - DECLARE_READ32_MEMBER(PIO_r); - DECLARE_WRITE32_MEMBER(PIO_w); DECLARE_READ32_MEMBER(FlashCmd_r); DECLARE_WRITE32_MEMBER(FlashCmd_w); - - DECLARE_READ8_MEMBER(trivrus_input_r); - DECLARE_WRITE8_MEMBER(trivrus_input_w); - uint8_t m_trivrus_input; - - DECLARE_READ32_MEMBER(crzyddz2_key_r); - DECLARE_WRITE32_MEMBER(crzyddz2_PIO_w); - uint8_t m_crzyddz2_prot; + DECLARE_WRITE32_MEMBER(coin_counters_w); virtual void machine_start() override; virtual void machine_reset() override; uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); DECLARE_WRITE_LINE_MEMBER(screen_vblank); - TIMER_CALLBACK_MEMBER(Timercb); - IRQ_CALLBACK_MEMBER(icallback); - void IntReq( int num ); - inline void DMA_w( address_space &space, int which, uint32_t data, uint32_t mem_mask ); - void PatchReset( ); - uint16_t GetVidReg( address_space &space, uint16_t reg ); - void SetVidReg( address_space &space, uint16_t reg, uint16_t val ); - void crospuzl_mem(address_map &map); + void PatchReset(); void crystal_mem(address_map &map); - void crzyddz2_mem(address_map &map); - void internal_map(address_map &map); - void trivrus_mem(address_map &map); + + // PIO + DECLARE_READ32_MEMBER(PIOldat_r); + DECLARE_WRITE32_MEMBER(PIOldat_w); + DECLARE_READ32_MEMBER(PIOedat_r); + uint32_t m_PIO; }; -void crystal_state::IntReq( int num ) +uint32_t crystal_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) { - address_space &space = m_maincpu->space(AS_PROGRAM); - uint32_t IntEn = space.read_dword(0x01800c08); - uint32_t IntPend = space.read_dword(0x01800c0c); - if (IntEn & (1 << num)) + if (m_vr0soc->crt_is_blanked()) // Blank Screen { - IntPend |= (1 << num); - space.write_dword(0x01800c0c, IntPend); - m_maincpu->set_input_line(SE3208_INT, ASSERT_LINE); + bitmap.fill(0, cliprect); + return 0; } -#ifdef IDLE_LOOP_SPEEDUP - m_FlipCntRead = 0; - m_maincpu->resume(SUSPEND_REASON_SPIN); -#endif -} -READ32_MEMBER(crystal_state::FlipCount_r) -{ -#ifdef IDLE_LOOP_SPEEDUP - uint32_t IntPend = space.read_dword(0x01800c0c); - m_FlipCntRead++; - if (m_FlipCntRead >= 16 && !IntPend && m_FlipCount != 0) - m_maincpu->suspend(SUSPEND_REASON_SPIN, 1); -#endif - return ((uint32_t) m_FlipCount) << 16; + m_vr0vid->screen_update(screen, bitmap, cliprect); + return 0; } -WRITE32_MEMBER(crystal_state::FlipCount_w) +WRITE_LINE_MEMBER(crystal_state::screen_vblank) { - if (ACCESSING_BITS_16_23) + // rising edge + if (state) { - int fc = (data >> 16) & 0xff; - if (fc == 1) - m_FlipCount++; - else if (fc == 0) - m_FlipCount = 0; - } -} - -WRITE32_MEMBER(crystal_state::IntAck_w) -{ - uint32_t IntPend = space.read_dword(0x01800c0c); + if (m_vr0soc->crt_active_vblank_irq() == true) + m_vr0soc->IntReq(24); //VRender0 VBlank - if (ACCESSING_BITS_0_7) - { - IntPend &= ~(1 << (data & 0x1f)); - space.write_dword(0x01800c0c, IntPend); - if (!IntPend) - m_maincpu->set_input_line(SE3208_INT, CLEAR_LINE); + m_vr0vid->execute_drawing(); } - if (ACCESSING_BITS_8_15) - m_IntHigh = (data >> 8) & 7; } IRQ_CALLBACK_MEMBER(crystal_state::icallback) { - address_space &space = m_maincpu->space(AS_PROGRAM); - uint32_t IntPend = space.read_dword(0x01800c0c); - - for (int i = 0; i < 32; ++i) - { - if (BIT(IntPend, i)) - { - return (m_IntHigh << 5) | i; - } - } - return 0; //This should never happen -} - -uint32_t *crystal_state::TimerRegsPtr(int which) const -{ - return &m_sysregs[0x1400/4 + which * 8/4]; -} - -void crystal_state::TimerStart(int which) -{ - uint32_t *regs = TimerRegsPtr(which); - - int PD = (regs[0] >> 8) & 0xff; - int TCV = regs[1] & 0xffff; - attotime period = attotime::from_hz(14318180 * 3) * ((PD + 1) * (TCV + 1)); // TODO : related to CPU clock - m_Timer[which]->adjust(period); - -// printf("timer %d start, PD = %x TCV = %x period = %s\n", which, PD, TCV, period.as_string()); -} - -TIMER_CALLBACK_MEMBER(crystal_state::Timercb) -{ - int which = (int)(uintptr_t)ptr; - static const int num[] = { 0, 1, 9, 10 }; - - uint32_t *regs = TimerRegsPtr(which); - - if (regs[0] & 2) - TimerStart(which); - else - regs[0] &= ~1; - - IntReq(num[which]); + return m_vr0soc->irq_callback(); } -template<int Which> -WRITE32_MEMBER(crystal_state::Timer_w) -{ - uint32_t *regs = TimerRegsPtr(Which); - - uint32_t old = regs[0]; - data = COMBINE_DATA(®s[0]); - if ((data ^ old) & 1) - { - if (data & 1) - { - TimerStart(Which); - } - else - { - // Timer stop - m_Timer[Which]->adjust(attotime::never); -// printf("timer %d stop\n", Which); - } - } -} - -template<int Which> -READ32_MEMBER(crystal_state::Timer_r) -{ - return *TimerRegsPtr(Which); -} - -template<int Which> -READ32_MEMBER(crystal_state::DMA_r) -{ - return m_DMActrl[Which]; -} - -template<int Which> -WRITE32_MEMBER(crystal_state::DMA_w) -{ - if (((data ^ m_DMActrl[Which]) & (1 << 10)) && (data & (1 << 10))) //DMAOn - { - uint32_t const CTR = data; - uint32_t const SRC = space.read_dword(0x01800804 + Which * 0x10); - uint32_t const DST = space.read_dword(0x01800808 + Which * 0x10); - uint32_t const CNT = space.read_dword(0x0180080C + Which * 0x10); - - if (CTR & 0x2) //32 bits - { - for (int i = 0; i < CNT; ++i) - { - uint32_t v = space.read_dword(SRC + i * 4); - space.write_dword(DST + i * 4, v); - } - } - else if (CTR & 0x1) //16 bits - { - for (int i = 0; i < CNT; ++i) - { - uint16_t v = space.read_word(SRC + i * 2); - space.write_word(DST + i * 2, v); - } - } - else //8 bits - { - for (int i = 0; i < CNT; ++i) - { - uint8_t v = space.read_byte(SRC + i); - space.write_byte(DST + i, v); - } - } - data &= ~(1 << 10); - space.write_dword(0x0180080C + Which * 0x10, 0); - IntReq(7 + Which); - } - COMBINE_DATA(&m_DMActrl[Which]); -} - -READ32_MEMBER(crystal_state::crtc_r) -{ - uint32_t res = m_crtcregs[offset]; - uint32_t hdisp = (m_crtcregs[0x0c / 4] + 1); - uint32_t vdisp = (m_crtcregs[0x1c / 4] + 1); - switch (offset) - { - case 0: // CRTC Status / Mode - if ((m_crtcregs[0x30 / 4] & 1) == 0) // Interlace - vdisp <<= 1; - - if (m_screen->vpos() <= vdisp) // Vertical display enable status - res |= 0x4000; - - if (m_screen->hpos() > hdisp) // horizontal & vertical blank period - res &= ~0x2000; - else - res |= 0x2000; - - break; - default: - break; - } - return res; -} - -WRITE32_MEMBER(crystal_state::crtc_w) -{ - if (((m_crtcregs[0] & 0x0100) == 0x0100) && (offset > 0)) // Write protect - return; - - uint32_t old = m_crtcregs[offset]; - switch (offset * 4) - { - case 0: // CRTC Status / Mode Register (CRTMOD) - mem_mask &= ~0xfffffc00; // Bit 31-10 Reserved - break; - case 0x04: // CRTC Timing Control Register (CRTTIM) - mem_mask &= ~0xffffc000; // Bit 31-14 Reserved - break; - case 0x08: // Horizontal Sync Width / Back Porch Register (HSWBP) - mem_mask &= ~0xffff0000; // Bit 31-16 Reserved - break; - case 0x0c: // Horizontal Display Total Register (HDISP) - mem_mask &= ~0xfffffc00; // Bit 31-10 Reserved - break; - case 0x10: // Horizontal Sync Front Porch Register (HSFP) - mem_mask &= ~0xfffffe00; // Bit 31-9 Reserved - break; - case 0x14: // Field Window Bound Register (FWINB) - mem_mask &= ~0xffff80c0; // Bit 31-15, 7-6 Reserved - break; - case 0x18: // Vertical Sync Back Porch Register (VSBP) - mem_mask &= ~0xffffff00; // Bit 31-8 Reserved - break; - case 0x1c: // Vertical Display Total Register (VDISP) - mem_mask &= ~0xfffffe00; // Bit 31-9 Reserved - break; - case 0x20: // Horizontal Total Register (HTOT) - mem_mask &= ~0xffffe000; // Bit 31-13 Reserved - break; - case 0x24: // Vertical Total Register (VTOT) - mem_mask &= ~0xfffff000; // Bit 31-12 Reserved - break; - case 0x28: // Horizontal Line Back Porch Register (HLBP) - mem_mask &= ~0xfffffc00; // Bit 31-10 Reserved - break; - case 0x2c: // CRT Display Start Address 0 Register (STAD0) - mem_mask &= ~0xffff8000; // Bit 31-15 Reserved - break; - case 0x30: // CRT Display Start Address 1 Register (STAD1) - mem_mask &= ~0xffff8000; // Bit 31-15 Reserved - break; - case 0x38: // Light Pen 0 X Register (LIGHT0X) - mem_mask &= ~0xfffff800; // Bit 31-11 Reserved - break; - case 0x3c: // Light Pen 0 Y Register (LIGHT0Y) - mem_mask &= ~0xfffffe00; // Bit 31-9 Reserved - break; - case 0x40: // Light Pen 1 X Register (LIGHT1X) - mem_mask &= ~0xfffff800; // Bit 31-11 Reserved - break; - case 0x44: // Light Pen 1 Y Register (LIGHT1Y) - mem_mask &= ~0xfffffe00; // Bit 31-9 Reserved - break; - case 0x48: // Light Pen Input Control Register (LIGHTC) - mem_mask &= ~0xfffffffc; // Bit 31-2 Reserved - break; - default: - return; - } - COMBINE_DATA(&m_crtcregs[offset]); - if (((offset == (0xc / 4)) || (offset == (0x1c / 4)) || (offset == (0x30 / 4))) && (old ^ m_crtcregs[offset])) - crtc_update(); - -} - -void crystal_state::crtc_update() +#ifdef IDLE_LOOP_SPEEDUP +WRITE_LINE_MEMBER(crystal_state::idle_skip_resume_w) { - // TODO : Implement other CRTC parameters - uint32_t hdisp = m_crtcregs[0x0c / 4] + 1; - uint32_t vdisp = m_crtcregs[0x1c / 4] + 1; - if ((m_crtcregs[0x30 / 4] & 1) == 0) // Interlace - vdisp <<= 1; - - rectangle const visarea(0, hdisp - 1, 0, vdisp - 1); - m_screen->configure(hdisp, vdisp, visarea, m_screen->frame_period().attoseconds()); + m_FlipCntRead = 0; + m_maincpu->resume(SUSPEND_REASON_SPIN); } -void crystal_state::internal_map(address_map &map) +WRITE_LINE_MEMBER(crystal_state::idle_skip_speedup_w) { -// map(0x00000000, 0x00ffffff) // Local ROM -// map(0x01000000, 0x010fffff) // Peripheral Device 0 -// map(0x01100000, 0x011fffff) // Peripheral Device 1 -// map(0x01200000, 0x012fffff) // Peripheral Device 2 -// map(0x01300000, 0x013fffff) // Peripheral Device 3 -// map(0x01400000, 0x014fffff) // Peripheral Device 4 -// map(0x01500000, 0x015fffff) // Peripheral Device 5 -// map(0x01600000, 0x016fffff) // Peripheral Device 6 -// map(0x01700000, 0x017fffff) // Peripheral Device 7 -// map(0x01800000, 0x01ffffff) // Internal Registers(VRender0, or Amazon) - - map(0x01800000, 0x0180ffff).ram().share("sysregs"); -// map(0x01800000, 0x018003ff) // System/General -// map(0x01800400, 0x018007ff) // Local Memory Controller -// map(0x01800800, 0x01800bff) // DMA - map(0x01800800, 0x01800803).rw(FUNC(crystal_state::DMA_r<0>), FUNC(crystal_state::DMA_w<0>)); - map(0x01800810, 0x01800813).rw(FUNC(crystal_state::DMA_r<1>), FUNC(crystal_state::DMA_w<1>)); -// map(0x01800c00, 0x01800fff) // Interrupt Controller - map(0x01800c04, 0x01800c07).w(FUNC(crystal_state::IntAck_w)); -// map(0x01801000, 0x018013ff) // UART -// map(0x01801400, 0x018017ff) // Timer & Counter - map(0x01801400, 0x01801403).rw(FUNC(crystal_state::Timer_r<0>), FUNC(crystal_state::Timer_w<0>)); - map(0x01801408, 0x0180140b).rw(FUNC(crystal_state::Timer_r<1>), FUNC(crystal_state::Timer_w<1>)); - map(0x01801410, 0x01801413).rw(FUNC(crystal_state::Timer_r<2>), FUNC(crystal_state::Timer_w<2>)); - map(0x01801418, 0x0180141b).rw(FUNC(crystal_state::Timer_r<3>), FUNC(crystal_state::Timer_w<3>)); -// map(0x01801800, 0x01801bff) // Pulse Width Modulation -// map(0x01802000, 0x018023ff) // PIO (Port) -// map(0x01802004, 0x01802007).rw(FUNC(crystal_state::PIO_r), FUNC(crystal_state::PIO_w)); // PIOLDAT -// map(0x01802008, 0x0180200b) // PIOEDAT -// map(0x01802400, 0x018027ff) // Peripheral Chip Select -// map(0x01802800, 0x01802bff) // SIO -// map(0x01803400, 0x018037ff) // CRT Controller - map(0x01803400, 0x018037ff).rw(FUNC(crystal_state::crtc_r), FUNC(crystal_state::crtc_w)); -// map(0x01804000, 0x018043ff) // RAMDAC & PLL - -// map(0x02000000, 0x02ffffff).ram().share("workram"); // Local RAM/DRAM (Max.16MB) - - map(0x03000000, 0x0300ffff).ram().share("vidregs"); - map(0x030000a4, 0x030000a7).rw(FUNC(crystal_state::FlipCount_r), FUNC(crystal_state::FlipCount_w)); -// map(0x03800000, 0x03ffffff).ram().share("textureram"); // Texture Buffer Memory (Max.8MB) -// map(0x04000000, 0x047fffff).ram().share("frameram"); // Frame Buffer Memory (Max.8MB) - map(0x04800000, 0x04800fff).rw(m_vr0snd, FUNC(vr0sound_device::vr0_snd_read), FUNC(vr0sound_device::vr0_snd_write)); - -// map(0x05000000, 0x0fffffff) // Expansion ROM + m_FlipCntRead++; + if (m_FlipCntRead >= 16 && m_vr0soc->irq_pending() == false && state == ASSERT_LINE) + m_maincpu->suspend(SUSPEND_REASON_SPIN, 1); } +#endif - -READ32_MEMBER(crystal_state::Input_r) +READ32_MEMBER(crystal_state::system_input_r) { - if (offset == 0) - return ioport("P1_P2")->read(); - else if (offset == 1) - return ioport("P3_P4")->read(); - else if( offset == 2) - { - uint8_t Port4 = ioport("SYSTEM")->read(); - if (!(Port4 & 0x10) && ((m_OldPort4 ^ Port4) & 0x10)) //coin buttons trigger IRQs - IntReq(12); - if (!(Port4 & 0x20) && ((m_OldPort4 ^ Port4) & 0x20)) - IntReq(19); - m_OldPort4 = Port4; - return /*dips*/ioport("DSW")->read() | (Port4 << 16); - } - return 0; + return ( ioport("SYSTEM")->read() << 16) | (ioport("DSW")->read()) | 0xff00ff00; } WRITE32_MEMBER(crystal_state::Banksw_w) @@ -715,12 +274,13 @@ WRITE32_MEMBER(crystal_state::Banksw_w) m_mainbank->set_entry(m_Bank); } -READ32_MEMBER(crystal_state::PIO_r) +READ32_MEMBER(crystal_state::PIOldat_r) { return m_PIO; } -WRITE32_MEMBER(crystal_state::PIO_w) +// PIO Latched output DATa Register +WRITE32_MEMBER(crystal_state::PIOldat_w) { uint32_t RST = data & 0x01000000; uint32_t CLK = data & 0x02000000; @@ -730,14 +290,15 @@ WRITE32_MEMBER(crystal_state::PIO_w) m_ds1302->io_w(DAT ? 1 : 0); m_ds1302->sclk_w(CLK ? 1 : 0); - if (m_ds1302->io_r()) - space.write_dword(0x01802008, space.read_dword(0x01802008) | 0x10000000); - else - space.write_dword(0x01802008, space.read_dword(0x01802008) & (~0x10000000)); - COMBINE_DATA(&m_PIO); } +// PIO External DATa Register +READ32_MEMBER(crystal_state::PIOedat_r) +{ + return m_ds1302->io_r() << 28; +} + READ32_MEMBER(crystal_state::FlashCmd_r) { if ((m_FlashCmd & 0xff) == 0xff) @@ -765,156 +326,46 @@ WRITE32_MEMBER(crystal_state::FlashCmd_w) m_FlashCmd = data; } -void crystal_state::crystal_mem(address_map &map) +WRITE32_MEMBER(crystal_state::coin_counters_w) { - internal_map(map); - map(0x00000000, 0x0001ffff).rom().nopw(); - - map(0x01200000, 0x0120000f).r(FUNC(crystal_state::Input_r)); - map(0x01280000, 0x01280003).w(FUNC(crystal_state::Banksw_w)); - map(0x01400000, 0x0140ffff).ram().share("nvram"); - - map(0x01802004, 0x01802007).rw(FUNC(crystal_state::PIO_r), FUNC(crystal_state::PIO_w)); - - map(0x02000000, 0x027fffff).ram().share("workram"); - - map(0x03800000, 0x03ffffff).ram().share("textureram"); - map(0x04000000, 0x047fffff).ram().share("frameram"); - - map(0x05000000, 0x05ffffff).bankr("mainbank"); - map(0x05000000, 0x05000003).rw(FUNC(crystal_state::FlashCmd_r), FUNC(crystal_state::FlashCmd_w)); - - map(0x44414F4C, 0x44414F7F).ram().share("reset_patch"); -} - -// Trivia R Us -// To do: touch panel, RTC - -READ8_MEMBER(crystal_state::trivrus_input_r) -{ - switch (m_trivrus_input) - { - case 1: return ioport("IN1")->read(); - case 2: return ioport("IN2")->read(); - case 3: return ioport("IN3")->read(); - case 4: return ioport("IN4")->read(); - case 5: return ioport("IN5")->read(); - case 6: return ioport("DSW")->read(); - } - logerror("%s: unknown input %02x read\n", machine().describe_context(), m_trivrus_input); - return 0xff; -} - -WRITE8_MEMBER(crystal_state::trivrus_input_w) -{ - m_trivrus_input = data & 0xff; -} - -void crystal_state::trivrus_mem(address_map &map) -{ - internal_map(map); - map(0x00000000, 0x0007ffff).rom().nopw(); - -// 0x01280000 & 0x0000ffff (written at boot) - map(0x01500000, 0x01500000).rw(FUNC(crystal_state::trivrus_input_r), FUNC(crystal_state::trivrus_input_w)); -// 0x01500010 & 0x000000ff = sec -// 0x01500010 & 0x00ff0000 = min -// 0x01500014 & 0x000000ff = hour -// 0x01500014 & 0x00ff0000 = day -// 0x01500018 & 0x000000ff = month -// 0x0150001c & 0x000000ff = year - 2000 - map(0x01600000, 0x01607fff).ram().share("nvram"); - - map(0x01802004, 0x01802007).rw(FUNC(crystal_state::PIO_r), FUNC(crystal_state::PIO_w)); - - map(0x02000000, 0x027fffff).ram().share("workram"); - - map(0x03800000, 0x03ffffff).ram().share("textureram"); - map(0x04000000, 0x047fffff).ram().share("frameram"); - - map(0x05000000, 0x05ffffff).bankr("mainbank"); - map(0x05000000, 0x05000003).rw(FUNC(crystal_state::FlashCmd_r), FUNC(crystal_state::FlashCmd_w)); - -// AM_RANGE(0x44414F4C, 0x44414F7F) AM_RAM AM_SHARE("reset_patch") -} - -void crystal_state::crospuzl_mem(address_map &map) -{ - trivrus_mem(map); - - map(0x01500000, 0x01500003).r(FUNC(crystal_state::FlashCmd_r)); - map(0x01500100, 0x01500103).w(FUNC(crystal_state::FlashCmd_w)); - map(0x01510000, 0x01510003).portr("IN0"); - map(0x01511000, 0x01511003).portr("IN1"); - map(0x01512000, 0x01512003).portr("IN2"); - map(0x01513000, 0x01513003).portr("IN3"); -} - -// Crazy Dou Di Zhu II -// To do: HY04 (pic?) protection - -WRITE32_MEMBER(crystal_state::crzyddz2_PIO_w) -{ - COMBINE_DATA(&m_PIO); - - if (ACCESSING_BITS_8_15) + if (ACCESSING_BITS_0_7) { - int mux = (m_PIO >> 8) & 0x1f; - if (mux == 0x1f) - { - m_crzyddz2_prot = ((m_PIO >> 8) & 0xc0) ^ 0x40; - logerror("%s: PIO = %08x, prot = %02x\n", machine().describe_context(), m_PIO, m_crzyddz2_prot); - } + // Both signals are sent when setting is "1 shooter" + // Only evosocc and crysking allow the user to change this setting. + machine().bookkeeping().coin_counter_w(0, data & 1); + machine().bookkeeping().coin_counter_w(1, data & 2); } } -READ32_MEMBER(crystal_state::crzyddz2_key_r) +void crystal_state::crystal_mem(address_map &map) { - static const char *const key_names[] = { "KEY0", "KEY1", "KEY2", "KEY3", "KEY4" }; - - int mux = (m_PIO >> 8) & 0x1f; - - uint8_t data = 0x3f; - for (int i = 0; i < sizeof(key_names)/sizeof(key_names[0]); ++i) - if (!BIT(mux,i)) - data = ioport(key_names[i])->read(); - -/* -crzyddz2 in out - 00 40 - 40 00 - c0 80 -*/ -// m_crzyddz2_prot = (m_PIO >> 8) & 0xc0) ^ 0x40; - m_crzyddz2_prot = (machine().rand() & 0xc0); - - return 0xffffff00 | data | m_crzyddz2_prot; -} + map(0x00000000, 0x0001ffff).rom().nopw(); -void crystal_state::crzyddz2_mem(address_map &map) -{ - internal_map(map); - map(0x00000000, 0x00ffffff).rom().nopw(); + map(0x01200000, 0x01200003).portr("P1_P2").w(FUNC(crystal_state::coin_counters_w)); + map(0x01200004, 0x01200007).portr("P3_P4"); + map(0x01200008, 0x0120000b).r(FUNC(crystal_state::system_input_r)); map(0x01280000, 0x01280003).w(FUNC(crystal_state::Banksw_w)); map(0x01400000, 0x0140ffff).ram().share("nvram"); - map(0x01500000, 0x01500003).portr("P1_P2"); - map(0x01500004, 0x01500007).r(FUNC(crystal_state::crzyddz2_key_r)); - map(0x01802004, 0x01802007).rw(FUNC(crystal_state::PIO_r), FUNC(crystal_state::crzyddz2_PIO_w)); + map(0x01800000, 0x01ffffff).m(m_vr0soc, FUNC(vrender0soc_device::regs_map)); + map(0x01802004, 0x01802007).rw(FUNC(crystal_state::PIOldat_r), FUNC(crystal_state::PIOldat_w)); + map(0x01802008, 0x0180200b).r(FUNC(crystal_state::PIOedat_r)); - map(0x02000000, 0x027fffff).ram().share("workram"); + // mirror is accessed by donghaer on later levels + map(0x02000000, 0x027fffff).mirror(0x00800000).ram().share("workram"); + map(0x03000000, 0x0300ffff).m(m_vr0vid, FUNC(vr0video_device::regs_map)); map(0x03800000, 0x03ffffff).ram().share("textureram"); map(0x04000000, 0x047fffff).ram().share("frameram"); - + map(0x04800000, 0x04800fff).rw(m_vr0snd, FUNC(vr0sound_device::vr0_snd_read), FUNC(vr0sound_device::vr0_snd_write)); + map(0x05000000, 0x05ffffff).bankr("mainbank"); map(0x05000000, 0x05000003).rw(FUNC(crystal_state::FlashCmd_r), FUNC(crystal_state::FlashCmd_w)); -// AM_RANGE(0x44414F4C, 0x44414F7F) AM_RAM AM_SHARE("reset_patch") + map(0x44414F4C, 0x44414F7F).ram().share("reset_patch"); } - void crystal_state::PatchReset( ) { if (!m_reset_patch) @@ -969,8 +420,8 @@ loop: void crystal_state::machine_start() { - for (int i = 0; i < 4; i++) - m_Timer[i] = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(crystal_state::Timercb),this), (void*)(uintptr_t)i); + m_vr0vid->set_areas(reinterpret_cast<uint8_t*>(m_textureram.target()), reinterpret_cast<uint16_t*>(m_frameram.target())); + m_vr0snd->set_areas(m_textureram, m_frameram); PatchReset(); @@ -992,162 +443,31 @@ void crystal_state::machine_start() #ifdef IDLE_LOOP_SPEEDUP save_item(NAME(m_FlipCntRead)); #endif - - save_item(NAME(m_Bank)); - save_item(NAME(m_FlipCount)); - save_item(NAME(m_IntHigh)); - save_item(NAME(m_FlashCmd)); - save_item(NAME(m_PIO)); - save_item(NAME(m_DMActrl)); - save_item(NAME(m_OldPort4)); - save_item(NAME(m_trivrus_input)); } void crystal_state::machine_reset() { - std::fill_n(&m_sysregs[0], m_sysregs.bytes() / 4, 0); - std::fill_n(&m_vidregs[0], m_vidregs.bytes() / 4, 0); - m_crtcregs = &m_sysregs[0x3400/4]; - m_crtcregs[1] = 0x00000022; - - m_FlipCount = 0; - m_IntHigh = 0; m_Bank = 0; m_mainbank->set_entry(m_Bank); m_FlashCmd = 0xff; - m_OldPort4 = 0; - m_DMActrl[0] = 0; - m_DMActrl[1] = 0; - - for (int i = 0; i < 4; i++) - { - *TimerRegsPtr(i) = 0xff << 8; - m_Timer[i]->adjust(attotime::never); - } - - m_vr0snd->set_areas(m_textureram, m_frameram); #ifdef IDLE_LOOP_SPEEDUP m_FlipCntRead = 0; #endif PatchReset(); - - m_crzyddz2_prot = 0x00; -} - -uint16_t crystal_state::GetVidReg( address_space &space, uint16_t reg ) -{ - return space.read_word(0x03000000 + reg); -} - -void crystal_state::SetVidReg( address_space &space, uint16_t reg, uint16_t val ) -{ - space.write_word(0x03000000 + reg, val); -} - - -uint32_t crystal_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) -{ - if ((m_crtcregs[0] & 0x0200) == 0x0200) // Blank Screen - { - bitmap.fill(0, cliprect); - return 0; - } - - address_space &space = m_maincpu->space(AS_PROGRAM); - int DoFlip; - - uint32_t B0 = 0x0; - uint32_t B1 = (GetVidReg(space, 0x90) & 0x8000) ? 0x400000 : 0x100000; - uint16_t *Front, *Back; - uint16_t *Visible, *DrawDest; - uint16_t *srcline; - uint16_t head, tail; - uint32_t width = cliprect.width(); - - if (GetVidReg(space, 0x8e) & 1) - { - Front = (uint16_t*) (m_frameram + B1 / 4); - Back = (uint16_t*) (m_frameram + B0 / 4); - } - else - { - Front = (uint16_t*) (m_frameram + B0 / 4); - Back = (uint16_t*) (m_frameram + B1 / 4); - } - - Visible = (uint16_t*) Front; - // ERROR: This cast is NOT endian-safe without the use of BYTE/WORD/DWORD_XOR_* macros! - DrawDest = reinterpret_cast<uint16_t *>(m_frameram.target()); - - - if (GetVidReg(space, 0x8c) & 0x80) - DrawDest = Front; - else - DrawDest = Back; - -// DrawDest = Visible; - - srcline = (uint16_t *) DrawDest; - - DoFlip = 0; - head = GetVidReg(space, 0x82); - tail = GetVidReg(space, 0x80); - while ((head & 0x7ff) != (tail & 0x7ff)) - { - // ERROR: This cast is NOT endian-safe without the use of BYTE/WORD/DWORD_XOR_* macros! - DoFlip = m_vr0vid->vrender0_ProcessPacket(0x03800000 + head * 64, DrawDest, reinterpret_cast<uint8_t*>(m_textureram.target())); - head++; - head &= 0x7ff; - if (DoFlip) - break; - } - - if (DoFlip) - SetVidReg(space, 0x8e, GetVidReg(space, 0x8e) ^ 1); - - srcline = (uint16_t *) Visible; - uint32_t const dx = cliprect.left(); - for (int y = cliprect.top(); y <= cliprect.bottom(); y++) - std::copy_n(&srcline[(y * 1024) + dx], width, &bitmap.pix16(y, dx)); - - return 0; } -WRITE_LINE_MEMBER(crystal_state::screen_vblank) +INPUT_CHANGED_MEMBER(crystal_state::coin_inserted) { - // rising edge - if (state) + if (oldval) { - address_space &space = m_maincpu->space(AS_PROGRAM); - uint16_t head, tail; - int DoFlip = 0; - - head = GetVidReg(space, 0x82); - tail = GetVidReg(space, 0x80); - while ((head & 0x7ff) != (tail & 0x7ff)) - { - uint16_t Packet0 = space.read_word(0x03800000 + head * 64); - if (Packet0 & 0x81) - DoFlip = 1; - head++; - head &= 0x7ff; - if (DoFlip) - break; - } - SetVidReg(space, 0x82, head); - if (DoFlip) - { - if (m_FlipCount) - m_FlipCount--; - - } - IntReq(24); //VRender0 VBlank + uint8_t coin_chute = (uint8_t)(uintptr_t)param & 1; + m_vr0soc->IntReq(coin_chute ? 19 : 12); } } -static INPUT_PORTS_START(crystal) +static INPUT_PORTS_START( crystal ) PORT_START("P1_P2") PORT_BIT( 0x00000001, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1) PORT_BIT( 0x00000002, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2) @@ -1195,8 +515,8 @@ static INPUT_PORTS_START(crystal) PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START2 ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START3 ) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START4 ) - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN1 ) - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN2 ) + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_CHANGED_MEMBER(DEVICE_SELF, crystal_state, coin_inserted, 0) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_CHANGED_MEMBER(DEVICE_SELF, crystal_state, coin_inserted, 1) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_SERVICE_NO_TOGGLE( 0x80, IP_ACTIVE_LOW ) @@ -1227,319 +547,60 @@ static INPUT_PORTS_START(crystal) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) INPUT_PORTS_END +static INPUT_PORTS_START( topbladv ) + PORT_INCLUDE( crystal ) + PORT_MODIFY("P1_P2") + PORT_BIT( 0x000000f0, IP_ACTIVE_LOW, IPT_UNUSED ) -static INPUT_PORTS_START(officeye) - PORT_START("P1_P2") - PORT_BIT( 0x00000001, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2) PORT_NAME("P2 Red") // RED + PORT_MODIFY("P3_P4") + PORT_BIT( 0xffffffff, IP_ACTIVE_LOW, IPT_UNUSED ) + + // TODO: coin 2 insertion is fuzzy, may be BTANB + PORT_MODIFY("SYSTEM") + PORT_BIT( 0x0c, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(1) PORT_CHANGED_MEMBER(DEVICE_SELF, crystal_state, coin_inserted, 0) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(1) PORT_CHANGED_MEMBER(DEVICE_SELF, crystal_state, coin_inserted, 1) + PORT_SERVICE_NO_TOGGLE( 0x40, IP_ACTIVE_LOW ) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SERVICE1 ) +INPUT_PORTS_END + + +static INPUT_PORTS_START( urachamu ) + PORT_INCLUDE( crystal ) + + // TODO: player 2 start doesn't work ingame, it only skip attract mode items, + // or be valid in test mode when prompted to press start + // lamps test also gives only p1 and p3, and after crediting up only p1 and p3 starts are lighted on ($01320000 address writes) + // I guess game is currently in 2 players mode, is there anything that enables 3 players mode? + // notice that this is valid for both urachamu and officeye + PORT_MODIFY("P1_P2") + PORT_BIT( 0x00000001, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2) PORT_NAME("P2 Red") PORT_BIT( 0x00000002, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x00000004, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2) PORT_NAME("P2 Green") // GREEN + PORT_BIT( 0x00000004, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2) PORT_NAME("P2 Green") PORT_BIT( 0x00000008, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x00000010, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2) PORT_NAME("P2 Blue") // BLUE + PORT_BIT( 0x00000010, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2) PORT_NAME("P2 Blue") PORT_BIT( 0x00000020, IP_ACTIVE_LOW, IPT_UNKNOWN ) - //PORT_BIT( 0x00000040, IP_ACTIVE_LOW, IPT_START2 ) // where is start2? - PORT_BIT( 0x00000040, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x00000040, IP_ACTIVE_LOW, IPT_START2 ) PORT_BIT( 0x00000080, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x0000ff00, IP_ACTIVE_LOW, IPT_UNKNOWN ) - - PORT_BIT( 0x00010000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1) PORT_NAME("P1 Red") // RED + PORT_BIT( 0x00010000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1) PORT_NAME("P1 Red") PORT_BIT( 0x00020000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(3) PORT_NAME("P3 Red") - PORT_BIT( 0x00040000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1) PORT_NAME("P1 Green") // GREEN + PORT_BIT( 0x00040000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1) PORT_NAME("P1 Green") PORT_BIT( 0x00080000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(3) PORT_NAME("P3 Green") - PORT_BIT( 0x00100000, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1) PORT_NAME("P1 Blue") // BLUE + PORT_BIT( 0x00100000, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1) PORT_NAME("P1 Blue") PORT_BIT( 0x00200000, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(3) PORT_NAME("P3 Blue") PORT_BIT( 0x00400000, IP_ACTIVE_LOW, IPT_START1 ) PORT_BIT( 0x00800000, IP_ACTIVE_LOW, IPT_START3 ) PORT_BIT( 0xff000000, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_START("P3_P4") - PORT_BIT( 0x000000ff, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x0000ff00, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x00ff0000, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0xff000000, IP_ACTIVE_LOW, IPT_UNKNOWN ) - - PORT_START("SYSTEM") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN1 ) - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN2 ) - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE1 ) - PORT_SERVICE_NO_TOGGLE( 0x80, IP_ACTIVE_LOW ) + PORT_MODIFY("P3_P4") + PORT_BIT( 0xffffffff, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_START("DSW") - PORT_DIPNAME( 0x01, 0x01, DEF_STR( Pause ) ) - PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x02, 0x02, DEF_STR( Free_Play ) ) - PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x80, 0x80, DEF_STR( Test ) ) - PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_MODIFY("SYSTEM") + PORT_BIT( 0x0000000f, IP_ACTIVE_LOW, IPT_UNKNOWN ) INPUT_PORTS_END - -static INPUT_PORTS_START(trivrus) - PORT_START("IN1") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Up") PORT_CODE(KEYCODE_UP) - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Left/True") PORT_CODE(KEYCODE_LEFT) - PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Down") PORT_CODE(KEYCODE_DOWN) - - PORT_START("IN2") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Enter/Exit") - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Next") - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Right/False") PORT_CODE(KEYCODE_RIGHT) - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(1) - PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) - - PORT_START("IN3") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME("Sound") - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) - - PORT_START("IN4") - PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_OTHER )PORT_CODE(KEYCODE_9) - - PORT_START("IN5") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE1 ) // Free Game - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_SERVICE_NO_TOGGLE( 0x08, IP_ACTIVE_LOW ) // Setup - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) - - PORT_START("DSW") - PORT_DIPNAME( 0x01, 0x01, "Interlace?" ) - PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x02, 0x02, "Serial?" ) - PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) // hangs at boot - PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x80, 0x80, "Touch Screen" ) - PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) -INPUT_PORTS_END - -static INPUT_PORTS_START(crospuzl) - PORT_START("IN0") - PORT_DIPNAME( 0x01, 0x01, "DSW1" ) - PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_BIT( 0xffffff00, IP_ACTIVE_LOW, IPT_UNKNOWN ) - - PORT_START("IN1") - PORT_DIPNAME( 0x01, 0x01, "IN1" ) - PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_BIT( 0xffffff00, IP_ACTIVE_LOW, IPT_UNKNOWN ) - - PORT_START("IN2") - PORT_DIPNAME( 0x01, 0x01, "IN2" ) - PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_BIT( 0xffffff00, IP_ACTIVE_LOW, IPT_UNKNOWN ) - - PORT_START("IN3") - PORT_DIPNAME( 0x01, 0x01, "IN3" ) - PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("PCB-SW1") - PORT_BIT( 0xffffff00, IP_ACTIVE_LOW, IPT_UNKNOWN ) -INPUT_PORTS_END - -static INPUT_PORTS_START(crzyddz2) - PORT_START("P1_P2") // 1500002 & 1500000 - PORT_BIT( 0x00000001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) // up - PORT_BIT( 0x00000002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) // down (next secret code) - PORT_BIT( 0x00000004, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) // left (inc secret code) - PORT_BIT( 0x00000008, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) // right (dec secret code) - PORT_BIT( 0x00000010, IP_ACTIVE_LOW, IPT_BUTTON1 ) // A - PORT_BIT( 0x00000020, IP_ACTIVE_LOW, IPT_BUTTON2 ) // B - PORT_BIT( 0x00000040, IP_ACTIVE_LOW, IPT_BUTTON3 ) // C (bet) - PORT_BIT( 0x00000080, IP_ACTIVE_LOW, IPT_BUTTON4 ) // D - PORT_BIT( 0x0000ff00, IP_ACTIVE_LOW, IPT_UNKNOWN ) - - PORT_BIT( 0x00010000, IP_ACTIVE_LOW, IPT_START1 ) // start (secret code screen) - PORT_BIT( 0x00020000, IP_ACTIVE_LOW, IPT_SERVICE2 ) // .. 2 (next secret code / stats) - PORT_BIT( 0x00040000, IP_ACTIVE_LOW, IPT_SERVICE ) // .. 1 (secret code screen / service mode) - PORT_BIT( 0x00080000, IP_ACTIVE_LOW, IPT_SERVICE1 ) // .. 3 (inc secret code / credit) - PORT_BIT( 0x00100000, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x00200000, IP_ACTIVE_LOW, IPT_SERVICE3 ) // .. 4 (exit secret screen / clear credits) - PORT_BIT( 0x00400000, IP_ACTIVE_LOW, IPT_SERVICE4 ) // (reset and clear ram?) - PORT_BIT( 0x00800000, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0xff000000, IP_ACTIVE_LOW, IPT_UNKNOWN ) - - // 1500004 (multiplexed by 1802005) - PORT_START("KEY0") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_A ) - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_E ) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_I ) - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_M ) - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_MAHJONG_KAN ) // kan - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_MAHJONG_FLIP_FLOP ) // start? - - PORT_START("KEY1") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_B ) - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_F ) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_J ) - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_N ) - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_MAHJONG_REACH ) // ? - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_MAHJONG_BET ) // ? + C - - PORT_START("KEY2") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_C ) - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_G ) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_K ) - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_CHI ) // chi - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_MAHJONG_SCORE ) // ? - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) // nothing - - PORT_START("KEY3") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_D ) - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_H ) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_L ) - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_PON ) // pon - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) // nothing - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) // nothing - - PORT_START("KEY4") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) // nothing - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_RON ) // ron - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_DOUBLE_UP ) // ? - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) // nothing - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_MAHJONG_BIG ) // big - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_MAHJONG_SMALL ) // small + D -INPUT_PORTS_END - - void crystal_state::crystal(machine_config &config) { SE3208(config, m_maincpu, 14318180 * 3); // TODO : different between each PCBs @@ -1549,15 +610,21 @@ void crystal_state::crystal(machine_config &config) NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0); SCREEN(config, m_screen, SCREEN_TYPE_RASTER); - m_screen->set_refresh(HZ_TO_ATTOSECONDS(60)); - m_screen->set_vblank_time(ATTOSECONDS_IN_USEC(0)); - m_screen->set_size(640, 480); - m_screen->set_visarea(0, 639, 0, 479); + // evolution soccer defaults + m_screen->set_raw((XTAL(14'318'180)*2)/4, 455, 0, 320, 262, 0, 240); m_screen->set_screen_update(FUNC(crystal_state::screen_update)); m_screen->screen_vblank().set(FUNC(crystal_state::screen_vblank)); m_screen->set_palette("palette"); + VRENDER0_SOC(config, m_vr0soc, 0); + m_vr0soc->set_host_cpu_tag(m_maincpu); + m_vr0soc->set_host_screen_tag(m_screen); + VIDEO_VRENDER0(config, m_vr0vid, 14318180, m_maincpu); + #ifdef IDLE_LOOP_SPEEDUP + m_vr0soc->idleskip_cb().set(FUNC(crystal_state::idle_skip_resume_w)); + m_vr0vid->idleskip_cb().set(FUNC(crystal_state::idle_skip_speedup_w)); + #endif PALETTE(config, "palette", palette_device::RGB_565); @@ -1572,24 +639,6 @@ void crystal_state::crystal(machine_config &config) } -void crystal_state::trivrus(machine_config &config) -{ - crystal(config); - m_maincpu->set_addrmap(AS_PROGRAM, &crystal_state::trivrus_mem); -} - -void crystal_state::crospuzl(machine_config &config) -{ - crystal(config); - m_maincpu->set_addrmap(AS_PROGRAM, &crystal_state::crospuzl_mem); -} - -void crystal_state::crzyddz2(machine_config &config) -{ - crystal(config); - m_maincpu->set_addrmap(AS_PROGRAM, &crystal_state::crzyddz2_mem); -} - #define CRYSBIOS \ ROM_REGION( 0x20000, "maincpu", 0 ) \ ROM_SYSTEM_BIOS( 0, "amg0110b", "AMG0110B PCB" ) \ @@ -1654,161 +703,53 @@ ROM_START( donghaer ) ROM_LOAD( "u2", 0x1000000, 0x1000000, CRC(6d82f1a5) SHA1(036bd45f0daac1ffeaa5ad9774fc1b56e3c75ff9) ) ROM_END -ROM_START( trivrus ) - ROM_REGION( 0x80000, "maincpu", 0 ) - ROM_LOAD( "u4", 0x00000, 0x80000, CRC(2d2e9a11) SHA1(73e7b19a032eae21312ca80f8c42cc16725496a7) ) - - ROM_REGION32_LE( 0x2000000, "flash", ROMREGION_ERASEFF ) // Flash - ROM_LOAD( "u3", 0x000000, 0x1000010, CRC(ba901707) SHA1(e281ba07024cd19ef1ab72d2197014f7b1f4d30f) ) +#ifdef ROGUE_CARTS +ROM_START( wulybuly ) + CRYSBIOS + + ROM_REGION( 0x4280, "pic", ROMREGION_ERASEFF ) // empty socket + + ROM_REGION32_LE( 0x1000000, "flash", 0 ) // Flash + ROM_LOAD( "u1", 0x0000000, 0x1000000, CRC(7406f5db) SHA1(dd53afb08d0567241d08d2422c672d429ef9b78f) ) ROM_END -ROM_START( crospuzl ) /* This PCB uses ADC 'Amazon-LF' SoC, EISC CPU core - However PCBs have been see with a standard VRenderZERO+ MagicEyes EISC chip */ - ROM_REGION( 0x80010, "maincpu", 0 ) - ROM_LOAD("en29lv040a.u5", 0x000000, 0x80010, CRC(d50e8500) SHA1(d681cd18cd0e48854c24291d417d2d6d28fe35c1) ) - - ROM_REGION32_LE( 0x8400010, "flash", ROMREGION_ERASEFF ) // NAND Flash - // mostly empty, but still looks good - ROM_LOAD("k9f1g08u0a.riser", 0x000000, 0x8400010, CRC(7f3c88c3) SHA1(db3169a7b4caab754e9d911998a2ece13c65ce5b) ) +ROM_START( urachamu ) + CRYSBIOS + + ROM_REGION( 0x4280, "pic", ROMREGION_ERASEFF ) // empty socket + + ROM_REGION32_LE( 0x4000000, "flash", 0 ) // Flash + ROM_LOAD( "u1", 0x0000000, 0x1000000, CRC(f341d6fc) SHA1(23ecd9f3e5e20fc2a293cc735c8c4d60d01b68c0) ) + ROM_LOAD( "u2", 0x1000000, 0x1000000, CRC(ad81d61f) SHA1(5872c1d96e25d1b2a1b8a35c8ff163d67cfdabe4) ) + ROM_LOAD( "u3", 0x2000000, 0x1000000, CRC(3c7e32a4) SHA1(8a26e745eccc00a2c622062c8ad027781dfc1969) ) + ROM_LOAD( "u4", 0x3000000, 0x1000000, CRC(c5505627) SHA1(5229f435b4cf218d50ae4a4ae65a6ae13d7b7080) ) + + // without this game defaults in free play mode, with no demo sound and 0 lives count. + ROM_REGION( 0x10000, "nvram", 0 ) + ROM_LOAD( "nvram", 0x00000, 0x10000, CRC(66df826d) SHA1(09260b76cb17082c841e7e37b89cb076e54ffb8d) ) ROM_END -ROM_START( psattack ) - ROM_REGION( 0x200000, "maincpu", 0 ) - ROM_LOAD("5.sys", 0x000000, 0x200000, CRC(f09878e4) SHA1(25b8dbac47d3911615c8874746e420ece13e7181) ) - - ROM_REGION( 0x4010, "pic16c711", 0 ) - ROM_LOAD("16c711.pic", 0x0000, 0x137b, CRC(617d8292) SHA1(d32d6054ce9db2e31efaf41015afcc78ed32f6aa) ) // raw dump - ROM_LOAD("16c711.bin", 0x0000, 0x4010, CRC(b316693f) SHA1(eba1f75043bd415268eedfdb95c475e73c14ff86) ) // converted to binary - - DISK_REGION( "cfcard" ) - DISK_IMAGE_READONLY( "psattack", 0, SHA1(e99cd0dafc33ec13bf56061f81dc7c0a181594ee) ) -ROM_END +ROM_START( maldaiza ) + CRYSBIOS + + ROM_REGION( 0x4280, "pic", ROMREGION_ERASEFF ) + ROM_LOAD("maldaliza_pic16f84a.bin", 0x000000, 0x4280, NO_DUMP ) -ROM_START( ddz ) - ROM_REGION( 0xc00000, "maincpu", 0 ) - ROM_LOAD("ddz.001.rom", 0x000000, 0x400000, CRC(b379f823) SHA1(531885b35d668d22c75a9759994f4aca6eacb046) ) - ROM_LOAD("ddz.002.rom", 0x400000, 0x400000, CRC(285c744d) SHA1(2f8bc70825e55e3114015cb263e786df35cde275) ) - ROM_LOAD("ddz.003.rom", 0x800000, 0x400000, CRC(61c9b5c9) SHA1(0438417398403456a1c49408881797a94aa86f49) ) + ROM_REGION32_LE( 0x4000000, "flash", 0 ) // Flash + ROM_LOAD( "u1", 0x0000000, 0x1000000, CRC(f484d12b) SHA1(29641cda9138b5bf02c2ece34f8289385fd2ba29) ) + ROM_LOAD( "u2", 0x1000000, 0x1000000, CRC(86175ebf) SHA1(c1800f7339dafd3ec6c0302eebc8406582a46b04) ) // $ff filled ROM_END +#endif +/* note on PIC protection from ElSemi (for actually emulating it instead of patching) -/* -招级疯斗 - "Zhaoji Fengdou" - "Crazy Class" - -Haze's notes: - -fwiw, it's probably same PCB as the non-working 'ddz' in MAME, but different game. - -there's some kind of encryption/scrambling going on, at the very least - -Code: - - -Offset 0 1 2 3 4 5 6 7 8 9 A B C D E F - -0007BE60 00 00 00 99 03 AD AF 00 00 00 82 00 03 AD 64 63 ™ ¯ ‚ dc -0007BE70 62 61 39 38 37 36 35 34 33 32 31 30 00 4E 61 4E ba9876543210 NaN -0007BE80 00 66 6E 49 02 0E 85 06 02 0E 84 04 02 0E 83 EA fnI … „ ƒê -0007BE90 02 0E 83 D6 02 0E 83 C8 02 0E 84 58 02 0E 84 12 ƒÖ ƒÈ „X „ -0007BEA0 66 65 28 00 30 00 65 73 61 62 20 64 61 62 20 3A fe( 0 esab dab : -0007BEB0 66 74 6E 69 72 70 66 76 20 6E 69 20 67 75 62 00 ftnirpfv ni gub -0007BEC0 46 45 44 43 42 41 39 38 37 36 35 34 33 32 31 30 FEDCBA9876543210 -0007BED0 00 29 6C 6C 75 6E 2E 00 00 00 8F 8E 02 0E 89 DC )llun. Ž ‰Ü - - -if you reverse the letters you get 'bug in vfprintf : bad base' +The PIC uses a software UART bit banged on a single output pin of the main CPU: +the data port is bit 0x20000000 on the PIO register, the same register where the EEPROM control lines are. The serial data is transmitted at 8 data bits, even parity, 1 stop bit. It's probably +tricky to get it working properly because it doesn't rely on a clock signal, and so, the pic and main cpu must run in parallel, and the bit lengths must match. The pic bit delay routine is just a loop. +also it seems that bit 0x40000000 is the PIC reset. -so I suspect the data is in reverse order and maybe some blocks scrambled about. */ - -ROM_START( crzclass ) // PCB marked MAH-JONG - ROM_REGION( 0xc00000, "maincpu", 0 ) - ROM_LOAD("tjf-mahjong-rom1.bin", 0x000000, 0x400000, CRC(0a8af816) SHA1(9f292e847873078ed2b7584f463633cf9086c7e8) ) // SHARP LH28F320BJD-TTL80 - ROM_LOAD("tjf-mahjong-rom2.bin", 0x400000, 0x400000, CRC(2a04e84a) SHA1(189b16fd4314fd2a5f8a1214618b5db83f8ac59a) ) // SHARP LH28F320BJD-TTL80 - ROM_LOAD("tjf-mahjong-rom3.bin", 0x800000, 0x400000, CRC(1cacf3f9) SHA1(e6c88c98aeb7df4098f8e20f412018617005724d) ) // SHARP LH28F320BJD-TTL80 - // rom4 not populated -ROM_END - -/*************************************************************************** - -Crazy Dou Di Zhu II -Sealy, 2006 - -PCB Layout ----------- - -070405-fd-VER1.2 -|--------------------------------------| -| PAL 27C322.U36 | -| BATTERY| -| M59PW1282 62256 14.31818MHz | -| W9864G66 | -| | -|J VRENDERZERO+ | -|A W9864G66 | -|M W9864G66 | -|M 8MHz | -|A HY04 0260F8A | -| 28.63636MHz | -| | -| VR1 TLDA1311 | -| TDA1519| -| 18WAY VOL 10WAY | -|--------------------------------------| -Notes: - 0260F8A - unknown TQFP44 - HY04 - rebadged DIP8 PIC - type unknown * - W9864G66 - Winbond 64MBit DRAM - M59PW1282 - ST Microelectronics 128MBit SOP44 FlashROM. - This is two 64MB SOP44 ROMs in one package - -* The pins are: - 1 ground - 2 nothing - 3 data (only active for 1/4 second when the playing cards or "PASS" shows in game next to each player) - 4 nothing - 5 nothing - 6 clock - 7 +5V (could be VPP for programming voltage) - 8 +5V - -***************************************************************************/ - -ROM_START( crzyddz2 ) - ROM_REGION32_LE( 0x1000000, "flash", 0 ) // Flash - ROM_LOAD( "rom.u48", 0x000000, 0x1000000, CRC(0f3a1987) SHA1(6cad943846c79db31226676c7391f32216cfff79) ) - - ROM_REGION( 0x1000000, "maincpu", ROMREGION_ERASEFF ) - ROM_COPY( "flash", 0x000000, 0x000000, 0x1000000 ) // copy flash here - ROM_LOAD( "27c322.u49", 0x000000, 0x0200000, CRC(b3177f39) SHA1(2a28bf8045bd2e053d88549b79fbc11f30ef9a32) ) // 1ST AND 2ND HALF IDENTICAL - ROM_CONTINUE( 0x000000, 0x0200000 ) - - ROM_REGION( 0x4280, "pic", 0 ) // hy04 - ROM_LOAD("hy04", 0x000000, 0x4280, NO_DUMP ) -ROM_END - -/*************************************************************************** - -Meng Hong Lou (Dream of the Red Chamber) -Sealy, 2004? - -Red PCB, very similar to crzyddz2 - -***************************************************************************/ - -ROM_START( menghong ) - ROM_REGION32_LE( 0x1000000, "flash", 0 ) // Flash - ROM_LOAD( "rom.u48", 0x000000, 0x1000000, CRC(e24257c4) SHA1(569d79a61ff6d35100ba5727069363146df9e0b7) ) - - ROM_REGION( 0x1000000, "maincpu", 0 ) - ROM_COPY( "flash", 0x000000, 0x000000, 0x1000000 ) // copy flash here - ROM_LOAD( "060511_08-01-18.u49", 0x000000, 0x0200000, CRC(b0c12107) SHA1(b1753757bbdb7d996df563ac6abdc6b46676704b) ) // 27C160 - - ROM_REGION( 0x4280, "pic", 0 ) // hy04 - ROM_LOAD("menghong_hy04", 0x000000, 0x4280, NO_DUMP ) -ROM_END - - void crystal_state::init_crysking() { uint16_t *Rom = (uint16_t*) memregion("flash")->base(); @@ -1846,15 +787,6 @@ void crystal_state::init_evosocc() Rom[WORD_XOR_LE(0x974ED2/2)] = 0x9001; //PUSH R0 } -/* note on PIC protection from ElSemi (for actually emulating it instead of patching) - -The PIC uses a software UART bit banged on a single output pin of the main CPU: -the data port is bit 0x20000000 on the PIO register, the same register where the EEPROM control lines are. The serial data is transmitted at 8 data bits, even parity, 1 stop bit. It's probably -tricky to get it working properly because it doesn't rely on a clock signal, and so, the pic and main cpu must run in parallel, and the bit lengths must match. The pic bit delay routine is just a loop. -also it seems that bit 0x40000000 is the PIC reset. - -*/ - void crystal_state::init_topbladv() { // patches based on analysis of PIC dump @@ -1926,23 +858,22 @@ void crystal_state::init_donghaer() Rom[WORD_XOR_LE(0x19C72 / 2)] = 0x9001; // PUSH %R0 } -void crystal_state::init_psattack() +#ifdef ROGUE_CARTS +void crystal_state::init_maldaiza() { + //uint16_t *Rom = (uint16_t*)memregion("flash")->base(); + // ... } +#endif - -GAME( 2001, crysbios, 0, crystal, crystal, crystal_state, empty_init, ROT0, "BrezzaSoft", "Crystal System BIOS", MACHINE_IS_BIOS_ROOT ) -GAME( 2001, crysking, crysbios, crystal, crystal, crystal_state, init_crysking, ROT0, "BrezzaSoft", "The Crystal of Kings", 0 ) -GAME( 2001, evosocc, crysbios, crystal, crystal, crystal_state, init_evosocc, ROT0, "Evoga", "Evolution Soccer", 0 ) -GAME( 2003, topbladv, crysbios, crystal, crystal, crystal_state, init_topbladv, ROT0, "SonoKong / Expotato", "Top Blade V", 0 ) -GAME( 2001, officeye, 0, crystal, officeye, crystal_state, init_officeye, ROT0, "Danbi", "Office Yeo In Cheon Ha (version 1.2)", MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION ) // still has some instability issues -GAME( 2001, donghaer, crysbios, crystal, crystal, crystal_state, init_donghaer, ROT0, "Danbi", "Donggul Donggul Haerong", MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION ) -GAME( 2004?,menghong, 0, crzyddz2, crzyddz2, crystal_state, empty_init, ROT0, "Sealy", "Meng Hong Lou", MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION ) -GAME( 2006, crzyddz2, 0, crzyddz2, crzyddz2, crystal_state, empty_init, ROT0, "Sealy", "Crazy Dou Di Zhu II", MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION ) -GAME( 2009, trivrus, 0, trivrus, trivrus, crystal_state, empty_init, ROT0, "AGT", "Trivia R Us (v1.07)", 0 ) -GAME( 200?, crospuzl, 0, crospuzl, crospuzl, crystal_state, empty_init, ROT0, "<unknown>", "Cross Puzzle", MACHINE_NOT_WORKING ) - -GAME( 2004, psattack, 0, crystal, crystal, crystal_state, init_psattack, ROT0, "Uniana", "P's Attack", MACHINE_IS_SKELETON ) // has a CF card instead of flash roms -// looks like the same kind of hw from strings in the ROM, but scrambled / encrypted? -GAME( 200?, ddz, 0, crystal, crystal, crystal_state, empty_init, ROT0, "IGS?", "Dou Di Zhu", MACHINE_IS_SKELETON ) -GAME( 200?, crzclass, 0, crystal, crystal, crystal_state, empty_init, ROT0, "TJF", "Zhaoji Fengdou", MACHINE_IS_SKELETON ) // 'Crazy Class' +GAME( 2001, crysbios, 0, crystal, crystal, crystal_state, empty_init, ROT0, "BrezzaSoft", "Crystal System BIOS", MACHINE_IS_BIOS_ROOT ) +GAME( 2001, crysking, crysbios, crystal, crystal, crystal_state, init_crysking, ROT0, "BrezzaSoft", "The Crystal of Kings", 0 ) +GAME( 2001, evosocc, crysbios, crystal, crystal, crystal_state, init_evosocc, ROT0, "Evoga", "Evolution Soccer", 0 ) +GAME( 2001, officeye, 0, crystal, urachamu, crystal_state, init_officeye, ROT0, "Danbi", "Office Yeo In Cheon Ha (version 1.2)", MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION ) // still has some instability issues +GAME( 2001, donghaer, crysbios, crystal, crystal, crystal_state, init_donghaer, ROT0, "Danbi", "Donggul Donggul Haerong", MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION ) // 2 players mode has GFX issues +GAME( 2003, topbladv, crysbios, crystal, topbladv, crystal_state, init_topbladv, ROT0, "SonoKong / Expotato", "Top Blade V", 0 ) +#ifdef ROGUE_CARTS +GAME( 2002, urachamu, crysbios, crystal, urachamu, crystal_state, empty_init, ROT0, "GamToU", "Urachacha Mudaeri (Korea)", MACHINE_NOT_WORKING ) // lamps, not extensively tested +GAME( 200?, wulybuly, crysbios, crystal, crystal, crystal_state, empty_init, ROT0, "<unknown>", "Wully Bully", MACHINE_NOT_WORKING ) // no actual graphics except offset text, confirmed to have no PIC protection so failing elsewhere +GAME( 200?, maldaiza, crysbios, crystal, crystal, crystal_state, init_maldaiza, ROT0, "<unknown>", "Maldaliza", MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION ) // PIC hookup +#endif |