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Diffstat (limited to 'src/mame/drivers/bml3.cpp')
-rw-r--r--src/mame/drivers/bml3.cpp263
1 files changed, 101 insertions, 162 deletions
diff --git a/src/mame/drivers/bml3.cpp b/src/mame/drivers/bml3.cpp
index dc0fa067537..12e600ee196 100644
--- a/src/mame/drivers/bml3.cpp
+++ b/src/mame/drivers/bml3.cpp
@@ -10,6 +10,8 @@
- implement sound as a bml3bus slot device
- account for hardware differences between MB-6890, MB-6891 and MB-6892
(e.g. custom font support on the MB-6892)
+ - both floppy disk controllers exhibit instability and can cause random
+ problems.
**************************************************************************************/
@@ -76,7 +78,6 @@ public:
bml3_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag)
, m_maincpu(*this, "maincpu")
- , m_p_videoram(*this, "vram")
, m_p_chargen(*this, "chargen")
, m_bml3bus(*this, "bml3bus")
, m_crtc(*this, "crtc")
@@ -85,18 +86,22 @@ public:
, m_ym2203(*this, "ym2203")
, m_acia(*this, "acia")
, m_palette(*this, "palette")
- {
- }
+ , m_banka(*this, "banka")
+ , m_bankc(*this, "bankc")
+ , m_banke(*this, "banke")
+ , m_bankf(*this, "bankf")
+ , m_bankg(*this, "bankg")
+ { }
void bml3mk2(machine_config &config);
void bml3mk5(machine_config &config);
void bml3(machine_config &config);
void bml3_common(machine_config &config);
+
+private:
void bml3_mem(address_map &map);
void bml3mk2_mem(address_map &map);
void bml3mk5_mem(address_map &map);
-
-private:
uint8_t mc6845_r(offs_t offset);
void mc6845_w(offs_t offset, u8 data);
uint8_t keyboard_r();
@@ -119,12 +124,6 @@ private:
DECLARE_WRITE_LINE_MEMBER(acia_rts_w);
DECLARE_WRITE_LINE_MEMBER(acia_irq_w);
- uint8_t a000_r(offs_t offset); void a000_w(offs_t offset, u8 data);
- uint8_t c000_r(offs_t offset); void c000_w(offs_t offset, u8 data);
- uint8_t e000_r(offs_t offset); void e000_w(offs_t offset, u8 data);
- uint8_t f000_r(offs_t offset); void f000_w(offs_t offset, u8 data);
- uint8_t fff0_r(offs_t offset); void fff0_w(offs_t offset, u8 data);
-
MC6845_UPDATE_ROW(crtc_update_row);
// INTERRUPT_GEN_MEMBER(irq);
@@ -156,10 +155,11 @@ private:
void m6845_change_clock(u8 setting);
u8 m_crtc_index;
std::unique_ptr<u8[]> m_extram;
+ std::unique_ptr<u8[]> m_vram;
+ std::unique_ptr<u8[]> m_aram;
u8 m_firq_mask;
u8 m_firq_status;
required_device<cpu_device> m_maincpu;
- required_region_ptr<u8> m_p_videoram;
required_region_ptr<u8> m_p_chargen;
required_device<bml3bus_device> m_bml3bus;
required_device<mc6845_device> m_crtc;
@@ -168,6 +168,11 @@ private:
optional_device<ym2203_device> m_ym2203;
required_device<acia6850_device> m_acia;
required_device<palette_device> m_palette;
+ required_memory_bank m_banka;
+ required_memory_bank m_bankc;
+ required_memory_bank m_banke;
+ required_memory_bank m_bankf;
+ required_memory_bank m_bankg;
};
u8 bml3_state::mc6845_r(offs_t offset)
@@ -256,18 +261,16 @@ u8 bml3_state::vram_r(offs_t offset)
{
// Bit 7 masks reading back to the latch
if (!BIT(m_attr_latch, 7))
- {
- m_attr_latch = m_p_videoram[offset+0x4000];
- }
+ m_attr_latch = m_aram[offset];
- return m_p_videoram[offset];
+ return m_vram[offset];
}
void bml3_state::vram_w(offs_t offset, u8 data)
{
- m_p_videoram[offset] = data;
+ m_vram[offset] = data;
// color ram is 5-bit
- m_p_videoram[offset+0x4000] = m_attr_latch & 0x1F;
+ m_aram[offset] = m_attr_latch & 0x1F;
}
u8 bml3_state::psg_latch_r()
@@ -331,17 +334,6 @@ void bml3_state::relay_w(u8 data)
BIT(data,7) ? CASSETTE_MOTOR_ENABLED : CASSETTE_MOTOR_DISABLED, CASSETTE_MASK_MOTOR);
}
-u8 bml3_state::a000_r(offs_t offset) { return m_extram[offset + 0xa000]; }
-void bml3_state::a000_w(offs_t offset, u8 data) { m_extram[offset + 0xa000] = data; }
-u8 bml3_state::c000_r(offs_t offset) { return m_extram[offset + 0xc000]; }
-void bml3_state::c000_w(offs_t offset, u8 data) { m_extram[offset + 0xc000] = data; }
-u8 bml3_state::e000_r(offs_t offset) { return m_extram[offset + 0xe000]; }
-void bml3_state::e000_w(offs_t offset, u8 data) { m_extram[offset + 0xe000] = data; }
-u8 bml3_state::f000_r(offs_t offset) { return m_extram[offset + 0xf000]; }
-void bml3_state::f000_w(offs_t offset, u8 data) { m_extram[offset + 0xf000] = data; }
-u8 bml3_state::fff0_r(offs_t offset) { return m_extram[offset + 0xfff0]; }
-void bml3_state::fff0_w(offs_t offset, u8 data) { m_extram[offset + 0xfff0] = data; }
-
u8 bml3_state::keyb_nmi_r()
{
return 0; // bit 7 used to signal a BREAK key pressure
@@ -406,13 +398,13 @@ void bml3_state::bml3_mem(address_map &map)
// map(0xffe8, 0xffe8) bank register
// map(0xffe9, 0xffe9) IG mode register
// map(0xffea, 0xffea) IG enable register
- map(0xa000, 0xfeff).rom().region("maincpu", 0xa000);
- map(0xfff0, 0xffff).rom().region("maincpu", 0xfff0);
- map(0xa000, 0xbfff).w(FUNC(bml3_state::a000_w));
- map(0xc000, 0xdfff).w(FUNC(bml3_state::c000_w));
- map(0xe000, 0xefff).w(FUNC(bml3_state::e000_w));
- map(0xf000, 0xfeff).w(FUNC(bml3_state::f000_w));
- map(0xfff0, 0xffff).w(FUNC(bml3_state::fff0_w));
+ map(0xa000, 0xfeff).lw8(NAME([this] (offs_t offset, u8 data) { m_extram[offset] = data; }));
+ map(0xfff0, 0xffff).lw8(NAME([this] (offs_t offset, u8 data) { m_extram[offset+0x5ff0] = data; }));
+ map(0xa000, 0xbfff).bankr("banka");
+ map(0xc000, 0xdfff).bankr("bankc");
+ map(0xe000, 0xefff).bankr("banke");
+ map(0xf000, 0xfeff).bankr("bankf");
+ map(0xfff0, 0xffff).bankr("bankg");
#if 0
map(0xff00, 0xff00).rw(FUNC(bml3_state::ym2203_r), FUNC(bml3_state::ym2203_w));
@@ -581,7 +573,7 @@ MC6845_UPDATE_ROW( bml3_state::crtc_update_row )
// 3: reverse/inverse video
// 4: graphic (not character)
- u8 x=0,hf=0,xi=0,interlace=0,bgcolor=0,rawbits=0,dots[2],color=0,pen=0;
+ u8 x=0,hf=0,xi=0,interlace=0,bgcolor=0,rawbits=0,dots[2]={0,0},color=0,pen=0;
bool reverse=0,graphic=0,lowres=0;
u16 mem=0;
@@ -595,9 +587,6 @@ MC6845_UPDATE_ROW( bml3_state::crtc_update_row )
if (y > 0x191) return;
}
- // redundant initializers to keep compiler happy
- dots[0] = dots[1] = 0;
-
for(x=0; x<x_count; x++)
{
if (lowres)
@@ -605,11 +594,11 @@ MC6845_UPDATE_ROW( bml3_state::crtc_update_row )
else
mem = (ma + x + ra * x_count/40 * 0x400 -0x400) & 0x3fff;
- color = m_p_videoram[mem|0x4000] & 7;
- reverse = BIT(m_p_videoram[mem|0x4000], 3) ^ (x == cursor_x);
- graphic = BIT(m_p_videoram[mem|0x4000], 4);
+ color = m_aram[mem] & 7;
+ reverse = BIT(m_aram[mem], 3) ^ (x == cursor_x);
+ graphic = BIT(m_aram[mem], 4);
- rawbits = m_p_videoram[mem];
+ rawbits = m_vram[mem];
if (graphic)
{
@@ -667,7 +656,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(bml3_state::keyboard_callback)
int i,port_i;
bool trigger = false;
- if(!(m_keyb_scancode & 0x80))
+ if(!BIT(m_keyb_scancode, 7))
{
m_keyb_scancode = (m_keyb_scancode + 1) & 0x7F;
if (m_keyb_counter_operation_disabled)
@@ -743,7 +732,58 @@ INTERRUPT_GEN_MEMBER(bml3_state::timer_firq)
void bml3_state::machine_start()
{
- m_extram = std::make_unique<u8[]>(0x10000);
+ m_extram = make_unique_clear<u8[]>(0x6000);
+ m_vram = make_unique_clear<u8[]>(0x4000);
+ m_aram = make_unique_clear<u8[]>(0x4000);
+
+ save_pointer(NAME(m_extram), 0x6000);
+ save_pointer(NAME(m_vram), 0x4000);
+ save_pointer(NAME(m_aram), 0x4000);
+
+ save_item(NAME(m_hres_reg));
+ save_item(NAME(m_crtc_vreg));
+ save_item(NAME(m_psg_latch));
+ save_item(NAME(m_attr_latch));
+ save_item(NAME(m_vres_reg));
+ save_item(NAME(m_keyb_interrupt_disabled));
+ save_item(NAME(m_keyb_nmi_disabled));
+ save_item(NAME(m_keyb_counter_operation_disabled));
+ save_item(NAME(m_keyb_empty_scan));
+ save_item(NAME(m_keyb_scancode));
+ save_item(NAME(m_keyb_capslock_led_on));
+ save_item(NAME(m_keyb_hiragana_led_on));
+ save_item(NAME(m_keyb_katakana_led_on));
+ save_item(NAME(m_cassbit));
+ save_item(NAME(m_cassold));
+ save_item(NAME(m_cass_data));
+ save_item(NAME(m_crtc_index));
+ save_item(NAME(m_firq_mask));
+ save_item(NAME(m_firq_status));
+
+ u8 *r = m_extram.get();
+ u8 *m = memregion("maincpu")->base();
+ m_banka->configure_entry(0, &m[0xa000]);
+ m_banka->configure_entry(1, r);
+ m_bankc->configure_entry(0, &m[0xc000]);
+ m_bankc->configure_entry(1, r+0x2000);
+ m_banke->configure_entry(0, &m[0xe000]);
+ m_banke->configure_entry(1, r+0x4000);
+ m_bankf->configure_entry(0, &m[0xf000]);
+ m_bankf->configure_entry(1, r+0x5000);
+ m_bankg->configure_entry(0, &m[0xfff0]);
+ m_bankg->configure_entry(1, r+0x5ff0);
+}
+
+void bml3_state::machine_reset()
+{
+ /* defaults */
+ m_banka->set_entry(0);
+ m_bankc->set_entry(0);
+ m_banke->set_entry(0);
+ m_bankf->set_entry(0);
+ m_bankg->set_entry(0);
+
+ m_firq_mask = -1; // disable firq
m_psg_latch = 0;
m_attr_latch = 0;
m_vres_reg = 0;
@@ -761,25 +801,8 @@ void bml3_state::machine_start()
m_cassold = 0;
}
-void bml3_state::machine_reset()
-{
- address_space &mem = m_maincpu->space(AS_PROGRAM);
-
- /* defaults */
- mem.install_rom(0xa000, 0xfeff,memregion("maincpu")->base() + 0xa000);
- mem.install_rom(0xfff0, 0xffff,memregion("maincpu")->base() + 0xfff0);
- mem.install_write_handler(0xa000, 0xbfff, write8sm_delegate(*this, FUNC(bml3_state::a000_w)), 0);
- mem.install_write_handler(0xc000, 0xdfff, write8sm_delegate(*this, FUNC(bml3_state::c000_w)), 0);
- mem.install_write_handler(0xe000, 0xefff, write8sm_delegate(*this, FUNC(bml3_state::e000_w)), 0);
- mem.install_write_handler(0xf000, 0xfeff, write8sm_delegate(*this, FUNC(bml3_state::f000_w)), 0);
- mem.install_write_handler(0xfff0, 0xffff, write8sm_delegate(*this, FUNC(bml3_state::fff0_w)), 0);
-
- m_firq_mask = -1; // disable firq
-}
-
void bml3_state::piaA_w(uint8_t data)
{
- address_space &mem = m_maincpu->space(AS_PROGRAM);
/* ROM banking:
-0-- --0- 0xa000 - 0xbfff ROM R RAM W
-1-- --0- 0xa000 - 0xbfff RAM R/W
@@ -795,94 +818,17 @@ void bml3_state::piaA_w(uint8_t data)
*/
logerror("Check banking PIA A -> %02x\n",data);
- if(!(data & 0x2))
- {
- if(data & 0x40)
- {
- mem.install_readwrite_handler(0xa000, 0xbfff,
- read8sm_delegate(*this, FUNC(bml3_state::a000_r)),
- write8sm_delegate(*this, FUNC(bml3_state::a000_w)),
- 0);
- }
- else
- {
- mem.install_rom(0xa000, 0xbfff,
- memregion("maincpu")->base() + 0xa000);
- mem.install_write_handler(0xa000, 0xbfff,
- write8sm_delegate(*this, FUNC(bml3_state::a000_w)),
- 0);
- }
- }
-
- if(!(data & 0x4))
- {
- if(data & 0x40)
- {
- mem.install_readwrite_handler(0xc000, 0xdfff,
- read8sm_delegate(*this, FUNC(bml3_state::c000_r)),
- write8sm_delegate(*this, FUNC(bml3_state::c000_w)),
- 0);
- }
- else
- {
- mem.install_rom(0xc000, 0xdfff,
- memregion("maincpu")->base() + 0xc000);
- mem.install_write_handler(0xc000, 0xdfff,
- write8sm_delegate(*this, FUNC(bml3_state::c000_w)),
- 0);
- }
- }
+ if(!BIT(data, 1))
+ m_banka->set_entry(BIT(data, 6));
- if(!(data & 0x8))
- {
- if(data & 0x80)
- {
- mem.install_readwrite_handler(0xe000, 0xefff,
- read8sm_delegate(*this, FUNC(bml3_state::e000_r)),
- write8sm_delegate(*this, FUNC(bml3_state::e000_w)),
- 0);
- }
- else
- {
- mem.install_rom(0xe000, 0xefff,
- memregion("maincpu")->base() + 0xe000);
- mem.install_write_handler(0xe000, 0xefff,
- write8sm_delegate(*this, FUNC(bml3_state::e000_w)),
- 0);
- }
- }
+ if(!BIT(data, 2))
+ m_bankc->set_entry(BIT(data, 7));
- if(data & 1)
- {
- mem.install_readwrite_handler(0xf000, 0xfeff,
- read8sm_delegate(*this, FUNC(bml3_state::f000_r)),
- write8sm_delegate(*this, FUNC(bml3_state::f000_w)),
- 0);
- }
- else
- {
- mem.install_rom(0xf000, 0xfeff,
- memregion("maincpu")->base() + 0xf000);
- mem.install_write_handler(0xf000, 0xfeff,
- write8sm_delegate(*this, FUNC(bml3_state::f000_w)),
- 0);
- }
+ if(!BIT(data, 3))
+ m_banke->set_entry(BIT(data, 7));
- if(data & 2)
- {
- mem.install_readwrite_handler(0xfff0, 0xffff,
- read8sm_delegate(*this, FUNC(bml3_state::fff0_r)),
- write8sm_delegate(*this, FUNC(bml3_state::fff0_w)),
- 0);
- }
- else
- {
- mem.install_rom(0xfff0, 0xffff,
- memregion("maincpu")->base() + 0xfff0);
- mem.install_write_handler(0xfff0, 0xffff,
- write8sm_delegate(*this, FUNC(bml3_state::fff0_w)),
- 0);
- }
+ m_bankf->set_entry(BIT(data, 0));
+ m_bankg->set_entry(BIT(data, 1));
}
WRITE_LINE_MEMBER( bml3_state::acia_rts_w )
@@ -927,8 +873,6 @@ void bml3_state::bml3_common(machine_config &config)
m_maincpu->set_vblank_int("screen", FUNC(bml3_state::timer_firq));
// m_maincpu->set_periodic_int(FUNC(bml3_state::firq), attotime::fromhz(45));
-// MCFG_MACHINE_RESET_OVERRIDE(bml3_state,bml3)
-
/* video hardware */
screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
screen.set_refresh_hz(60);
@@ -1026,6 +970,7 @@ void bml3_state::bml3mk5(machine_config &config)
/* ROM definition */
+// floppy-drive slot devices expect "maincpu" is sized 0x10000.
ROM_START( bml3 )
ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASEFF )
// ROM_LOAD( "l3bas.rom", 0xa000, 0x6000, BAD_DUMP CRC(d81baa07) SHA1(a8fd6b29d8c505b756dbf5354341c48f9ac1d24d)) //original, 24k isn't a proper rom size!
@@ -1036,9 +981,7 @@ ROM_START( bml3 )
ROM_LOAD( "600 p16681.ic5", 0xe000, 0x2000, BAD_DUMP CRC(fe3988a5) SHA1(edc732f1cd421e0cf45ffcfc71c5589958ceaae7))
ROM_REGION( 0x1000, "chargen", 0 )
- ROM_LOAD("font.rom", 0x00000, 0x1000, BAD_DUMP CRC(0b6f2f10) SHA1(dc411b447ca414e94843636d8b5f910c954581fb) ) // handcrafted
-
- ROM_REGION( 0x8000, "vram", ROMREGION_ERASEFF )
+ ROM_LOAD("font.rom", 0x0000, 0x1000, BAD_DUMP CRC(0b6f2f10) SHA1(dc411b447ca414e94843636d8b5f910c954581fb) ) // handcrafted
ROM_END
ROM_START( bml3mk2 )
@@ -1050,9 +993,7 @@ ROM_START( bml3mk2 )
ROM_LOAD( "600 p16681.ic5", 0xe000, 0x2000, BAD_DUMP CRC(fe3988a5) SHA1(edc732f1cd421e0cf45ffcfc71c5589958ceaae7))
ROM_REGION( 0x1000, "chargen", 0 )
- ROM_LOAD("font.rom", 0x00000, 0x1000, BAD_DUMP CRC(0b6f2f10) SHA1(dc411b447ca414e94843636d8b5f910c954581fb) ) // handcrafted
-
- ROM_REGION( 0x8000, "vram", ROMREGION_ERASEFF )
+ ROM_LOAD("font.rom", 0x0000, 0x1000, BAD_DUMP CRC(0b6f2f10) SHA1(dc411b447ca414e94843636d8b5f910c954581fb) ) // handcrafted
ROM_END
ROM_START( bml3mk5 )
@@ -1065,14 +1006,12 @@ ROM_START( bml3mk5 )
ROM_LOAD( "600 p16681.ic5", 0xe000, 0x2000, BAD_DUMP CRC(fe3988a5) SHA1(edc732f1cd421e0cf45ffcfc71c5589958ceaae7))
ROM_REGION( 0x1000, "chargen", 0 )
- ROM_LOAD("font.rom", 0x00000, 0x1000, BAD_DUMP CRC(0b6f2f10) SHA1(dc411b447ca414e94843636d8b5f910c954581fb) ) // handcrafted
-
- ROM_REGION( 0x8000, "vram", ROMREGION_ERASEFF )
+ ROM_LOAD("font.rom", 0x0000, 0x1000, BAD_DUMP CRC(0b6f2f10) SHA1(dc411b447ca414e94843636d8b5f910c954581fb) ) // handcrafted
ROM_END
/* Driver */
/* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS */
-COMP( 1980, bml3, 0, 0, bml3, bml3, bml3_state, empty_init, "Hitachi", "MB-6890 Basic Master Level 3", MACHINE_NOT_WORKING)
-COMP( 1982, bml3mk2, bml3, 0, bml3mk2, bml3, bml3_state, empty_init, "Hitachi", "MB-6891 Basic Master Level 3 Mark 2", MACHINE_NOT_WORKING)
-COMP( 1983, bml3mk5, bml3, 0, bml3mk5, bml3, bml3_state, empty_init, "Hitachi", "MB-6892 Basic Master Level 3 Mark 5", MACHINE_NOT_WORKING)
+COMP( 1980, bml3, 0, 0, bml3, bml3, bml3_state, empty_init, "Hitachi", "MB-6890 Basic Master Level 3", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE )
+COMP( 1982, bml3mk2, bml3, 0, bml3mk2, bml3, bml3_state, empty_init, "Hitachi", "MB-6891 Basic Master Level 3 Mark 2", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE )
+COMP( 1983, bml3mk5, bml3, 0, bml3mk5, bml3, bml3_state, empty_init, "Hitachi", "MB-6892 Basic Master Level 3 Mark 5", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE )