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Diffstat (limited to 'src/emu/machine/pci.h')
-rw-r--r--src/emu/machine/pci.h59
1 files changed, 56 insertions, 3 deletions
diff --git a/src/emu/machine/pci.h b/src/emu/machine/pci.h
index a10b28d1a8a..3dcfe1163b7 100644
--- a/src/emu/machine/pci.h
+++ b/src/emu/machine/pci.h
@@ -139,10 +139,56 @@ public:
virtual DECLARE_READ8_MEMBER(header_type_r);
+ virtual DECLARE_ADDRESS_MAP(config_map, 32);
+
+ DECLARE_READ32_MEMBER (b_address_base_r);
+ DECLARE_WRITE32_MEMBER(b_address_base_w);
+ DECLARE_READ8_MEMBER (primary_bus_r);
+ DECLARE_WRITE8_MEMBER (primary_bus_w);
+ DECLARE_READ8_MEMBER (secondary_bus_r);
+ DECLARE_WRITE8_MEMBER (secondary_bus_w);
+ DECLARE_READ8_MEMBER (subordinate_bus_r);
+ DECLARE_WRITE8_MEMBER (subordinate_bus_w);
+ DECLARE_READ8_MEMBER (secondary_latency_r);
+ DECLARE_WRITE8_MEMBER (secondary_latency_w);
+ DECLARE_READ8_MEMBER (iobase_r);
+ DECLARE_WRITE8_MEMBER (iobase_w);
+ DECLARE_READ8_MEMBER (iolimit_r);
+ DECLARE_WRITE8_MEMBER (iolimit_w);
+ DECLARE_READ16_MEMBER (secondary_status_r);
+ DECLARE_WRITE16_MEMBER(secondary_status_w);
+ DECLARE_READ16_MEMBER (memory_base_r);
+ DECLARE_WRITE16_MEMBER(memory_base_w);
+ DECLARE_READ16_MEMBER (memory_limit_r);
+ DECLARE_WRITE16_MEMBER(memory_limit_w);
+ DECLARE_READ16_MEMBER (prefetch_base_r);
+ DECLARE_WRITE16_MEMBER(prefetch_base_w);
+ DECLARE_READ16_MEMBER (prefetch_limit_r);
+ DECLARE_WRITE16_MEMBER(prefetch_limit_w);
+ DECLARE_READ32_MEMBER (prefetch_baseu_r);
+ DECLARE_WRITE32_MEMBER(prefetch_baseu_w);
+ DECLARE_READ32_MEMBER (prefetch_limitu_r);
+ DECLARE_WRITE32_MEMBER(prefetch_limitu_w);
+ DECLARE_READ16_MEMBER (iobaseu_r);
+ DECLARE_WRITE16_MEMBER(iobaseu_w);
+ DECLARE_READ16_MEMBER (iolimitu_r);
+ DECLARE_WRITE16_MEMBER(iolimitu_w);
+ DECLARE_READ32_MEMBER (expansion_base_r);
+ DECLARE_WRITE32_MEMBER(expansion_base_w);
+ DECLARE_READ8_MEMBER (interrupt_line_r);
+ DECLARE_WRITE8_MEMBER (interrupt_line_w);
+ DECLARE_READ8_MEMBER (interrupt_pin_r);
+ DECLARE_WRITE8_MEMBER (interrupt_pin_w);
+ DECLARE_READ16_MEMBER (bridge_control_r);
+ DECLARE_WRITE16_MEMBER(bridge_control_w);
+
protected:
pci_device *sub_devices[32*8];
dynamic_array<pci_device *> all_devices;
- dynamic_array<pci_device *> all_bridges;
+ dynamic_array<pci_bridge_device *> all_bridges;
+
+ UINT8 primary_bus, secondary_bus, subordinate_bus;
+ UINT16 bridge_control;
virtual void device_start();
virtual void device_reset();
@@ -151,6 +197,13 @@ protected:
virtual device_t *bus_root();
virtual void regenerate_config_mapping();
+ UINT32 do_config_read(UINT8 bus, UINT8 device, UINT16 reg, UINT32 mem_mask);
+ UINT32 propagate_config_read(UINT8 bus, UINT8 device, UINT16 reg, UINT32 mem_mask);
+ UINT32 config_read(UINT8 bus, UINT8 device, UINT16 reg, UINT32 mem_mask);
+ void do_config_write(UINT8 bus, UINT8 device, UINT16 reg, UINT32 data, UINT32 mem_mask);
+ void propagate_config_write(UINT8 bus, UINT8 device, UINT16 reg, UINT32 data, UINT32 mem_mask);
+ void config_write(UINT8 bus, UINT8 device, UINT16 reg, UINT32 data, UINT32 mem_mask);
+
private:
address_space_config configure_space_config;
};
@@ -188,8 +241,8 @@ protected:
DECLARE_READ32_MEMBER(config_data_r);
DECLARE_WRITE32_MEMBER(config_data_w);
- UINT32 config_read(UINT8 bus, UINT8 device, UINT16 reg, UINT32 mem_mask);
- void config_write(UINT8 bus, UINT8 device, UINT16 reg, UINT32 data, UINT32 mem_mask);
+ UINT32 root_config_read(UINT8 bus, UINT8 device, UINT16 reg, UINT32 mem_mask);
+ void root_config_write(UINT8 bus, UINT8 device, UINT16 reg, UINT32 data, UINT32 mem_mask);
void regenerate_mapping();
};