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Diffstat (limited to 'src/emu/cpu/tms0980/tms0980.c')
-rw-r--r--src/emu/cpu/tms0980/tms0980.c85
1 files changed, 61 insertions, 24 deletions
diff --git a/src/emu/cpu/tms0980/tms0980.c b/src/emu/cpu/tms0980/tms0980.c
index 66049c1d611..5c13d0741f5 100644
--- a/src/emu/cpu/tms0980/tms0980.c
+++ b/src/emu/cpu/tms0980/tms0980.c
@@ -159,7 +159,7 @@ const device_type TMS0970 = &device_creator<tms0970_cpu_device>; // 28-pin DIP,
// - RAM, ROM, and main instructions PLA is exactly the same as TMS0980
// - 64-term microinstructions PLA between the RAM and ROM, supporting 20 microinstructions plus optional separate lines for custom opcode handling
// - 48-term output PLA above the RAM (rotate opla 90 degrees)
-const device_type TMC0270 = &device_creator<tmc0270_cpu_device>; // 40-pin DIP, 16 O pins, 8 R pins (the other R pins are internally hooked up to support more I/O)
+const device_type TMC0270 = &device_creator<tmc0270_cpu_device>; // 40-pin DIP, 16 O pins, 8+ R pins (some R pins are internally hooked up to support more I/O)
// TMC0260 is same? except opla is 32 instead of 48 terms
@@ -250,7 +250,7 @@ tms0980_cpu_device::tms0980_cpu_device(const machine_config &mconfig, device_typ
tmc0270_cpu_device::tmc0270_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : tms0980_cpu_device(mconfig, TMC0270, "TMC0270", tag, owner, clock, 16, 8, 4, 7, 9, 4, 12, ADDRESS_MAP_NAME(program_11bit_9), 8, ADDRESS_MAP_NAME(data_64x9_as4), "tmc0270", __FILE__)
+ : tms0980_cpu_device(mconfig, TMC0270, "TMC0270", tag, owner, clock, 16, 16, 4, 7, 9, 4, 12, ADDRESS_MAP_NAME(program_11bit_9), 8, ADDRESS_MAP_NAME(data_64x9_as4), "tmc0270", __FILE__)
{
}
@@ -396,8 +396,7 @@ void tms1xxx_cpu_device::device_start()
m_cs = 0;
m_r = 0;
m_o = 0;
- m_o_latch = 0;
- m_o_latch_low = 0;
+ m_o_index = 0;
m_cki_bus = 0;
m_c4 = 0;
m_p = 0;
@@ -422,10 +421,6 @@ void tms1xxx_cpu_device::device_start()
m_micro = 0;
m_subcycle = 0;
- m_a_prev = m_a;
- m_r_prev = m_r;
- m_o_latch_prev = m_o_latch;
-
// register for savestates
save_item(NAME(m_pc));
save_item(NAME(m_sr));
@@ -439,8 +434,7 @@ void tms1xxx_cpu_device::device_start()
save_item(NAME(m_cs));
save_item(NAME(m_r));
save_item(NAME(m_o));
- save_item(NAME(m_o_latch));
- save_item(NAME(m_o_latch_low));
+ save_item(NAME(m_o_index));
save_item(NAME(m_cki_bus));
save_item(NAME(m_c4));
save_item(NAME(m_p));
@@ -465,10 +459,6 @@ void tms1xxx_cpu_device::device_start()
save_item(NAME(m_micro));
save_item(NAME(m_subcycle));
- save_item(NAME(m_a_prev));
- save_item(NAME(m_r_prev));
- save_item(NAME(m_o_latch_prev));
-
// register state for debugger
state_add(TMS0980_PC, "PC", m_pc ).formatstr("%02X");
state_add(TMS0980_SR, "SR", m_sr ).formatstr("%01X");
@@ -485,6 +475,28 @@ void tms1xxx_cpu_device::device_start()
m_icountptr = &m_icount;
}
+void tmc0270_cpu_device::device_start()
+{
+ // common init
+ tms1xxx_cpu_device::device_start();
+
+ // zerofill
+ m_a_prev = 0;
+ m_r_prev = 0;
+
+ m_o_latch_low = 0;
+ m_o_latch = 0;
+ m_o_latch_prev = 0;
+
+ // register for savestates
+ save_item(NAME(m_a_prev));
+ save_item(NAME(m_r_prev));
+
+ save_item(NAME(m_o_latch_low));
+ save_item(NAME(m_o_latch));
+ save_item(NAME(m_o_latch_prev));
+}
+
//-------------------------------------------------
@@ -513,8 +525,6 @@ void tms1xxx_cpu_device::device_reset()
// clear outputs
m_r = 0;
m_write_r(0, m_r & m_r_mask, 0xffff);
- m_o_latch_low = 0;
- m_o_latch = 0;
write_o_output(0);
m_write_r(0, m_r & m_r_mask, 0xffff);
m_power_off(0);
@@ -673,6 +683,19 @@ void tms0980_cpu_device::device_reset()
m_micro_direct[op] = decode_micro(op);
}
+void tmc0270_cpu_device::device_reset()
+{
+ // common reset
+ tms0980_cpu_device::device_reset();
+
+ m_a_prev = m_a;
+ m_r_prev = m_r;
+
+ m_o_latch_low = 0;
+ m_o_latch = 0;
+ m_o_latch_prev = 0;
+}
+
//-------------------------------------------------
@@ -731,8 +754,6 @@ void tmc0270_cpu_device::read_opcode()
// RSTR is on the mpla
if (m_micro & M_RSTR)
m_fixed |= F_RSTR;
-
- // TODO: M_UNK1
}
@@ -741,16 +762,20 @@ void tmc0270_cpu_device::read_opcode()
// i/o handling
//-------------------------------------------------
-void tms1xxx_cpu_device::write_o_output(UINT8 data)
+void tms1xxx_cpu_device::write_o_output(UINT8 index)
{
+ m_o_index = index;
+
// a hardcoded table is supported if the output pla is unknown
- m_o = (c_output_pla == NULL) ? m_opla->read(data) : c_output_pla[data];
+ m_o = (c_output_pla == NULL) ? m_opla->read(index) : c_output_pla[index];
m_write_o(0, m_o & m_o_mask, 0xffff);
}
-void tms0970_cpu_device::write_o_output(UINT8 data)
+void tms0970_cpu_device::write_o_output(UINT8 index)
{
- m_o = m_spla->read(data);
+ m_o_index = index;
+
+ m_o = m_spla->read(index);
m_write_o(0, m_o & m_o_mask, 0xffff);
}
@@ -1003,7 +1028,19 @@ void tmc0270_cpu_device::op_tdo()
else
m_o_latch = m_o_latch_low | (m_a << 4 & 0x30);
- // handled further in dynamic_output
+ // write to output is done in dynamic_output
+}
+
+void tmc0270_cpu_device::op_setr()
+{
+ // same as default, but handle write to output in dynamic_output
+ m_r = m_r | (1 << m_y);
+}
+
+void tmc0270_cpu_device::op_rstr()
+{
+ // same as default, but handle write to output in dynamic_output
+ m_r = m_r & ~(1 << m_y);
}
@@ -1070,8 +1107,8 @@ void tms1xxx_cpu_device::execute_run()
}
// execute: k input valid, read ram, clear alu inputs
- set_cki_bus();
dynamic_output();
+ set_cki_bus();
m_ram_in = m_data->read_byte(m_ram_address) & 0xf;
m_dam_in = m_data->read_byte(m_ram_address | (0x10 << (m_x_bits-1))) & 0xf;
m_ram_out = -1;