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Diffstat (limited to 'src/devices/video/tms34061.h')
-rw-r--r--src/devices/video/tms34061.h58
1 files changed, 29 insertions, 29 deletions
diff --git a/src/devices/video/tms34061.h b/src/devices/video/tms34061.h
index c453cc653ed..3b3e3d5f552 100644
--- a/src/devices/video/tms34061.h
+++ b/src/devices/video/tms34061.h
@@ -23,35 +23,35 @@ public:
/* display state structure */
struct tms34061_display
{
- uint8_t blanked; /* true if blanked */
- uint8_t *vram; /* base of VRAM */
- uint8_t *latchram; /* base of latch RAM */
- uint16_t *regs; /* pointer to array of registers */
+ u8 blanked; /* true if blanked */
+ u8 *vram; /* base of VRAM */
+ u8 *latchram; /* base of latch RAM */
+ u16 *regs; /* pointer to array of registers */
offs_t dispstart; /* display start */
};
// construction/destruction
- tms34061_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ tms34061_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
- void set_rowshift(uint8_t rowshift) { m_rowshift = rowshift; }
- void set_vram_size(uint32_t vramsize) { m_vramsize = vramsize; }
+ void set_rowshift(u8 rowshift) { m_rowshift = rowshift; }
+ void set_vram_size(u32 vramsize) { m_vramsize = vramsize; }
auto int_callback() { return m_interrupt_cb.bind(); }
/* reads/writes to the 34061 */
- uint8_t read(address_space &space, int col, int row, int func);
- void write(address_space &space, int col, int row, int func, uint8_t data);
+ u8 read(int col, int row, int func);
+ void write(int col, int row, int func, u8 data);
/* latch settings */
- DECLARE_READ8_MEMBER( latch_r );
- DECLARE_WRITE8_MEMBER( latch_w );
+ u8 latch_r();
+ void latch_w(u8 data);
/* video update handling */
void get_display_state();
bool blanked() const { return bool(m_display.blanked); }
- uint8_t const &vram(unsigned row) const { return m_display.vram[row << m_rowshift]; }
- uint16_t xyoffset() const { return m_display.regs[TMS34061_XYOFFSET]; }
- uint16_t xyaddress() const { return m_display.regs[TMS34061_XYADDRESS]; }
+ u8 const &vram(unsigned row) const { return m_display.vram[row << m_rowshift]; }
+ u16 xyoffset() const { return m_display.regs[TMS34061_XYOFFSET]; }
+ u16 xyaddress() const { return m_display.regs[TMS34061_XYADDRESS]; }
// TODO: encapsulate this properly
tms34061_display m_display;
@@ -86,27 +86,27 @@ private:
TMS34061_REGCOUNT
};
- uint8_t m_rowshift; /* VRAM address is (row << rowshift) | col */
- uint32_t m_vramsize; /* size of video RAM */
+ u8 m_rowshift; /* VRAM address is (row << rowshift) | col */
+ u32 m_vramsize; /* size of video RAM */
devcb_write_line m_interrupt_cb; /* interrupt gen callback */
- uint16_t m_regs[TMS34061_REGCOUNT];
- uint16_t m_xmask;
- uint8_t m_yshift;
- uint32_t m_vrammask;
- uint8_t * m_vram;
- uint8_t * m_latchram;
- uint8_t m_latchdata;
- uint8_t * m_shiftreg;
- emu_timer * m_timer;
+ u16 m_regs[TMS34061_REGCOUNT];
+ u16 m_xmask;
+ u8 m_yshift;
+ u32 m_vrammask;
+ u8 * m_vram;
+ u8 * m_latchram;
+ u8 m_latchdata;
+ u8 * m_shiftreg;
+ emu_timer * m_timer;
void update_interrupts();
TIMER_CALLBACK_MEMBER( interrupt );
- void register_w(address_space &space, offs_t offset, uint8_t data);
- uint8_t register_r(address_space &space, offs_t offset);
+ void register_w(offs_t offset, u8 data);
+ u8 register_r(offs_t offset);
void adjust_xyaddress(int offset);
- void xypixel_w(address_space &space, int offset, uint8_t data);
- uint8_t xypixel_r(address_space &space, int offset);
+ void xypixel_w(int offset, u8 data);
+ u8 xypixel_r(int offset);
};
// device type definition