summaryrefslogtreecommitdiffstatshomepage
path: root/src/devices/video/hd63484.cpp
diff options
context:
space:
mode:
Diffstat (limited to 'src/devices/video/hd63484.cpp')
-rw-r--r--src/devices/video/hd63484.cpp130
1 files changed, 71 insertions, 59 deletions
diff --git a/src/devices/video/hd63484.cpp b/src/devices/video/hd63484.cpp
index 1ae83881fbc..e0b08389492 100644
--- a/src/devices/video/hd63484.cpp
+++ b/src/devices/video/hd63484.cpp
@@ -1914,92 +1914,104 @@ void hd63484_device::video_registers_w(int offset)
}
}
-READ16_MEMBER( hd63484_device::status16_r )
+uint16_t hd63484_device::read16(offs_t offset)
{
- // kothello is coded so that upper byte of this should be 0xff (tests with jc opcode). Maybe it's just unconnected?
- return m_sr | 0xff00;
-}
-
-READ16_MEMBER( hd63484_device::data16_r )
-{
- uint16_t res;
-
- if(m_ar == 0) // FIFO read
+ if (BIT(offset, 0))
{
- uint8_t data;
+ // Read control register
+ uint16_t res;
- dequeue_r(&data);
- res = (data & 0xff) << 8;
- dequeue_r(&data);
- res |= data & 0xff;
- }
- else
- res = video_registers_r(m_ar);
+ if(m_ar == 0) // FIFO read
+ {
+ uint8_t data;
- inc_ar(2);
+ dequeue_r(&data);
+ res = (data & 0xff) << 8;
+ dequeue_r(&data);
+ res |= data & 0xff;
+ }
+ else
+ res = video_registers_r(m_ar);
- return res;
-}
+ inc_ar(2);
-WRITE16_MEMBER( hd63484_device::address16_w )
-{
- if(ACCESSING_BITS_0_7)
- m_ar = data & 0xfe;
+ return res;
+ }
+ else
+ {
+ // Read status register
+ // kothello is coded so that upper byte of this should be 0xff (tests with jc opcode). Maybe it's just open bus?
+ return m_sr | 0xff00;
+ }
}
-WRITE16_MEMBER( hd63484_device::data16_w )
+void hd63484_device::write16(offs_t offset, uint16_t data)
{
- if(ACCESSING_BITS_8_15)
+ if (BIT(offset, 0))
+ {
+ // Write control register
m_vreg[m_ar] = (data & 0xff00) >> 8;
-
- if(ACCESSING_BITS_0_7)
m_vreg[m_ar+1] = (data & 0xff);
- video_registers_w(m_ar);
+ video_registers_w(m_ar);
- inc_ar(2);
+ inc_ar(2);
+ }
+ else
+ {
+ // Write address register
+ m_ar = data & 0xfe;
+ }
}
-READ8_MEMBER( hd63484_device::status8_r )
+uint8_t hd63484_device::read8(offs_t offset)
{
- return m_sr;
-}
+ if (BIT(offset, 0))
+ {
+ // Read control register
+ uint8_t res = 0xff;
-WRITE8_MEMBER( hd63484_device::address8_w )
-{
- m_ar = data;
-}
+ if(m_ar < 2) // FIFO read
+ dequeue_r(&res);
+ else
+ res = video_registers_r(m_ar & 0xfe) >> (m_ar & 1 ? 0 : 8);
-READ8_MEMBER( hd63484_device::data8_r )
-{
- uint8_t res = 0xff;
+ inc_ar(1);
- if(m_ar < 2) // FIFO read
- dequeue_r(&res);
+ return res;
+ }
else
- res = video_registers_r(m_ar & 0xfe) >> (m_ar & 1 ? 0 : 8);
-
- inc_ar(1);
-
- return res;
+ {
+ // Read status register
+ return m_sr;
+ }
}
-WRITE8_MEMBER( hd63484_device::data8_w )
+void hd63484_device::write8(offs_t offset, uint8_t data)
{
- m_vreg[m_ar] = data;
-
- if(m_ar < 2) // FIFO write
+ if (BIT(offset, 0))
{
- queue_w(data);
- if (m_ar & 1)
- process_fifo();
+ // Write control register
+ m_vreg[m_ar] = data;
- m_ar ^= 1;
+ if(m_ar < 2) // FIFO write
+ {
+ queue_w(data);
+ if (m_ar & 1)
+ process_fifo();
+
+ m_ar ^= 1;
+ }
+ else
+ video_registers_w(m_ar & 0xfe);
+
+ inc_ar(1);
}
else
- video_registers_w(m_ar & 0xfe);
-
- inc_ar(1);
+ {
+ // Write address register
+ m_ar = data;
+ }
}
void hd63484_device::device_start()