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Diffstat (limited to 'src/devices/machine/ncr5390.h')
-rw-r--r--src/devices/machine/ncr5390.h46
1 files changed, 37 insertions, 9 deletions
diff --git a/src/devices/machine/ncr5390.h b/src/devices/machine/ncr5390.h
index 0f62fe69c5e..7917795fa1c 100644
--- a/src/devices/machine/ncr5390.h
+++ b/src/devices/machine/ncr5390.h
@@ -24,9 +24,9 @@ public:
virtual DECLARE_ADDRESS_MAP(map, 8);
- DECLARE_READ8_MEMBER(tcount_lo_r);
+ DECLARE_READ8_MEMBER(tcounter_lo_r);
DECLARE_WRITE8_MEMBER(tcount_lo_w);
- DECLARE_READ8_MEMBER(tcount_hi_r);
+ DECLARE_READ8_MEMBER(tcounter_hi_r);
DECLARE_WRITE8_MEMBER(tcount_hi_w);
DECLARE_READ8_MEMBER(fifo_r);
DECLARE_WRITE8_MEMBER(fifo_w);
@@ -42,6 +42,7 @@ public:
DECLARE_WRITE8_MEMBER(sync_offset_w);
DECLARE_READ8_MEMBER(conf_r);
DECLARE_WRITE8_MEMBER(conf_w);
+ DECLARE_WRITE8_MEMBER(test_w);
DECLARE_WRITE8_MEMBER(clock_w);
virtual void scsi_ctrl_changed() override;
@@ -49,6 +50,10 @@ public:
uint8_t dma_r();
void dma_w(uint8_t val);
+ // memory mapped wrappers for dma read/write
+ DECLARE_READ8_MEMBER(mdma_r) { return dma_r(); }
+ DECLARE_WRITE8_MEMBER(mdma_w) { dma_w(data); }
+
protected:
ncr5390_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
@@ -56,7 +61,6 @@ protected:
virtual void device_reset() override;
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
-private:
enum { MODE_D, MODE_T, MODE_I };
enum { IDLE };
@@ -192,6 +196,7 @@ private:
uint8_t clock_conv, sync_offset, sync_period, bus_id, select_timeout, seq;
uint8_t fifo[16];
uint16_t tcount;
+ uint16_t tcounter;
int mode, fifo_pos, command_pos;
int state, xfr_phase;
int command_length;
@@ -199,6 +204,8 @@ private:
int dma_dir;
bool irq, drq;
+ bool dma_command;
+ bool test_mode;
void dma_set(int dir);
void drq_set();
@@ -234,18 +241,40 @@ private:
devcb_write_line m_drq_handler;
};
-class ncr53c94_device : public ncr5390_device
+class ncr53c90a_device : public ncr5390_device
{
public:
- ncr53c94_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ ncr53c90a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
virtual DECLARE_ADDRESS_MAP(map, 8) override;
- DECLARE_WRITE8_MEMBER(conf_w);
+ DECLARE_READ8_MEMBER(status_r);
- DECLARE_WRITE8_MEMBER(test_w);
DECLARE_READ8_MEMBER(conf2_r) { return config2; };
DECLARE_WRITE8_MEMBER(conf2_w) { config2 = data; };
+
+protected:
+ ncr53c90a_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
+
+ virtual void device_start() override;
+ void reset_soft();
+
+ // 53c90a uses a previously reserved bit as an interrupt flag
+ enum {
+ S_INTERRUPT = 0x80,
+ };
+
+private:
+ u8 config2;
+};
+
+class ncr53c94_device : public ncr53c90a_device
+{
+public:
+ ncr53c94_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+
+ virtual DECLARE_ADDRESS_MAP(map, 8) override;
+
DECLARE_READ8_MEMBER(conf3_r) { return config3; };
DECLARE_WRITE8_MEMBER(conf3_w) { config3 = data; };
DECLARE_WRITE8_MEMBER(fifo_align_w) { fifo_align = data; };
@@ -255,13 +284,12 @@ protected:
void reset_soft();
private:
- bool test_mode;
- u8 config2;
u8 config3;
u8 fifo_align;
};
DECLARE_DEVICE_TYPE(NCR5390, ncr5390_device)
+DECLARE_DEVICE_TYPE(NCR53C90A, ncr53c90a_device)
DECLARE_DEVICE_TYPE(NCR53C94, ncr53c94_device)
#endif // MAME_MACHINE_NCR5390_H