diff options
Diffstat (limited to 'src/devices/cpu/z8/z8ops.hxx')
-rw-r--r-- | src/devices/cpu/z8/z8ops.hxx | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/src/devices/cpu/z8/z8ops.hxx b/src/devices/cpu/z8/z8ops.hxx index b08d051caf1..d80988029a5 100644 --- a/src/devices/cpu/z8/z8ops.hxx +++ b/src/devices/cpu/z8/z8ops.hxx @@ -17,7 +17,7 @@ #define IR get_intermediate_register(get_register(fetch())) #define RR get_intermediate_register(get_register(fetch())) #define IM fetch() -#define flag(_flag) ((m_r[Z8_REGISTER_FLAGS] & Z8_FLAGS##_##_flag) ? 1 : 0) +#define flag(_flag) ((m_flags & Z8_FLAGS_##_flag) ? 1 : 0) #define mode_r1_r2(_func) \ uint8_t dst_src = fetch();\ @@ -37,7 +37,7 @@ _func(dst, src); #define mode_IR2_R1(_func) \ - uint8_t src = m_r[read(R)];\ + uint8_t src = register_read(read(R));\ uint8_t dst = R;\ _func(dst, src); @@ -550,14 +550,14 @@ INSTRUCTION( iret ) { /* FLAGS <- @SP SP <- SP + 1 */ - register_write(Z8_REGISTER_FLAGS, stack_pop_byte()); + flags_write(stack_pop_byte()); /* PC <- @SP SP <- SP + 2 */ m_pc = stack_pop_word(); /* IMR (7) <- 1 */ - m_r[Z8_REGISTER_IMR] |= Z8_IMR_ENABLE; + m_imr |= Z8_IMR_ENABLE; } INSTRUCTION( ret ) @@ -773,10 +773,10 @@ INSTRUCTION( swap_IR1 ) { mode_IR1(swap) } CPU CONTROL INSTRUCTIONS ***************************************************************************/ -INSTRUCTION( ccf ) { m_r[Z8_REGISTER_FLAGS] ^= Z8_FLAGS_C; } -INSTRUCTION( di ) { m_r[Z8_REGISTER_IMR] &= ~Z8_IMR_ENABLE; } -INSTRUCTION( ei ) { m_r[Z8_REGISTER_IMR] |= Z8_IMR_ENABLE; } +INSTRUCTION( ccf ) { m_flags ^= Z8_FLAGS_C; } +INSTRUCTION( di ) { m_imr &= ~Z8_IMR_ENABLE; } +INSTRUCTION( ei ) { m_imr |= Z8_IMR_ENABLE; m_irq_initialized = true; } INSTRUCTION( nop ) { /* no operation */ } INSTRUCTION( rcf ) { set_flag_c(0); } INSTRUCTION( scf ) { set_flag_c(1); } -INSTRUCTION( srp_IM ) { m_r[Z8_REGISTER_RP] = fetch(); } +INSTRUCTION( srp_IM ) { rp_write(fetch()); } |