diff options
Diffstat (limited to 'src/devices/cpu/unsp/unsp_fxxx.cpp')
-rw-r--r-- | src/devices/cpu/unsp/unsp_fxxx.cpp | 96 |
1 files changed, 55 insertions, 41 deletions
diff --git a/src/devices/cpu/unsp/unsp_fxxx.cpp b/src/devices/cpu/unsp/unsp_fxxx.cpp index 27359d8f916..dc181da3989 100644 --- a/src/devices/cpu/unsp/unsp_fxxx.cpp +++ b/src/devices/cpu/unsp/unsp_fxxx.cpp @@ -9,6 +9,12 @@ #include "unspdasm.h" +#define LOG_UNSP_MULS (1U << 1) + +#define VERBOSE (0) + +#include "logmacro.h" + inline void unsp_device::execute_fxxx_000_group(uint16_t op) { // | | | @@ -23,36 +29,29 @@ inline void unsp_device::execute_fxxx_000_group(uint16_t op) if (((op & 0xffc0) == 0xfe00) && m_iso >= 12) { // ds = imm6 - int imm = op & 0x003f; - set_ds(imm); + set_ds(op & 0x003f); return; } else if (((op & 0xf1f8) == 0xf020) && m_iso >= 12) { // rx = ds - int r = op & 0x7; - m_core->m_r[r] = get_ds(); + m_core->m_r[op & 0x7] = get_ds(); return; } else if (((op & 0xf1f8) == 0xf028) && m_iso >= 12) { // ds = rx - int r = op & 0x7; - set_ds(m_core->m_r[r]); + set_ds(m_core->m_r[op & 0x7]); return; } else if (((op & 0xf1f8) == 0xf030) && m_iso >= 12) { - int r = op & 0x7; - logerror("%s = fr\n", regs[r]); - // unimplemented_opcode(op); + m_core->m_r[op & 0x7] = get_fr(); return; } else if (((op & 0xf1f8) == 0xf038) && m_iso >= 12) { - int r = op & 0x7; - logerror("fr = %s\n", regs[r]); - // unimplemented_opcode(op); + set_fr(m_core->m_r[op & 0x7]); return; } @@ -60,13 +59,23 @@ inline void unsp_device::execute_fxxx_000_group(uint16_t op) // MUL us ( signed * unsigned ) // MUL 1 1 1 1* r r r 0* 0 0 0 0 1 r r r (** = sign bits, fixed here) - const uint16_t rd = (op >> 9) & 7; - const uint16_t rs = op & 7; + + const uint16_t opa = (op >> 9) & 7; + const uint16_t opb = op & 7; m_core->m_icount -= 12; - int32_t lres = (int32_t)(uint32_t)m_core->m_r[rd] * (int32_t)(int16_t)m_core->m_r[rs]; - m_core->m_r[REG_R4] = (uint16_t)(lres >> 16); + + LOGMASKED(LOG_UNSP_MULS, "%s: MUL us with %04x (unsigned) * %04x (signed) (fra:%d) :\n", machine().describe_context(), m_core->m_r[opa], m_core->m_r[opb], m_core->m_fra); + + uint32_t lres = m_core->m_r[opa] * m_core->m_r[opb]; + if (m_core->m_r[opb] & 0x8000) + { + lres -= m_core->m_r[opa] << 16; + } + m_core->m_r[REG_R4] = lres >> 16; m_core->m_r[REG_R3] = (uint16_t)lres; + LOGMASKED(LOG_UNSP_MULS, "result was : %08x\n", lres); + return; } @@ -186,15 +195,10 @@ inline void unsp_device::execute_fxxx_011_group(uint16_t op) // JMPR 1 1 1 1 1 1 1 0 1 1 - - - - - - if (((op & 0xffc0) == 0xfec0) && m_iso >= 12) { - uint32_t mr = m_core->m_r[REG_R3] | ((m_core->m_r[REG_R4]) << 16); - m_core->m_icount -= 5; - m_core->m_r[REG_PC] = mr & 0xffff; + m_core->m_r[REG_PC] = m_core->m_r[REG_R3]; m_core->m_r[REG_SR] &= 0xffc0; - m_core->m_r[REG_SR] |=( mr>>16) & 0x3f; - - logerror("goto mr %08x\n", mr); - //unimplemented_opcode(op); + m_core->m_r[REG_SR] |= m_core->m_r[REG_R4] & 0x3f; return; } @@ -216,13 +220,13 @@ inline void unsp_device::execute_fxxx_100_group(uint16_t op) if ((op & 0xf1f8) == 0xf108) { - uint32_t lres = 0; - const uint16_t opa = (op >> 9) & 7; const uint16_t opb = op & 7; + LOGMASKED(LOG_UNSP_MULS, "%s: MUL ss with %04x (signed) * %04x (signed) (fra:%d) :\n", machine().describe_context(), m_core->m_r[opa], m_core->m_r[opb], m_core->m_fra); + m_core->m_icount -= 12; - lres = m_core->m_r[opa] * m_core->m_r[opb]; + uint32_t lres = m_core->m_r[opa] * m_core->m_r[opb]; if (m_core->m_r[opb] & 0x8000) { lres -= m_core->m_r[opa] << 16; @@ -233,6 +237,9 @@ inline void unsp_device::execute_fxxx_100_group(uint16_t op) } m_core->m_r[REG_R4] = lres >> 16; m_core->m_r[REG_R3] = (uint16_t)lres; + + LOGMASKED(LOG_UNSP_MULS, "result was : %08x\n", lres); + return; } @@ -253,45 +260,53 @@ void unsp_12_device::execute_fxxx_101_group(uint16_t op) // DIVQ 1 1 1 1 - - - 1 0 1 1 - - 0 1 1 // EXP 1 1 1 1 - - - 1 0 1 1 - - 1 0 0 + m_core->m_icount -= 1; // Unknown count + switch (op) { case 0xf146: case 0xf346: case 0xf546: case 0xf746: case 0xf946: case 0xfb46: case 0xfd46: case 0xff46: - logerror("fraction off\n"); - unimplemented_opcode(op); + m_core->m_fra = 0; return; case 0xf147: case 0xf347: case 0xf547: case 0xf747: case 0xf947: case 0xfb47: case 0xfd47: case 0xff47: - logerror("fraction on\n"); - unimplemented_opcode(op); + m_core->m_fra = 1; return; case 0xf14a: case 0xf34a: case 0xf54a: case 0xf74a: case 0xf94a: case 0xfb4a: case 0xfd4a: case 0xff4a: - logerror("secbank off\n"); - unimplemented_opcode(op); + if (m_core->m_bnk) + { + std::swap<uint32_t>(m_core->m_r[REG_R1], m_core->m_secbank[REG_SR1]); + std::swap<uint32_t>(m_core->m_r[REG_R2], m_core->m_secbank[REG_SR2]); + std::swap<uint32_t>(m_core->m_r[REG_R3], m_core->m_secbank[REG_SR3]); + std::swap<uint32_t>(m_core->m_r[REG_R4], m_core->m_secbank[REG_SR4]); + } + m_core->m_bnk = 0; return; case 0xf14b: case 0xf34b: case 0xf54b: case 0xf74b: case 0xf94b: case 0xfb4b: case 0xfd4b: case 0xff4b: - logerror("secbank on\n"); - unimplemented_opcode(op); + if (m_core->m_bnk == 0) + { + std::swap<uint32_t>(m_core->m_r[REG_R1], m_core->m_secbank[REG_SR1]); + std::swap<uint32_t>(m_core->m_r[REG_R2], m_core->m_secbank[REG_SR2]); + std::swap<uint32_t>(m_core->m_r[REG_R3], m_core->m_secbank[REG_SR3]); + std::swap<uint32_t>(m_core->m_r[REG_R4], m_core->m_secbank[REG_SR4]); + } + m_core->m_bnk = 1; return; case 0xf14d: case 0xf34d: case 0xf54d: case 0xf74d: case 0xf94d: case 0xfb4d: case 0xfd4d: case 0xff4d: - logerror("irqnest off\n"); - unimplemented_opcode(op); + m_core->m_ine = 0; return; case 0xf14f: case 0xf34f: case 0xf54f: case 0xf74f: case 0xf94f: case 0xfb4f: case 0xfd4f: case 0xff4f: - logerror("irqnest on\n"); - unimplemented_opcode(op); + m_core->m_ine = 1; return; case 0xf144: case 0xf344: case 0xf544: case 0xf744: case 0xf944: case 0xfb44: case 0xfd44: case 0xff44: - m_core->m_icount -= 1; m_core->m_fir_move = 1; return; case 0xf145: case 0xf345: case 0xf545: case 0xf745: case 0xf945: case 0xfb45: case 0xfd45: case 0xff45: - m_core->m_icount -= 1; m_core->m_fir_move = 0; return; @@ -300,7 +315,6 @@ void unsp_12_device::execute_fxxx_101_group(uint16_t op) case 0xf171: case 0xf371: case 0xf571: case 0xf771: case 0xf971: case 0xfb71: case 0xfd71: case 0xff71: case 0xf179: case 0xf379: case 0xf579: case 0xf779: case 0xf979: case 0xfb79: case 0xfd79: case 0xff79: { - m_core->m_icount -= 1; // unknown count uint32_t addr = m_core->m_r[REG_R3] | ((m_core->m_r[REG_R4] & 0x3f) << 16); push(m_core->m_r[REG_PC], &m_core->m_r[REG_SP]); push(m_core->m_r[REG_SR], &m_core->m_r[REG_SP]); |