diff options
Diffstat (limited to 'src/devices/cpu/sharc/sharc.cpp')
-rw-r--r-- | src/devices/cpu/sharc/sharc.cpp | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/devices/cpu/sharc/sharc.cpp b/src/devices/cpu/sharc/sharc.cpp index 134611079a8..cec93888548 100644 --- a/src/devices/cpu/sharc/sharc.cpp +++ b/src/devices/cpu/sharc/sharc.cpp @@ -363,9 +363,9 @@ void adsp21062_device::iop_w(offs_t offset, uint32_t data) // DMA 7 case 0x1d: - { + { m_core->dma[7].control = data; - if (data & 0x1) + if (data & 0x1) { sharc_iop_delayed_w(0x1d, data, 30); } @@ -448,7 +448,7 @@ void adsp21062_device::external_dma_write(uint32_t address, uint64_t data) All addresses in the 17-bit index registers are offset by 0x0002 0000, the first internal RAM location, before they are used by the DMA controller. */ - + switch ((m_core->dma[6].control >> 6) & 0x3) { case 2: // 16/48 packing @@ -1063,7 +1063,7 @@ void adsp21062_device::execute_run() dma_run_cycle(7); } dma_count--; - } + } m_core->icount = 0; debugger_instruction_hook(m_core->daddr); @@ -1072,7 +1072,7 @@ void adsp21062_device::execute_run() { check_interrupts(); m_core->idle = 0; - } + } while (m_core->icount > 0 && !m_core->idle && !m_core->write_stalled) { |