diff options
Diffstat (limited to 'src/devices/cpu/sh/sh4.cpp')
-rw-r--r-- | src/devices/cpu/sh/sh4.cpp | 199 |
1 files changed, 96 insertions, 103 deletions
diff --git a/src/devices/cpu/sh/sh4.cpp b/src/devices/cpu/sh/sh4.cpp index 2cc4260559f..31da75a896b 100644 --- a/src/devices/cpu/sh/sh4.cpp +++ b/src/devices/cpu/sh/sh4.cpp @@ -31,6 +31,7 @@ #include "sh3comn.h" #include "sh4tmu.h" #include "sh_dasm.h" +#include "cpu/drcumlsh.h" #include "debugger.h" @@ -140,9 +141,9 @@ sh4be_device::sh4be_device(const machine_config &mconfig, const char *tag, devic } -util::disasm_interface *sh34_base_device::create_disassembler() +std::unique_ptr<util::disasm_interface> sh34_base_device::create_disassembler() { - return new sh_disassembler(true); + return std::make_unique<sh_disassembler>(true); } @@ -2522,8 +2523,6 @@ void sh34_base_device::sh4_set_ftcsr_callback(sh4_ftcsr_callback callback) } */ -using namespace uml; - const opcode_desc* sh4be_device::get_desclist(offs_t pc) { return m_drcfe->describe_code(pc); @@ -2574,12 +2573,12 @@ void sh3_device::init_drc_frontend() void sh34_base_device::func_CHECKIRQ() { if (m_test_irq) sh4_check_pending_irq("mame_sh4_execute"); } static void cfunc_CHECKIRQ(void *param) { ((sh34_base_device *)param)->func_CHECKIRQ(); }; -void sh34_base_device::generate_update_cycles(drcuml_block *block, compiler_state *compiler, uml::parameter param, bool allow_exception) +void sh34_base_device::generate_update_cycles(drcuml_block &block, compiler_state &compiler, uml::parameter param, bool allow_exception) { /* check full interrupts if pending */ - if (compiler->checkints) + if (compiler.checkints) { - compiler->checkints = false; + compiler.checkints = false; /* param is pc + 2 (the opcode after the current one) as we're calling from opcode handlers here that will point to the current opcode instead @@ -2598,7 +2597,7 @@ void sh34_base_device::generate_update_cycles(drcuml_block *block, compiler_stat } /* account for cycles */ - if (compiler->cycles > 0) + if (compiler.cycles > 0) { UML_SUB(block, mem(&m_sh2_state->icount), mem(&m_sh2_state->icount), MAPVAR_CYCLES); // sub icount,icount,cycles UML_MAPVAR(block, MAPVAR_CYCLES, 0); // mapvar cycles,0 @@ -2606,7 +2605,7 @@ void sh34_base_device::generate_update_cycles(drcuml_block *block, compiler_stat UML_EXHc(block, COND_S, *m_out_of_cycles, param); // exh out_of_cycles,nextpc } - compiler->cycles = 0; + compiler.cycles = 0; } /*------------------------------------------------- @@ -2617,18 +2616,15 @@ void sh34_base_device::generate_update_cycles(drcuml_block *block, compiler_stat void sh34_base_device::static_generate_entry_point() { - - drcuml_state *drcuml = m_drcuml.get(); - //code_label skip = 1; - drcuml_block *block; + //uml::code_label const skip = 1; /* begin generating */ - block = drcuml->begin_block(200); + drcuml_block &block(m_drcuml->begin_block(200)); /* forward references */ - alloc_handle(drcuml, &m_nocode, "nocode"); - alloc_handle(drcuml, &m_write32, "write32"); // necessary? - alloc_handle(drcuml, &m_entry, "entry"); + alloc_handle(m_nocode, "nocode"); + alloc_handle(m_write32, "write32"); // necessary? + alloc_handle(m_entry, "entry"); UML_HANDLE(block, *m_entry); // handle entry UML_CALLC(block, cfunc_CHECKIRQ, this); @@ -2637,8 +2633,7 @@ void sh34_base_device::static_generate_entry_point() /* generate a hash jump via the current mode and PC */ UML_HASHJMP(block, 0, mem(&m_sh2_state->pc), *m_nocode); // hashjmp <mode>,<pc>,nocode - block->end(); - + block.end(); } @@ -2646,21 +2641,19 @@ void sh34_base_device::static_generate_entry_point() static_generate_memory_accessor ------------------------------------------------------------------*/ -void sh34_base_device::static_generate_memory_accessor(int size, int iswrite, const char *name, code_handle **handleptr) +void sh34_base_device::static_generate_memory_accessor(int size, int iswrite, const char *name, uml::code_handle *&handleptr) { /* on entry, address is in I0; data for writes is in I1 */ /* on exit, read result is in I0 */ /* routine trashes I0 */ - drcuml_state *drcuml = m_drcuml.get(); - drcuml_block *block; int label = 1; /* begin generating */ - block = drcuml->begin_block(1024); + drcuml_block &block(m_drcuml->begin_block(1024)); /* add a global entry for this */ - alloc_handle(drcuml, handleptr, name); - UML_HANDLE(block, **handleptr); // handle *handleptr + alloc_handle(handleptr, name); + UML_HANDLE(block, *handleptr); // handle *handleptr #if 0 if (A >= 0xe0000000) @@ -2785,10 +2778,10 @@ void sh34_base_device::static_generate_memory_accessor(int size, int iswrite, co UML_RET(block); // ret - block->end(); + block.end(); } -bool sh34_base_device::generate_group_0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_0(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { switch (opcode & 0xff) { @@ -2862,7 +2855,7 @@ bool sh34_base_device::generate_group_0(drcuml_block *block, compiler_state *com void sh34_base_device::func_STCRBANK() { STCRBANK(m_sh2_state->arg0); } static void cfunc_STCRBANK(void *param) { ((sh34_base_device *)param)->func_STCRBANK(); }; -bool sh34_base_device::generate_group_0_STCRBANK(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_0_STCRBANK(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -2874,7 +2867,7 @@ bool sh34_base_device::generate_group_0_STCRBANK(drcuml_block *block, compiler_s void sh34_base_device::func_STCSSR() { STCSSR(m_sh2_state->arg0); } static void cfunc_STCSSR(void *param) { ((sh34_base_device *)param)->func_STCSSR(); }; -bool sh34_base_device::generate_group_0_STCSSR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_0_STCSSR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -2886,7 +2879,7 @@ bool sh34_base_device::generate_group_0_STCSSR(drcuml_block *block, compiler_sta void sh34_base_device::func_STCSPC() { STCSPC(m_sh2_state->arg0); } static void cfunc_STCSPC(void *param) { ((sh34_base_device *)param)->func_STCSPC(); }; -bool sh34_base_device::generate_group_0_STCSPC(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_0_STCSPC(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -2898,7 +2891,7 @@ bool sh34_base_device::generate_group_0_STCSPC(drcuml_block *block, compiler_sta void sh34_base_device::func_PREFM() { PREFM(m_sh2_state->arg0); } static void cfunc_PREFM(void *param) { ((sh34_base_device *)param)->func_PREFM(); }; -bool sh34_base_device::generate_group_0_PREFM(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_0_PREFM(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -2910,7 +2903,7 @@ bool sh34_base_device::generate_group_0_PREFM(drcuml_block *block, compiler_stat void sh34_base_device::func_MOVCAL() { MOVCAL(m_sh2_state->arg0); } static void cfunc_MOVCAL(void *param) { ((sh34_base_device *)param)->func_MOVCAL(); }; -bool sh34_base_device::generate_group_0_MOVCAL(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_0_MOVCAL(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -2922,7 +2915,7 @@ bool sh34_base_device::generate_group_0_MOVCAL(drcuml_block *block, compiler_sta void sh34_base_device::func_LDTLB() { LDTLB(m_sh2_state->arg0); } static void cfunc_LDTLB(void *param) { ((sh34_base_device *)param)->func_LDTLB(); }; -bool sh34_base_device::generate_group_0_LDTLB(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_0_LDTLB(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -2934,7 +2927,7 @@ bool sh34_base_device::generate_group_0_LDTLB(drcuml_block *block, compiler_stat void sh34_base_device::func_CLRS() { CLRS(m_sh2_state->arg0); } static void cfunc_CLRS(void *param) { ((sh34_base_device *)param)->func_CLRS(); }; -bool sh34_base_device::generate_group_0_CLRS(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_0_CLRS(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -2946,7 +2939,7 @@ bool sh34_base_device::generate_group_0_CLRS(drcuml_block *block, compiler_state void sh34_base_device::func_SETS() { SETS(m_sh2_state->arg0); } static void cfunc_SETS(void *param) { ((sh34_base_device *)param)->func_SETS(); }; -bool sh34_base_device::generate_group_0_SETS(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_0_SETS(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -2958,7 +2951,7 @@ bool sh34_base_device::generate_group_0_SETS(drcuml_block *block, compiler_state void sh34_base_device::func_STCSGR() { STCSGR(m_sh2_state->arg0); } static void cfunc_STCSGR(void *param) { ((sh34_base_device *)param)->func_STCSGR(); }; -bool sh34_base_device::generate_group_0_STCSGR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_0_STCSGR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -2971,7 +2964,7 @@ bool sh34_base_device::generate_group_0_STCSGR(drcuml_block *block, compiler_sta void sh34_base_device::func_STSFPUL() { STSFPUL(m_sh2_state->arg0); } static void cfunc_STSFPUL(void *param) { ((sh34_base_device *)param)->func_STSFPUL(); }; -bool sh34_base_device::generate_group_0_STSFPUL(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_0_STSFPUL(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -2983,7 +2976,7 @@ bool sh34_base_device::generate_group_0_STSFPUL(drcuml_block *block, compiler_st void sh34_base_device::func_STSFPSCR() { STSFPSCR(m_sh2_state->arg0); } static void cfunc_STSFPSCR(void *param) { ((sh34_base_device *)param)->func_STSFPSCR(); }; -bool sh34_base_device::generate_group_0_STSFPSCR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_0_STSFPSCR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -2995,7 +2988,7 @@ bool sh34_base_device::generate_group_0_STSFPSCR(drcuml_block *block, compiler_s void sh34_base_device::func_STCDBR() { STCDBR(m_sh2_state->arg0); } static void cfunc_STCDBR(void *param) { ((sh34_base_device *)param)->func_STCDBR(); }; -bool sh34_base_device::generate_group_0_STCDBR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_0_STCDBR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -3007,17 +3000,17 @@ bool sh34_base_device::generate_group_0_STCDBR(drcuml_block *block, compiler_sta void sh34_base_device::func_RTE() { RTE(); } static void cfunc_RTE(void *param) { ((sh34_base_device *)param)->func_RTE(); }; -bool sh34_base_device::generate_group_0_RTE(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_0_RTE(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { generate_delay_slot(block, compiler, desc, 0xffffffff); save_fast_iregs(block); UML_CALLC(block, cfunc_RTE, this); load_fast_iregs(block); - compiler->checkints = true; + compiler.checkints = true; UML_MOV(block, mem(&m_sh2_state->pc), mem(&m_sh2_state->m_delay)); - generate_update_cycles(block, compiler, mem(&m_sh2_state->ea), true); // <subtract cycles> + generate_update_cycles(block, compiler, uml::mem(&m_sh2_state->ea), true); // <subtract cycles> UML_HASHJMP(block, 0, mem(&m_sh2_state->pc), *m_nocode); // and jump to the "resume PC" return true; } @@ -3025,7 +3018,7 @@ bool sh34_base_device::generate_group_0_RTE(drcuml_block *block, compiler_state void sh34_base_device::func_TRAPA() { TRAPA(m_sh2_state->arg0 & 0xff); } static void cfunc_TRAPA(void *param) { ((sh34_base_device *)param)->func_TRAPA(); }; -bool sh34_base_device::generate_group_12_TRAPA(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_12_TRAPA(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -3039,14 +3032,14 @@ bool sh34_base_device::generate_group_12_TRAPA(drcuml_block *block, compiler_sta void sh34_base_device::func_LDCSR() { LDCSR(m_sh2_state->arg0); } static void cfunc_LDCSR(void *param) { ((sh34_base_device *)param)->func_LDCSR(); }; -bool sh34_base_device::generate_group_4_LDCSR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_4_LDCSR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); UML_CALLC(block, cfunc_LDCSR, this); load_fast_iregs(block); - compiler->checkints = true; + compiler.checkints = true; return true; } @@ -3054,14 +3047,14 @@ bool sh34_base_device::generate_group_4_LDCSR(drcuml_block *block, compiler_stat void sh34_base_device::func_LDCMSR() { LDCMSR(m_sh2_state->arg0); } static void cfunc_LDCMSR(void *param) { ((sh34_base_device *)param)->func_LDCMSR(); }; -bool sh34_base_device::generate_group_4_LDCMSR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_4_LDCMSR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); UML_CALLC(block, cfunc_LDCMSR, this); load_fast_iregs(block); - compiler->checkints = true; + compiler.checkints = true; if (!in_delay_slot) generate_update_cycles(block, compiler, desc->pc + 2, true); @@ -3071,7 +3064,7 @@ bool sh34_base_device::generate_group_4_LDCMSR(drcuml_block *block, compiler_sta void sh34_base_device::func_SHAD() { SHAD(m_sh2_state->arg0); } static void cfunc_SHAD(void *param) { ((sh34_base_device *)param)->func_SHAD(); }; -bool sh34_base_device::generate_group_4_SHAD(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_4_SHAD(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -3083,7 +3076,7 @@ bool sh34_base_device::generate_group_4_SHAD(drcuml_block *block, compiler_state void sh34_base_device::func_SHLD() { SHLD(m_sh2_state->arg0); } static void cfunc_SHLD(void *param) { ((sh34_base_device *)param)->func_SHLD(); }; -bool sh34_base_device::generate_group_4_SHLD(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_4_SHLD(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -3092,7 +3085,7 @@ bool sh34_base_device::generate_group_4_SHLD(drcuml_block *block, compiler_state return true; } -bool sh34_base_device::generate_group_4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_4(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { switch (opcode & 0xff) { @@ -3219,7 +3212,7 @@ bool sh34_base_device::generate_group_4(drcuml_block *block, compiler_state *com void sh34_base_device::func_LDCRBANK() { LDCRBANK(m_sh2_state->arg0); } static void cfunc_LDCRBANK(void *param) { ((sh34_base_device *)param)->func_LDCRBANK(); }; -bool sh34_base_device::generate_group_4_LDCRBANK(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_4_LDCRBANK(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -3231,7 +3224,7 @@ bool sh34_base_device::generate_group_4_LDCRBANK(drcuml_block *block, compiler_s void sh34_base_device::func_STCMRBANK() { STCMRBANK(m_sh2_state->arg0); } static void cfunc_STCMRBANK(void *param) { ((sh34_base_device *)param)->func_STCMRBANK(); }; -bool sh34_base_device::generate_group_4_STCMRBANK(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_4_STCMRBANK(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -3243,7 +3236,7 @@ bool sh34_base_device::generate_group_4_STCMRBANK(drcuml_block *block, compiler_ void sh34_base_device::func_LDCMRBANK() { LDCMRBANK(m_sh2_state->arg0); } static void cfunc_LDCMRBANK(void *param) { ((sh34_base_device *)param)->func_LDCMRBANK(); }; -bool sh34_base_device::generate_group_4_LDCMRBANK(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_4_LDCMRBANK(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -3255,7 +3248,7 @@ bool sh34_base_device::generate_group_4_LDCMRBANK(drcuml_block *block, compiler_ void sh34_base_device::func_STCMSGR() { STCMSGR(m_sh2_state->arg0); } static void cfunc_STCMSGR(void *param) { ((sh34_base_device *)param)->func_STCMSGR(); }; -bool sh34_base_device::generate_group_4_STCMSGR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_4_STCMSGR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -3267,7 +3260,7 @@ bool sh34_base_device::generate_group_4_STCMSGR(drcuml_block *block, compiler_st void sh34_base_device::func_STCMSSR() { STCMSSR(m_sh2_state->arg0); } static void cfunc_STCMSSR(void *param) { ((sh34_base_device *)param)->func_STCMSSR(); }; -bool sh34_base_device::generate_group_4_STCMSSR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_4_STCMSSR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -3279,7 +3272,7 @@ bool sh34_base_device::generate_group_4_STCMSSR(drcuml_block *block, compiler_st void sh34_base_device::func_LDCMSSR() { LDCMSSR(m_sh2_state->arg0); } static void cfunc_LDCMSSR(void *param) { ((sh34_base_device *)param)->func_LDCMSSR(); }; -bool sh34_base_device::generate_group_4_LDCMSSR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_4_LDCMSSR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -3291,7 +3284,7 @@ bool sh34_base_device::generate_group_4_LDCMSSR(drcuml_block *block, compiler_st void sh34_base_device::func_LDCSSR() { LDCSSR(m_sh2_state->arg0); } static void cfunc_LDCSSR(void *param) { ((sh34_base_device *)param)->func_LDCSSR(); }; -bool sh34_base_device::generate_group_4_LDCSSR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_4_LDCSSR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -3303,7 +3296,7 @@ bool sh34_base_device::generate_group_4_LDCSSR(drcuml_block *block, compiler_sta void sh34_base_device::func_STCMSPC() { STCMSPC(m_sh2_state->arg0); } static void cfunc_STCMSPC(void *param) { ((sh34_base_device *)param)->func_STCMSPC(); }; -bool sh34_base_device::generate_group_4_STCMSPC(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_4_STCMSPC(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -3315,7 +3308,7 @@ bool sh34_base_device::generate_group_4_STCMSPC(drcuml_block *block, compiler_st void sh34_base_device::func_LDCMSPC() { LDCMSPC(m_sh2_state->arg0); } static void cfunc_LDCMSPC(void *param) { ((sh34_base_device *)param)->func_LDCMSPC(); }; -bool sh34_base_device::generate_group_4_LDCMSPC(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_4_LDCMSPC(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -3327,7 +3320,7 @@ bool sh34_base_device::generate_group_4_LDCMSPC(drcuml_block *block, compiler_st void sh34_base_device::func_LDCSPC() { LDCSPC(m_sh2_state->arg0); } static void cfunc_LDCSPC(void *param) { ((sh34_base_device *)param)->func_LDCSPC(); }; -bool sh34_base_device::generate_group_4_LDCSPC(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_4_LDCSPC(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -3339,7 +3332,7 @@ bool sh34_base_device::generate_group_4_LDCSPC(drcuml_block *block, compiler_sta void sh34_base_device::func_STSMFPUL() { STSMFPUL(m_sh2_state->arg0); } static void cfunc_STSMFPUL(void *param) { ((sh34_base_device *)param)->func_STSMFPUL(); }; -bool sh34_base_device::generate_group_4_STSMFPUL(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_4_STSMFPUL(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -3351,7 +3344,7 @@ bool sh34_base_device::generate_group_4_STSMFPUL(drcuml_block *block, compiler_s void sh34_base_device::func_LDSMFPUL() { LDSMFPUL(m_sh2_state->arg0); } static void cfunc_LDSMFPUL(void *param) { ((sh34_base_device *)param)->func_LDSMFPUL(); }; -bool sh34_base_device::generate_group_4_LDSMFPUL(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_4_LDSMFPUL(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -3363,7 +3356,7 @@ bool sh34_base_device::generate_group_4_LDSMFPUL(drcuml_block *block, compiler_s void sh34_base_device::func_LDSFPUL() { LDSFPUL(m_sh2_state->arg0); } static void cfunc_LDSFPUL(void *param) { ((sh34_base_device *)param)->func_LDSFPUL(); }; -bool sh34_base_device::generate_group_4_LDSFPUL(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_4_LDSFPUL(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -3375,7 +3368,7 @@ bool sh34_base_device::generate_group_4_LDSFPUL(drcuml_block *block, compiler_st void sh34_base_device::func_STSMFPSCR() { STSMFPSCR(m_sh2_state->arg0); } static void cfunc_STSMFPSCR(void *param) { ((sh34_base_device *)param)->func_STSMFPSCR(); }; -bool sh34_base_device::generate_group_4_STSMFPSCR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_4_STSMFPSCR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -3388,7 +3381,7 @@ void sh34_base_device::func_LDSMFPSCR() { LDSMFPSCR(m_sh2_state->arg0); } static void cfunc_LDSMFPSCR(void *param) { ((sh34_base_device *)param)->func_LDSMFPSCR(); }; -bool sh34_base_device::generate_group_4_LDSMFPSCR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_4_LDSMFPSCR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -3401,7 +3394,7 @@ bool sh34_base_device::generate_group_4_LDSMFPSCR(drcuml_block *block, compiler_ void sh34_base_device::func_LDSFPSCR() { LDSFPSCR(m_sh2_state->arg0); } static void cfunc_LDSFPSCR(void *param) { ((sh34_base_device *)param)->func_LDSFPSCR(); }; -bool sh34_base_device::generate_group_4_LDSFPSCR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_4_LDSFPSCR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -3413,7 +3406,7 @@ bool sh34_base_device::generate_group_4_LDSFPSCR(drcuml_block *block, compiler_s void sh34_base_device::func_STCMDBR() { STCMDBR(m_sh2_state->arg0); } static void cfunc_STCMDBR(void *param) { ((sh34_base_device *)param)->func_STCMDBR(); }; -bool sh34_base_device::generate_group_4_STCMDBR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_4_STCMDBR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -3425,7 +3418,7 @@ bool sh34_base_device::generate_group_4_STCMDBR(drcuml_block *block, compiler_st void sh34_base_device::func_LDCMDBR() { LDCMDBR(m_sh2_state->arg0); } static void cfunc_LDCMDBR(void *param) { ((sh34_base_device *)param)->func_LDCMDBR(); }; -bool sh34_base_device::generate_group_4_LDCMDBR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_4_LDCMDBR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -3437,7 +3430,7 @@ bool sh34_base_device::generate_group_4_LDCMDBR(drcuml_block *block, compiler_st void sh34_base_device::func_LDCDBR() { LDCDBR(m_sh2_state->arg0); } static void cfunc_LDCDBR(void *param) { ((sh34_base_device *)param)->func_LDCDBR(); }; -bool sh34_base_device::generate_group_4_LDCDBR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_4_LDCDBR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -3446,7 +3439,7 @@ bool sh34_base_device::generate_group_4_LDCDBR(drcuml_block *block, compiler_sta return true; } -bool sh34_base_device::generate_group_15(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_15(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { switch (opcode & 0x0f) { @@ -3476,7 +3469,7 @@ bool sh34_base_device::generate_group_15(drcuml_block *block, compiler_state *co void sh34_base_device::func_FADD() { FADD(m_sh2_state->arg0); } static void cfunc_FADD(void *param) { ((sh34_base_device *)param)->func_FADD(); }; -bool sh34_base_device::generate_group_15_FADD(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_15_FADD(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -3488,7 +3481,7 @@ bool sh34_base_device::generate_group_15_FADD(drcuml_block *block, compiler_stat void sh34_base_device::func_FSUB() { FSUB(m_sh2_state->arg0); } static void cfunc_FSUB(void *param) { ((sh34_base_device *)param)->func_FSUB(); }; -bool sh34_base_device::generate_group_15_FSUB(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_15_FSUB(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -3500,7 +3493,7 @@ bool sh34_base_device::generate_group_15_FSUB(drcuml_block *block, compiler_stat void sh34_base_device::func_FMUL() { FMUL(m_sh2_state->arg0); } static void cfunc_FMUL(void *param) { ((sh34_base_device *)param)->func_FMUL(); }; -bool sh34_base_device::generate_group_15_FMUL(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_15_FMUL(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -3512,7 +3505,7 @@ bool sh34_base_device::generate_group_15_FMUL(drcuml_block *block, compiler_stat void sh34_base_device::func_FDIV() { FDIV(m_sh2_state->arg0); } static void cfunc_FDIV(void *param) { ((sh34_base_device *)param)->func_FDIV(); }; -bool sh34_base_device::generate_group_15_FDIV(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_15_FDIV(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -3524,7 +3517,7 @@ bool sh34_base_device::generate_group_15_FDIV(drcuml_block *block, compiler_stat void sh34_base_device::func_FCMP_EQ() { FCMP_EQ(m_sh2_state->arg0); } static void cfunc_FCMP_EQ(void *param) { ((sh34_base_device *)param)->func_FCMP_EQ(); }; -bool sh34_base_device::generate_group_15_FCMP_EQ(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_15_FCMP_EQ(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -3536,7 +3529,7 @@ bool sh34_base_device::generate_group_15_FCMP_EQ(drcuml_block *block, compiler_s void sh34_base_device::func_FCMP_GT() { FCMP_GT(m_sh2_state->arg0); } static void cfunc_FCMP_GT(void *param) { ((sh34_base_device *)param)->func_FCMP_GT(); }; -bool sh34_base_device::generate_group_15_FCMP_GT(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_15_FCMP_GT(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -3548,7 +3541,7 @@ bool sh34_base_device::generate_group_15_FCMP_GT(drcuml_block *block, compiler_s void sh34_base_device::func_FMOVS0FR() { FMOVS0FR(m_sh2_state->arg0); } static void cfunc_FMOVS0FR(void *param) { ((sh34_base_device *)param)->func_FMOVS0FR(); }; -bool sh34_base_device::generate_group_15_FMOVS0FR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_15_FMOVS0FR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -3560,7 +3553,7 @@ bool sh34_base_device::generate_group_15_FMOVS0FR(drcuml_block *block, compiler_ void sh34_base_device::func_FMOVFRS0() { FMOVFRS0(m_sh2_state->arg0); } static void cfunc_FMOVFRS0(void *param) { ((sh34_base_device *)param)->func_FMOVFRS0(); }; -bool sh34_base_device::generate_group_15_FMOVFRS0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_15_FMOVFRS0(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -3572,7 +3565,7 @@ bool sh34_base_device::generate_group_15_FMOVFRS0(drcuml_block *block, compiler_ void sh34_base_device::func_FMOVMRFR() { FMOVMRFR(m_sh2_state->arg0); } static void cfunc_FMOVMRFR(void *param) { ((sh34_base_device *)param)->func_FMOVMRFR(); }; -bool sh34_base_device::generate_group_15_FMOVMRFR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_15_FMOVMRFR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -3584,7 +3577,7 @@ bool sh34_base_device::generate_group_15_FMOVMRFR(drcuml_block *block, compiler_ void sh34_base_device::func_FMOVMRIFR() { FMOVMRIFR(m_sh2_state->arg0); } static void cfunc_FMOVMRIFR(void *param) { ((sh34_base_device *)param)->func_FMOVMRIFR(); }; -bool sh34_base_device::generate_group_15_FMOVMRIFR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_15_FMOVMRIFR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -3596,7 +3589,7 @@ bool sh34_base_device::generate_group_15_FMOVMRIFR(drcuml_block *block, compiler void sh34_base_device::func_FMOVFRMR() { FMOVFRMR(m_sh2_state->arg0); } static void cfunc_FMOVFRMR(void *param) { ((sh34_base_device *)param)->func_FMOVFRMR(); }; -bool sh34_base_device::generate_group_15_FMOVFRMR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_15_FMOVFRMR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -3608,7 +3601,7 @@ bool sh34_base_device::generate_group_15_FMOVFRMR(drcuml_block *block, compiler_ void sh34_base_device::func_FMOVFRMDR() { FMOVFRMDR(m_sh2_state->arg0); } static void cfunc_FMOVFRMDR(void *param) { ((sh34_base_device *)param)->func_FMOVFRMDR(); }; -bool sh34_base_device::generate_group_15_FMOVFRMDR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_15_FMOVFRMDR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -3620,7 +3613,7 @@ bool sh34_base_device::generate_group_15_FMOVFRMDR(drcuml_block *block, compiler void sh34_base_device::func_FMOVFR() { FMOVFR(m_sh2_state->arg0); } static void cfunc_FMOVFR(void *param) { ((sh34_base_device *)param)->func_FMOVFR(); }; -bool sh34_base_device::generate_group_15_FMOVFR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_15_FMOVFR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -3632,7 +3625,7 @@ bool sh34_base_device::generate_group_15_FMOVFR(drcuml_block *block, compiler_st void sh34_base_device::func_FMAC() { FMAC(m_sh2_state->arg0); } static void cfunc_FMAC(void *param) { ((sh34_base_device *)param)->func_FMAC(); }; -bool sh34_base_device::generate_group_15_FMAC(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_15_FMAC(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -3641,7 +3634,7 @@ bool sh34_base_device::generate_group_15_FMAC(drcuml_block *block, compiler_stat return true; } -bool sh34_base_device::generate_group_15_op1111_0x13(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_15_op1111_0x13(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { switch ((opcode >> 4) & 0x0f) { @@ -3668,7 +3661,7 @@ bool sh34_base_device::generate_group_15_op1111_0x13(drcuml_block *block, compil void sh34_base_device::func_FSTS() { FSTS(m_sh2_state->arg0); } static void cfunc_FSTS(void *param) { ((sh34_base_device *)param)->func_FSTS(); }; -bool sh34_base_device::generate_group_15_op1111_0x13_FSTS(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_15_op1111_0x13_FSTS(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -3680,7 +3673,7 @@ bool sh34_base_device::generate_group_15_op1111_0x13_FSTS(drcuml_block *block, c void sh34_base_device::func_FLDS() { FLDS(m_sh2_state->arg0); } static void cfunc_FLDS(void *param) { ((sh34_base_device *)param)->func_FLDS(); }; -bool sh34_base_device::generate_group_15_op1111_0x13_FLDS(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_15_op1111_0x13_FLDS(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -3692,7 +3685,7 @@ bool sh34_base_device::generate_group_15_op1111_0x13_FLDS(drcuml_block *block, c void sh34_base_device::func_FLOAT() { FLOAT(m_sh2_state->arg0); } static void cfunc_FLOAT(void *param) { ((sh34_base_device *)param)->func_FLOAT(); }; -bool sh34_base_device::generate_group_15_op1111_0x13_FLOAT(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_15_op1111_0x13_FLOAT(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -3704,7 +3697,7 @@ bool sh34_base_device::generate_group_15_op1111_0x13_FLOAT(drcuml_block *block, void sh34_base_device::func_FTRC() { FTRC(m_sh2_state->arg0); } static void cfunc_FTRC(void *param) { ((sh34_base_device *)param)->func_FTRC(); }; -bool sh34_base_device::generate_group_15_op1111_0x13_FTRC(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_15_op1111_0x13_FTRC(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -3716,7 +3709,7 @@ bool sh34_base_device::generate_group_15_op1111_0x13_FTRC(drcuml_block *block, c void sh34_base_device::func_FNEG() { FNEG(m_sh2_state->arg0); } static void cfunc_FNEG(void *param) { ((sh34_base_device *)param)->func_FNEG(); }; -bool sh34_base_device::generate_group_15_op1111_0x13_FNEG(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_15_op1111_0x13_FNEG(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -3728,7 +3721,7 @@ bool sh34_base_device::generate_group_15_op1111_0x13_FNEG(drcuml_block *block, c void sh34_base_device::func_FABS() { FABS(m_sh2_state->arg0); } static void cfunc_FABS(void *param) { ((sh34_base_device *)param)->func_FABS(); }; -bool sh34_base_device::generate_group_15_op1111_0x13_FABS(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_15_op1111_0x13_FABS(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -3740,7 +3733,7 @@ bool sh34_base_device::generate_group_15_op1111_0x13_FABS(drcuml_block *block, c void sh34_base_device::func_FSQRT() { FSQRT(m_sh2_state->arg0); } static void cfunc_FSQRT(void *param) { ((sh34_base_device *)param)->func_FSQRT(); }; -bool sh34_base_device::generate_group_15_op1111_0x13_FSQRT(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_15_op1111_0x13_FSQRT(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -3752,7 +3745,7 @@ bool sh34_base_device::generate_group_15_op1111_0x13_FSQRT(drcuml_block *block, void sh34_base_device::func_FSRRA() { FSRRA(m_sh2_state->arg0); } static void cfunc_FSRRA(void *param) { ((sh34_base_device *)param)->func_FSRRA(); }; -bool sh34_base_device::generate_group_15_op1111_0x13_FSRRA(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_15_op1111_0x13_FSRRA(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -3764,7 +3757,7 @@ bool sh34_base_device::generate_group_15_op1111_0x13_FSRRA(drcuml_block *block, void sh34_base_device::func_FLDI0() { FLDI0(m_sh2_state->arg0); } static void cfunc_FLDI0(void *param) { ((sh34_base_device *)param)->func_FLDI0(); }; -bool sh34_base_device::generate_group_15_op1111_0x13_FLDI0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_15_op1111_0x13_FLDI0(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -3776,7 +3769,7 @@ bool sh34_base_device::generate_group_15_op1111_0x13_FLDI0(drcuml_block *block, void sh34_base_device::func_FLDI1() { FLDI1(m_sh2_state->arg0); } static void cfunc_FLDI1(void *param) { ((sh34_base_device *)param)->func_FLDI1(); }; -bool sh34_base_device::generate_group_15_op1111_0x13_FLDI1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_15_op1111_0x13_FLDI1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -3788,7 +3781,7 @@ bool sh34_base_device::generate_group_15_op1111_0x13_FLDI1(drcuml_block *block, void sh34_base_device::func_FCNVSD() { FCNVSD(m_sh2_state->arg0); } static void cfunc_FCNVSD(void *param) { ((sh34_base_device *)param)->func_FCNVSD(); }; -bool sh34_base_device::generate_group_15_op1111_0x13_FCNVSD(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_15_op1111_0x13_FCNVSD(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -3800,7 +3793,7 @@ bool sh34_base_device::generate_group_15_op1111_0x13_FCNVSD(drcuml_block *block, void sh34_base_device::func_FCNVDS() { FCNVDS(m_sh2_state->arg0); } static void cfunc_FCNVDS(void *param) { ((sh34_base_device *)param)->func_FCNVDS(); }; -bool sh34_base_device::generate_group_15_op1111_0x13_FCNVDS(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_15_op1111_0x13_FCNVDS(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -3812,7 +3805,7 @@ bool sh34_base_device::generate_group_15_op1111_0x13_FCNVDS(drcuml_block *block, void sh34_base_device::func_FIPR() { FIPR(m_sh2_state->arg0); } static void cfunc_FIPR(void *param) { ((sh34_base_device *)param)->func_FIPR(); }; -bool sh34_base_device::generate_group_15_op1111_0x13_FIPR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_15_op1111_0x13_FIPR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -3821,7 +3814,7 @@ bool sh34_base_device::generate_group_15_op1111_0x13_FIPR(drcuml_block *block, c return true; } -bool sh34_base_device::generate_group_15_op1111_0x13_op1111_0xf13(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_15_op1111_0x13_op1111_0xf13(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { if (opcode & 0x100) { if (opcode & 0x200) { @@ -3851,7 +3844,7 @@ bool sh34_base_device::generate_group_15_op1111_0x13_op1111_0xf13(drcuml_block * void sh34_base_device::func_FSCHG() { FSCHG(); } static void cfunc_FSCHG(void *param) { ((sh34_base_device *)param)->func_FSCHG(); }; -bool sh34_base_device::generate_group_15_op1111_0x13_op1111_0xf13_FSCHG(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_15_op1111_0x13_op1111_0xf13_FSCHG(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); //UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -3863,7 +3856,7 @@ bool sh34_base_device::generate_group_15_op1111_0x13_op1111_0xf13_FSCHG(drcuml_b void sh34_base_device::func_FRCHG() { FRCHG(); } static void cfunc_FRCHG(void *param) { ((sh34_base_device *)param)->func_FRCHG(); }; -bool sh34_base_device::generate_group_15_op1111_0x13_op1111_0xf13_FRCHG(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_15_op1111_0x13_op1111_0xf13_FRCHG(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); //UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -3875,7 +3868,7 @@ bool sh34_base_device::generate_group_15_op1111_0x13_op1111_0xf13_FRCHG(drcuml_b void sh34_base_device::func_FTRV() { FTRV(m_sh2_state->arg0); } static void cfunc_FTRV(void *param) { ((sh34_base_device *)param)->func_FTRV(); }; -bool sh34_base_device::generate_group_15_op1111_0x13_op1111_0xf13_FTRV(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_15_op1111_0x13_op1111_0xf13_FTRV(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); @@ -3887,7 +3880,7 @@ bool sh34_base_device::generate_group_15_op1111_0x13_op1111_0xf13_FTRV(drcuml_bl void sh34_base_device::func_FSSCA() { FSSCA(m_sh2_state->arg0); } static void cfunc_FSSCA(void *param) { ((sh34_base_device *)param)->func_FSSCA(); }; -bool sh34_base_device::generate_group_15_op1111_0x13_op1111_0xf13_FSSCA(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +bool sh34_base_device::generate_group_15_op1111_0x13_op1111_0xf13_FSSCA(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); |