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Diffstat (limited to 'src/devices/cpu/nec/v53.cpp')
-rw-r--r--src/devices/cpu/nec/v53.cpp47
1 files changed, 24 insertions, 23 deletions
diff --git a/src/devices/cpu/nec/v53.cpp b/src/devices/cpu/nec/v53.cpp
index 714c9f66797..be40fa3d946 100644
--- a/src/devices/cpu/nec/v53.cpp
+++ b/src/devices/cpu/nec/v53.cpp
@@ -414,9 +414,10 @@ WRITE_LINE_MEMBER(v53_base_device::hack_w)
/* General stuff */
-ADDRESS_MAP_START(v53_base_device::v53_internal_port_map)
- AM_RANGE(0xffe0, 0xffe1) AM_WRITE8( BSEL_w, 0x00ff) // 0xffe0 // uPD71037 DMA mode bank selection register
- AM_RANGE(0xffe0, 0xffe1) AM_WRITE8( BADR_w, 0xff00) // 0xffe1 // uPD71037 DMA mode bank register peripheral mapping (also uses OPHA)
+void v53_base_device::v53_internal_port_map(address_map &map)
+{
+ map(0xffe0, 0xffe0).w(this, FUNC(v53_base_device::BSEL_w)); // 0xffe0 // uPD71037 DMA mode bank selection register
+ map(0xffe1, 0xffe1).w(this, FUNC(v53_base_device::BADR_w)); // 0xffe1 // uPD71037 DMA mode bank register peripheral mapping (also uses OPHA)
// AM_RANGE(0xffe2, 0xffe3) // (reserved , 0x00ff) // 0xffe2
// AM_RANGE(0xffe2, 0xffe3) // (reserved , 0xff00) // 0xffe3
// AM_RANGE(0xffe4, 0xffe5) // (reserved , 0x00ff) // 0xffe4
@@ -424,30 +425,30 @@ ADDRESS_MAP_START(v53_base_device::v53_internal_port_map)
// AM_RANGE(0xffe6, 0xffe7) // (reserved , 0x00ff) // 0xffe6
// AM_RANGE(0xffe6, 0xffe7) // (reserved , 0xff00) // 0xffe7
// AM_RANGE(0xffe8, 0xffe9) // (reserved , 0x00ff) // 0xffe8
- AM_RANGE(0xffe8, 0xffe9) AM_WRITE8( BRC_w , 0xff00) // 0xffe9 // baud rate counter (used for serial peripheral)
- AM_RANGE(0xffea, 0xffeb) AM_WRITE8( WMB0_w, 0x00ff) // 0xffea // waitstate control
- AM_RANGE(0xffea, 0xffeb) AM_WRITE8( WCY1_w, 0xff00) // 0xffeb // waitstate control
- AM_RANGE(0xffec, 0xffed) AM_WRITE8( WCY0_w, 0x00ff) // 0xffec // waitstate control
- AM_RANGE(0xffec, 0xffed) AM_WRITE8( WAC_w, 0xff00) // 0xffed // waitstate control
+ map(0xffe9, 0xffe9).w(this, FUNC(v53_base_device::BRC_w)); // 0xffe9 // baud rate counter (used for serial peripheral)
+ map(0xffea, 0xffea).w(this, FUNC(v53_base_device::WMB0_w)); // 0xffea // waitstate control
+ map(0xffeb, 0xffeb).w(this, FUNC(v53_base_device::WCY1_w)); // 0xffeb // waitstate control
+ map(0xffec, 0xffec).w(this, FUNC(v53_base_device::WCY0_w)); // 0xffec // waitstate control
+ map(0xffed, 0xffed).w(this, FUNC(v53_base_device::WAC_w)); // 0xffed // waitstate control
// AM_RANGE(0xffee, 0xffef) // (reserved , 0x00ff) // 0xffee
// AM_RANGE(0xffee, 0xffef) // (reserved , 0xff00) // 0xffef
- AM_RANGE(0xfff0, 0xfff1) AM_WRITE8( TCKS_w, 0x00ff) // 0xfff0 // timer clocks
- AM_RANGE(0xfff0, 0xfff1) AM_WRITE8( SBCR_w, 0xff00) // 0xfff1 // internal clock divider, halt behavior etc.
- AM_RANGE(0xfff2, 0xfff3) AM_WRITE8( REFC_w, 0x00ff) // 0xfff2 // ram refresh control
- AM_RANGE(0xfff2, 0xfff3) AM_WRITE8( WMB1_w, 0xff00) // 0xfff3 // waitstate control
- AM_RANGE(0xfff4, 0xfff5) AM_WRITE8( WCY2_w, 0x00ff) // 0xfff4 // waitstate control
- AM_RANGE(0xfff4, 0xfff5) AM_WRITE8( WCY3_w, 0xff00) // 0xfff5 // waitstate control
- AM_RANGE(0xfff6, 0xfff7) AM_WRITE8( WCY4_w, 0x00ff) // 0xfff6 // waitstate control
+ map(0xfff0, 0xfff0).w(this, FUNC(v53_base_device::TCKS_w)); // 0xfff0 // timer clocks
+ map(0xfff1, 0xfff1).w(this, FUNC(v53_base_device::SBCR_w)); // 0xfff1 // internal clock divider, halt behavior etc.
+ map(0xfff2, 0xfff2).w(this, FUNC(v53_base_device::REFC_w)); // 0xfff2 // ram refresh control
+ map(0xfff3, 0xfff3).w(this, FUNC(v53_base_device::WMB1_w)); // 0xfff3 // waitstate control
+ map(0xfff4, 0xfff4).w(this, FUNC(v53_base_device::WCY2_w)); // 0xfff4 // waitstate control
+ map(0xfff5, 0xfff5).w(this, FUNC(v53_base_device::WCY3_w)); // 0xfff5 // waitstate control
+ map(0xfff6, 0xfff6).w(this, FUNC(v53_base_device::WCY4_w)); // 0xfff6 // waitstate control
// AM_RANGE(0xfff6, 0xfff7) // (reserved , 0xff00) // 0xfff7
- AM_RANGE(0xfff8, 0xfff9) AM_WRITE8( SULA_w, 0x00ff) // 0xfff8 // peripheral mapping
- AM_RANGE(0xfff8, 0xfff9) AM_WRITE8( TULA_w, 0xff00) // 0xfff9 // peripheral mapping
- AM_RANGE(0xfffa, 0xfffb) AM_WRITE8( IULA_w, 0x00ff) // 0xfffa // peripheral mapping
- AM_RANGE(0xfffa, 0xfffb) AM_WRITE8( DULA_w, 0xff00) // 0xfffb // peripheral mapping
- AM_RANGE(0xfffc, 0xfffd) AM_WRITE8( OPHA_w, 0x00ff) // 0xfffc // peripheral mapping (upper bits, common)
- AM_RANGE(0xfffc, 0xfffd) AM_WRITE8( OPSEL_w, 0xff00) // 0xfffd // peripheral enabling
- AM_RANGE(0xfffe, 0xffff) AM_WRITE8( SCTL_w, 0x00ff) // 0xfffe // peripheral configuration (& byte / word mapping)
+ map(0xfff8, 0xfff8).w(this, FUNC(v53_base_device::SULA_w)); // 0xfff8 // peripheral mapping
+ map(0xfff9, 0xfff9).w(this, FUNC(v53_base_device::TULA_w)); // 0xfff9 // peripheral mapping
+ map(0xfffa, 0xfffa).w(this, FUNC(v53_base_device::IULA_w)); // 0xfffa // peripheral mapping
+ map(0xfffb, 0xfffb).w(this, FUNC(v53_base_device::DULA_w)); // 0xfffb // peripheral mapping
+ map(0xfffc, 0xfffc).w(this, FUNC(v53_base_device::OPHA_w)); // 0xfffc // peripheral mapping (upper bits, common)
+ map(0xfffd, 0xfffd).w(this, FUNC(v53_base_device::OPSEL_w)); // 0xfffd // peripheral enabling
+ map(0xfffe, 0xfffe).w(this, FUNC(v53_base_device::SCTL_w)); // 0xfffe // peripheral configuration (& byte / word mapping)
// AM_RANGE(0xfffe, 0xffff) // (reserved , 0xff00) // 0xffff
-ADDRESS_MAP_END
+}