summaryrefslogtreecommitdiffstatshomepage
path: root/src/devices/cpu/m68000/m68kmmu.h
diff options
context:
space:
mode:
Diffstat (limited to 'src/devices/cpu/m68000/m68kmmu.h')
-rw-r--r--src/devices/cpu/m68000/m68kmmu.h26
1 files changed, 25 insertions, 1 deletions
diff --git a/src/devices/cpu/m68000/m68kmmu.h b/src/devices/cpu/m68000/m68kmmu.h
index 24601755e6d..ab9d6396673 100644
--- a/src/devices/cpu/m68000/m68kmmu.h
+++ b/src/devices/cpu/m68000/m68kmmu.h
@@ -1016,7 +1016,18 @@ void m68881_mmu_ops()
if (m_mmu_tc & 0x80000000)
{
- m_pmmu_enabled = 1;
+ int bits = 0;
+ for(int shift = 20; shift >= 0; shift -= 4) {
+ bits += (m_mmu_tc >> shift) & 0x0f;
+ }
+
+ if (bits != 32 || !((m_mmu_tc >> 23) & 1)) {
+ logerror("MMU: TC invalid!\n");
+ m_mmu_tc &= ~0x80000000;
+ m68ki_exception_trap(EXCEPTION_MMU_CONFIGURATION);
+ } else {
+ m_pmmu_enabled = 1;
+ }
// printf("PMMU enabled\n");
}
else
@@ -1036,6 +1047,12 @@ void m68881_mmu_ops()
m_mmu_srp_limit = (temp64>>32) & 0xffffffff;
m_mmu_srp_aptr = temp64 & 0xffffffff;
// printf("PMMU: SRP limit = %08x aptr = %08x\n", m_mmu_srp_limit, m_mmu_srp_aptr);
+ // CRP type 0 is not allowed
+ if ((m_mmu_crp_limit & 3) == 0) {
+ m68ki_exception_trap(EXCEPTION_MMU_CONFIGURATION);
+ return;
+ }
+
if (!(modes & 0x100))
{
pmmu_atc_flush();
@@ -1047,6 +1064,13 @@ void m68881_mmu_ops()
m_mmu_crp_limit = (temp64>>32) & 0xffffffff;
m_mmu_crp_aptr = temp64 & 0xffffffff;
// printf("PMMU: CRP limit = %08x aptr = %08x\n", m_mmu_crp_limit, m_mmu_crp_aptr);
+ // CRP type 0 is not allowed
+ if ((m_mmu_crp_limit & 3) == 0) {
+ m68ki_exception_trap(EXCEPTION_MMU_CONFIGURATION);
+ return;
+ }
+
+
if (!(modes & 0x100))
{
pmmu_atc_flush();