diff options
Diffstat (limited to 'src/devices/cpu/jaguar/jaguar.h')
-rw-r--r-- | src/devices/cpu/jaguar/jaguar.h | 221 |
1 files changed, 123 insertions, 98 deletions
diff --git a/src/devices/cpu/jaguar/jaguar.h b/src/devices/cpu/jaguar/jaguar.h index befb5a73334..cf8cf88ecbd 100644 --- a/src/devices/cpu/jaguar/jaguar.h +++ b/src/devices/cpu/jaguar/jaguar.h @@ -90,20 +90,21 @@ public: // configuration helpers auto irq() { return m_cpu_interrupt.bind(); } - virtual DECLARE_WRITE32_MEMBER(ctrl_w) = 0; - virtual DECLARE_READ32_MEMBER(ctrl_r) = 0; + virtual void ctrl_w(offs_t offset, u32 data, u32 mem_mask = ~0) = 0; + virtual u32 ctrl_r(offs_t offset) = 0; protected: - jaguar_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, bool isdsp); + jaguar_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u8 version, bool isdsp); // device-level overrides virtual void device_start() override; virtual void device_reset() override; + virtual void device_post_load() override; // device_execute_interface overrides - virtual uint32_t execute_min_cycles() const override { return 1; } - virtual uint32_t execute_max_cycles() const override { return 1; } - virtual uint32_t execute_input_lines() const override { return 5; } + virtual u32 execute_min_cycles() const override { return 1; } + virtual u32 execute_max_cycles() const override { return 1; } + virtual u32 execute_input_lines() const override { return 5; } virtual void execute_set_input(int inputnum, int state) override; // device_memory_interface overrides @@ -112,20 +113,45 @@ protected: // device_state_interface overrides virtual void state_string_export(const device_state_entry &entry, std::string &str) const override; + // defines + inline void CLR_Z(); + inline void CLR_ZN(); + inline void CLR_ZNC(); + inline void SET_Z(u32 r); + inline void SET_C_ADD(u32 a, u32 b); + inline void SET_C_SUB(u32 a, u32 b); + inline void SET_N(u32 r); + inline void SET_ZN(u32 r); + inline void SET_ZNC_ADD(u32 a, u32 b, u32 r); + inline void SET_ZNC_SUB(u32 a, u32 b, u32 r); + + inline u8 CONDITION(u8 x); + + inline u8 READBYTE(offs_t a); + inline u16 READWORD(offs_t a); + inline u32 READLONG(offs_t a); + + inline void WRITEBYTE(offs_t a, u8 v); + inline void WRITEWORD(offs_t a, u16 v); + inline void WRITELONG(offs_t a, u32 v); + + inline u16 ROPCODE(offs_t pc); + address_space_config m_program_config; /* core registers */ - uint32_t m_r[32]; - uint32_t m_a[32]; - uint32_t * m_b0; - uint32_t * m_b1; + u32 m_r[32]; + u32 m_a[32]; + u32 * m_b0; + u32 * m_b1; /* control registers */ - uint32_t m_ctrl[G_CTRLMAX]; - uint32_t m_ppc; - uint64_t m_accum; + u32 m_ctrl[G_CTRLMAX]; + u32 m_ppc; + u64 m_accum; /* internal stuff */ + u8 m_version; bool m_isdsp; int m_icount; int m_bankswitch_icount; @@ -133,96 +159,95 @@ protected: address_space *m_program; memory_access_cache<2, 0, ENDIANNESS_BIG> *m_cache; - uint32_t m_internal_ram_start; - uint32_t m_internal_ram_end; + u32 m_internal_ram_start; + u32 m_internal_ram_end; - typedef void (jaguar_cpu_device::*op_func)(uint16_t op); + typedef void (jaguar_cpu_device::*op_func)(u16 op); static const op_func gpu_op_table[64]; static const op_func dsp_op_table[64]; - static const uint32_t convert_zero[32]; + static const u32 convert_zero[32]; bool m_tables_referenced; - uint32_t table_refcount; - std::unique_ptr<uint16_t[]> mirror_table; - std::unique_ptr<uint8_t[]> condition_table; + u32 table_refcount; + std::unique_ptr<u16[]> mirror_table; + std::unique_ptr<u8[]> condition_table; const op_func *m_table; - void abs_rn(uint16_t op); - void add_rn_rn(uint16_t op); - void addc_rn_rn(uint16_t op); - void addq_n_rn(uint16_t op); - void addqmod_n_rn(uint16_t op); /* DSP only */ - void addqt_n_rn(uint16_t op); - void and_rn_rn(uint16_t op); - void bclr_n_rn(uint16_t op); - void bset_n_rn(uint16_t op); - void btst_n_rn(uint16_t op); - void cmp_rn_rn(uint16_t op); - void cmpq_n_rn(uint16_t op); - void div_rn_rn(uint16_t op); - void illegal(uint16_t op); - void imacn_rn_rn(uint16_t op); - void imult_rn_rn(uint16_t op); - void imultn_rn_rn(uint16_t op); - void jr_cc_n(uint16_t op); - void jump_cc_rn(uint16_t op); - void load_rn_rn(uint16_t op); - void load_r14n_rn(uint16_t op); - void load_r15n_rn(uint16_t op); - void load_r14rn_rn(uint16_t op); - void load_r15rn_rn(uint16_t op); - void loadb_rn_rn(uint16_t op); - void loadw_rn_rn(uint16_t op); - void loadp_rn_rn(uint16_t op); /* GPU only */ - void mirror_rn(uint16_t op); /* DSP only */ - void mmult_rn_rn(uint16_t op); - void move_rn_rn(uint16_t op); - void move_pc_rn(uint16_t op); - void movefa_rn_rn(uint16_t op); - void movei_n_rn(uint16_t op); - void moveq_n_rn(uint16_t op); - void moveta_rn_rn(uint16_t op); - void mtoi_rn_rn(uint16_t op); - void mult_rn_rn(uint16_t op); - void neg_rn(uint16_t op); - void nop(uint16_t op); - void normi_rn_rn(uint16_t op); - void not_rn(uint16_t op); - void or_rn_rn(uint16_t op); - void pack_rn(uint16_t op); /* GPU only */ - void resmac_rn(uint16_t op); - void ror_rn_rn(uint16_t op); - void rorq_n_rn(uint16_t op); - void sat8_rn(uint16_t op); /* GPU only */ - void sat16_rn(uint16_t op); /* GPU only */ - void sat16s_rn(uint16_t op); /* DSP only */ - void sat24_rn(uint16_t op); /* GPU only */ - void sat32s_rn(uint16_t op); /* DSP only */ - void sh_rn_rn(uint16_t op); - void sha_rn_rn(uint16_t op); - void sharq_n_rn(uint16_t op); - void shlq_n_rn(uint16_t op); - void shrq_n_rn(uint16_t op); - void store_rn_rn(uint16_t op); - void store_rn_r14n(uint16_t op); - void store_rn_r15n(uint16_t op); - void store_rn_r14rn(uint16_t op); - void store_rn_r15rn(uint16_t op); - void storeb_rn_rn(uint16_t op); - void storew_rn_rn(uint16_t op); - void storep_rn_rn(uint16_t op); /* GPU only */ - void sub_rn_rn(uint16_t op); - void subc_rn_rn(uint16_t op); - void subq_n_rn(uint16_t op); - void subqmod_n_rn(uint16_t op); /* DSP only */ - void subqt_n_rn(uint16_t op); - void xor_rn_rn(uint16_t op); + void abs_rn(u16 op); + void add_rn_rn(u16 op); + void addc_rn_rn(u16 op); + void addq_n_rn(u16 op); + void addqmod_n_rn(u16 op); /* DSP only */ + void addqt_n_rn(u16 op); + void and_rn_rn(u16 op); + void bclr_n_rn(u16 op); + void bset_n_rn(u16 op); + void btst_n_rn(u16 op); + void cmp_rn_rn(u16 op); + void cmpq_n_rn(u16 op); + void div_rn_rn(u16 op); + void illegal(u16 op); + void imacn_rn_rn(u16 op); + void imult_rn_rn(u16 op); + void imultn_rn_rn(u16 op); + void jr_cc_n(u16 op); + void jump_cc_rn(u16 op); + void load_rn_rn(u16 op); + void load_r14n_rn(u16 op); + void load_r15n_rn(u16 op); + void load_r14rn_rn(u16 op); + void load_r15rn_rn(u16 op); + void loadb_rn_rn(u16 op); + void loadw_rn_rn(u16 op); + void loadp_rn_rn(u16 op); /* GPU only */ + void mirror_rn(u16 op); /* DSP only */ + void mmult_rn_rn(u16 op); + void move_rn_rn(u16 op); + void move_pc_rn(u16 op); + void movefa_rn_rn(u16 op); + void movei_n_rn(u16 op); + void moveq_n_rn(u16 op); + void moveta_rn_rn(u16 op); + void mtoi_rn_rn(u16 op); + void mult_rn_rn(u16 op); + void neg_rn(u16 op); + void nop(u16 op); + void normi_rn_rn(u16 op); + void not_rn(u16 op); + void or_rn_rn(u16 op); + void pack_rn(u16 op); /* GPU only */ + void resmac_rn(u16 op); + void ror_rn_rn(u16 op); + void rorq_n_rn(u16 op); + void sat8_rn(u16 op); /* GPU only */ + void sat16_rn(u16 op); /* GPU only */ + void sat16s_rn(u16 op); /* DSP only */ + void sat24_rn(u16 op); /* GPU only */ + void sat32s_rn(u16 op); /* DSP only */ + void sh_rn_rn(u16 op); + void sha_rn_rn(u16 op); + void sharq_n_rn(u16 op); + void shlq_n_rn(u16 op); + void shrq_n_rn(u16 op); + void store_rn_rn(u16 op); + void store_rn_r14n(u16 op); + void store_rn_r15n(u16 op); + void store_rn_r14rn(u16 op); + void store_rn_r15rn(u16 op); + void storeb_rn_rn(u16 op); + void storew_rn_rn(u16 op); + void storep_rn_rn(u16 op); /* GPU only */ + void sub_rn_rn(u16 op); + void subc_rn_rn(u16 op); + void subq_n_rn(u16 op); + void subqmod_n_rn(u16 op); /* DSP only */ + void subqt_n_rn(u16 op); + void xor_rn_rn(u16 op); void update_register_banks(); void check_irqs(); void init_tables(); - void jaguar_postload(); }; @@ -230,10 +255,10 @@ class jaguargpu_cpu_device : public jaguar_cpu_device { public: // construction/destruction - jaguargpu_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + jaguargpu_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); - DECLARE_WRITE32_MEMBER(ctrl_w) override; - DECLARE_READ32_MEMBER(ctrl_r) override; + void ctrl_w(offs_t offset, u32 data, u32 mem_mask = ~0) override; + u32 ctrl_r(offs_t offset) override; protected: virtual void execute_run() override; @@ -245,13 +270,13 @@ class jaguardsp_cpu_device : public jaguar_cpu_device { public: // construction/destruction - jaguardsp_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + jaguardsp_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); - DECLARE_WRITE32_MEMBER(ctrl_w) override; - DECLARE_READ32_MEMBER(ctrl_r) override; + void ctrl_w(offs_t offset, u32 data, u32 mem_mask = ~0) override; + u32 ctrl_r(offs_t offset) override; protected: - virtual uint32_t execute_input_lines() const override { return 6; } + virtual u32 execute_input_lines() const override { return 6; } virtual void execute_run() override; virtual std::unique_ptr<util::disasm_interface> create_disassembler() override; |