diff options
Diffstat (limited to 'src/devices/cpu/h8/h83002.cpp')
-rw-r--r-- | src/devices/cpu/h8/h83002.cpp | 57 |
1 files changed, 54 insertions, 3 deletions
diff --git a/src/devices/cpu/h8/h83002.cpp b/src/devices/cpu/h8/h83002.cpp index cc2ca77860e..569e78cec41 100644 --- a/src/devices/cpu/h8/h83002.cpp +++ b/src/devices/cpu/h8/h83002.cpp @@ -1,5 +1,5 @@ // license:BSD-3-Clause -// copyright-holders:Olivier Galibert +// copyright-holders:Olivier Galibert #include "emu.h" #include "h83002.h" @@ -9,6 +9,9 @@ h83002_device::h83002_device(const machine_config &mconfig, const char *tag, dev h8h_device(mconfig, H83002, "H8/3002", tag, owner, clock, "h83002", __FILE__, address_map_delegate(FUNC(h83002_device::map), this)), intc(*this, "intc"), adc(*this, "adc"), + dma(*this, "dma"), + dma0(*this, "dma:0"), + dma1(*this, "dma:1"), port4(*this, "port4"), port6(*this, "port6"), port7(*this, "port7"), @@ -24,7 +27,9 @@ h83002_device::h83002_device(const machine_config &mconfig, const char *tag, dev timer16_4(*this, "timer16:4"), sci0(*this, "sci0"), sci1(*this, "sci1"), - watchdog(*this, "watchdog") + watchdog(*this, "watchdog"), + tend0_cb(*this), + tend1_cb(*this) { syscr = 0; } @@ -32,6 +37,10 @@ h83002_device::h83002_device(const machine_config &mconfig, const char *tag, dev static MACHINE_CONFIG_FRAGMENT(h83002) MCFG_H8H_INTC_ADD("intc") MCFG_H8_ADC_3337_ADD("adc", "intc", 60) + MCFG_H8_DMA_ADD("dma") + // (H8/2002.pdf) Table 8-11 DMAC Activation Sources + MCFG_H8_DMA_CHANNEL_ADD("dma:0", "intc", 44, h8_dma_channel_device::NONE, 24, h8_dma_channel_device::DREQ_EDGE, h8_dma_channel_device::DREQ_LEVEL, 28, 32, 36, 54, 53, h8_dma_channel_device::NONE, h8_dma_channel_device::NONE, h8_dma_channel_device::NONE, h8_dma_channel_device::NONE, h8_dma_channel_device::NONE, h8_dma_channel_device::NONE, h8_dma_channel_device::NONE) + MCFG_H8_DMA_CHANNEL_ADD("dma:1", "intc", 46, h8_dma_channel_device::NONE, 24, h8_dma_channel_device::DREQ_EDGE, h8_dma_channel_device::DREQ_LEVEL, 28, 32, 36, 54, 53, h8_dma_channel_device::NONE, h8_dma_channel_device::NONE, h8_dma_channel_device::NONE, h8_dma_channel_device::NONE, h8_dma_channel_device::NONE, h8_dma_channel_device::NONE, h8_dma_channel_device::NONE) MCFG_H8_PORT_ADD("port4", h8_device::PORT_4, 0x00, 0x00) MCFG_H8_PORT_ADD("port6", h8_device::PORT_6, 0x80, 0x80) MCFG_H8_PORT_ADD("port7", h8_device::PORT_7, 0x00, 0x00) @@ -53,6 +62,24 @@ MACHINE_CONFIG_END DEVICE_ADDRESS_MAP_START(map, 16, h83002_device) AM_RANGE(0xfffd10, 0xffff0f) AM_RAM + // DMA: only full address mode supported + AM_RANGE(0xffff20, 0xffff21) AM_DEVREADWRITE( "dma:0", h8_dma_channel_device, marah_r, marah_w ) + AM_RANGE(0xffff22, 0xffff23) AM_DEVREADWRITE( "dma:0", h8_dma_channel_device, maral_r, maral_w ) + AM_RANGE(0xffff24, 0xffff25) AM_DEVREADWRITE( "dma:0", h8_dma_channel_device, etcra_r, etcra_w ) + AM_RANGE(0xffff26, 0xffff27) AM_DEVREADWRITE8("dma:0", h8_dma_channel_device, dtcra_r, dtcra_w, 0x00ff ) + AM_RANGE(0xffff28, 0xffff29) AM_DEVREADWRITE( "dma:0", h8_dma_channel_device, marbh_r, marbh_w ) + AM_RANGE(0xffff2a, 0xffff2b) AM_DEVREADWRITE( "dma:0", h8_dma_channel_device, marbl_r, marbl_w ) + AM_RANGE(0xffff2c, 0xffff2d) AM_DEVREADWRITE( "dma:0", h8_dma_channel_device, etcrb_r, etcrb_w ) + AM_RANGE(0xffff2e, 0xffff2f) AM_DEVREADWRITE8("dma:0", h8_dma_channel_device, dtcrb_r, dtcrb_w, 0x00ff ) + AM_RANGE(0xffff30, 0xffff31) AM_DEVREADWRITE( "dma:1", h8_dma_channel_device, marah_r, marah_w ) + AM_RANGE(0xffff32, 0xffff33) AM_DEVREADWRITE( "dma:1", h8_dma_channel_device, maral_r, maral_w ) + AM_RANGE(0xffff34, 0xffff35) AM_DEVREADWRITE( "dma:1", h8_dma_channel_device, etcra_r, etcra_w ) + AM_RANGE(0xffff36, 0xffff37) AM_DEVREADWRITE8("dma:1", h8_dma_channel_device, dtcra_r, dtcra_w, 0x00ff ) + AM_RANGE(0xffff38, 0xffff39) AM_DEVREADWRITE( "dma:1", h8_dma_channel_device, marbh_r, marbh_w ) + AM_RANGE(0xffff3a, 0xffff3b) AM_DEVREADWRITE( "dma:1", h8_dma_channel_device, marbl_r, marbl_w ) + AM_RANGE(0xffff3c, 0xffff3d) AM_DEVREADWRITE( "dma:1", h8_dma_channel_device, etcrb_r, etcrb_w ) + AM_RANGE(0xffff3e, 0xffff3f) AM_DEVREADWRITE8("dma:1", h8_dma_channel_device, dtcrb_r, dtcrb_w, 0x00ff ) + AM_RANGE(0xffff60, 0xffff61) AM_DEVREADWRITE8("timer16", h8_timer16_device, tstr_r, tstr_w, 0xff00) AM_RANGE(0xffff60, 0xffff61) AM_DEVREADWRITE8("timer16", h8_timer16_device, tsyr_r, tsyr_w, 0x00ff) AM_RANGE(0xffff62, 0xffff63) AM_DEVREADWRITE8("timer16", h8_timer16_device, tmdr_r, tmdr_w, 0xff00) @@ -94,6 +121,7 @@ DEVICE_ADDRESS_MAP_START(map, 16, h83002_device) AM_RANGE(0xffffa8, 0xffffa9) AM_DEVREADWRITE( "watchdog", h8_watchdog_device, wd_r, wd_w ) AM_RANGE(0xffffaa, 0xffffab) AM_DEVREADWRITE( "watchdog", h8_watchdog_device, rst_r, rst_w ) + AM_RANGE(0xffffac, 0xffffad) AM_READWRITE8( rtmcsr_r,rtmcsr_w,0x00ff) AM_RANGE(0xffffb0, 0xffffb1) AM_DEVREADWRITE8("sci0", h8_sci_device, smr_r, smr_w, 0xff00) AM_RANGE(0xffffb0, 0xffffb1) AM_DEVREADWRITE8("sci0", h8_sci_device, brr_r, brr_w, 0x00ff) @@ -140,7 +168,14 @@ machine_config_constructor h83002_device::device_mconfig_additions() const void h83002_device::execute_set_input(int inputnum, int state) { - intc->set_input(inputnum, state); + if(inputnum == H8_INPUT_LINE_TEND0 && !tend0_cb.isnull()) + tend0_cb(state); + else if(inputnum == H8_INPUT_LINE_TEND1 && !tend1_cb.isnull()) + tend1_cb(state); + else if(inputnum >= H8_INPUT_LINE_DREQ0 && inputnum <= H8_INPUT_LINE_DREQ3) + dma->set_input(inputnum, state); + else + intc->set_input(inputnum, state); } int h83002_device::trapa_setup() @@ -205,6 +240,10 @@ void h83002_device::internal_update(uint64_t current_time) void h83002_device::device_start() { h8h_device::device_start(); + dma_device = dma; + + tend0_cb.resolve(); + tend1_cb.resolve(); } void h83002_device::device_reset() @@ -224,3 +263,15 @@ WRITE8_MEMBER(h83002_device::syscr_w) update_irq_filter(); logerror("syscr = %02x\n", data); } + +READ8_MEMBER(h83002_device::rtmcsr_r) +{ + // set bit 7 -- Compare Match Flag (CMF): This status flag indicates that the RTCNT and RTCOR values have matched. + return rtmcsr | 0x80; +} + +WRITE8_MEMBER(h83002_device::rtmcsr_w) +{ + rtmcsr = data; + logerror("rtmcsr = %02x\n", data); +} |