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Diffstat (limited to 'src/devices/cpu/gigatron/gigatron.cpp')
-rw-r--r--src/devices/cpu/gigatron/gigatron.cpp33
1 files changed, 20 insertions, 13 deletions
diff --git a/src/devices/cpu/gigatron/gigatron.cpp b/src/devices/cpu/gigatron/gigatron.cpp
index 6c25f4abd52..78e3a19afb2 100644
--- a/src/devices/cpu/gigatron/gigatron.cpp
+++ b/src/devices/cpu/gigatron/gigatron.cpp
@@ -13,7 +13,7 @@
#include "gigatrondasm.h"
-DEFINE_DEVICE_TYPE(GTRON, gigatron_cpu_device, "gigatron_cpu", "Gigatron CPU")
+DEFINE_DEVICE_TYPE(GTRON, gigatron_cpu_device, "gigatron_cpu", "Gigatron")
/* FLAGS */
@@ -24,7 +24,6 @@ DEFINE_DEVICE_TYPE(GTRON, gigatron_cpu_device, "gigatron_cpu", "Gigatron CPU")
#define C 0x10
#endif
-
#define gigatron_readop(A) m_program->read_word(A)
#define gigatron_readmem16(A) m_data->read_dword(A)
#define gigatron_readmem8(A) m_data->read_byte(A)
@@ -52,7 +51,8 @@ void gigatron_cpu_device::execute_run()
debugger_instruction_hook(m_pc);
opcode = gigatron_readop(m_pc);
- m_pc = m_npc++;
+ m_pc = m_npc;
+ m_npc = (m_pc + 1) & m_romMask;
uint8_t op = (opcode >> 13) & 0x0007;
uint8_t mode = (opcode >> 10) & 0x0007;
@@ -98,7 +98,7 @@ void gigatron_cpu_device::init()
m_x = 0;
m_y = 0;
m_pc = 0;
- m_npc = (m_pc + 1);
+ m_npc = (m_pc + 1) & m_romMask;
m_ppc = 0;
m_inReg = 0xFF;
@@ -109,6 +109,7 @@ void gigatron_cpu_device::init()
state_add(GTRON_AC, "AC", m_ac);
state_add(GTRON_X, "X", m_x);
state_add(GTRON_Y, "Y", m_y);
+ state_add(GTRON_IREG, "IREG", m_inReg);
set_icountptr(m_icount);
@@ -121,6 +122,7 @@ void gigatron_cpu_device::init()
save_item(NAME(m_pc));
m_outx_cb.resolve_safe();
+ m_ir_cb.resolve_safe(0);
}
void gigatron_cpu_device::branchOp(uint8_t op, uint8_t mode, uint8_t bus, uint8_t d)
@@ -131,29 +133,29 @@ void gigatron_cpu_device::branchOp(uint8_t op, uint8_t mode, uint8_t bus, uint8_
uint16_t base = m_pc & 0xff00;
switch (mode)
{
- case 0:
+ case 0: //jmp
c = true;
base = m_y << 8;
break;
- case 1:
+ case 1: //bgt
c = (ac2 > ZERO);
break;
- case 2:
+ case 2: //blt
c = (ac2 < ZERO);
break;
- case 3:
+ case 3: //bne
c = (ac2 != ZERO);
break;
- case 4:
+ case 4: //beq
c = (ac2 == ZERO);
break;
- case 5:
+ case 5: //bge
c = (ac2 >= ZERO);
break;
- case 6:
+ case 6: //ble
c = (ac2 <= ZERO);
break;
- case 7:
+ case 7: //bra
c = true;
break;
}
@@ -219,7 +221,10 @@ void gigatron_cpu_device::aluOp(uint8_t op, uint8_t mode, uint8_t bus, uint8_t d
case 7:
uint16_t rising = ~(m_out & b);
if (rising & 0x40)
+ {
m_outx = m_ac;
+ m_outx_cb(0, m_outx, 0xFF);
+ }
break;
}
}
@@ -313,10 +318,12 @@ void gigatron_cpu_device::execute_set_input(int irqline, int state)
gigatron_cpu_device::gigatron_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, GTRON, tag, owner, clock)
- , m_ramMask(0x7fff)
+ , m_ramMask(0x7FFF)
+ , m_romMask(0xFFFF)
, m_program_config("program", ENDIANNESS_BIG, 16, 14, -1)
, m_data_config("data", ENDIANNESS_BIG, 8, 15, 0)
, m_outx_cb(*this)
+ , m_ir_cb(*this)
{
}