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Diffstat (limited to 'src/devices/cpu/f2mc16/f2mc16.cpp')
-rw-r--r--src/devices/cpu/f2mc16/f2mc16.cpp465
1 files changed, 438 insertions, 27 deletions
diff --git a/src/devices/cpu/f2mc16/f2mc16.cpp b/src/devices/cpu/f2mc16/f2mc16.cpp
index 7f2c737d9da..6be664d9916 100644
--- a/src/devices/cpu/f2mc16/f2mc16.cpp
+++ b/src/devices/cpu/f2mc16/f2mc16.cpp
@@ -307,7 +307,6 @@ void f2mc16_device::execute_run()
// LSLW A
case 0x0c:
m_tmp16 = m_acc & 0xffff;
- m_acc &= 0xffff0000;
m_ps &= ~F_C;
if (m_tmp16 & 0x8000)
{
@@ -315,6 +314,7 @@ void f2mc16_device::execute_run()
}
m_tmp16 <<= 1;
setNZ_16(m_tmp16);
+ m_acc &= 0xffff0000;
m_acc |= m_tmp16;
m_pc++;
m_icount -= 2;
@@ -392,8 +392,21 @@ void f2mc16_device::execute_run()
m_icount -= 2;
break;
+ // EXTW
case 0x1c:
- // stream << "EXTW";
+ m_acc &= 0xffff;
+ m_ps &= ~(F_N|F_Z);
+ if (m_acc & 0x8000)
+ {
+ m_acc |= 0xffff0000;
+ m_ps |= F_N;
+ }
+ else
+ {
+ m_ps |= F_Z;
+ }
+ m_pc++;
+ m_icount-=2;
break;
// ZEXTW
@@ -404,8 +417,13 @@ void f2mc16_device::execute_run()
m_icount--;
break;
+ // SWAPW
case 0x1e:
- // stream << "SWAPW";
+ m_tmp16 = (m_acc & 0xffff);
+ m_acc >>= 16;
+ m_acc |= (m_tmp16 << 16);
+ m_pc++;
+ m_icount -= 2;
break;
case 0x20:
@@ -451,6 +469,8 @@ void f2mc16_device::execute_run()
// ADDW A
case 0x28:
m_tmp16 = doADD_16((m_acc>>16) & 0xffff, m_acc & 0xffff);
+ m_acc &= 0xffff0000;
+ m_acc |= m_tmp16;
m_pc++;
m_icount -= 2;
break;
@@ -480,8 +500,11 @@ void f2mc16_device::execute_run()
}
break;
+ // CMPW A
case 0x2b:
- // stream << "CMPW A";
+ doCMP_16((m_acc>>16) & 0xffff, m_acc & 0xffff);
+ m_pc++;
+ m_icount--;
break;
// ANDW A
@@ -496,16 +519,40 @@ void f2mc16_device::execute_run()
m_icount -= 2;
break;
+ // ORW A
case 0x2d:
- // stream << "ORW A";
+ m_tmp16 = (m_acc>>16) & 0xffff;
+ m_acc |= m_tmp16;
+ setNZ_16(m_acc & 0xffff);
+ m_ps &= ~F_V;
+ m_pc++;
+ m_icount -= 2;
break;
+ // XORW A
case 0x2e:
- // stream << "XORW A";
+ m_tmp16 = (m_acc>>16) & 0xffff;
+ m_acc ^= m_tmp16;
+ setNZ_16(m_acc & 0xffff);
+ m_ps &= ~F_V;
+ m_pc++;
+ m_icount -= 2;
break;
+ // MULUW A
case 0x2f:
- // stream << "MULUW A";
+ m_tmp16 = (m_acc >> 16) & 0xffff;
+ if (m_tmp16 == 0)
+ {
+ m_acc = 0;
+ m_icount -= 3;
+ }
+ else
+ {
+ m_acc = m_tmp16 * (m_acc & 0xffff);
+ m_icount -= 11;
+ }
+ m_pc++;
break;
case 0x30:
@@ -536,8 +583,17 @@ void f2mc16_device::execute_run()
// util::stream_format(stream, "OR A, #$%02x", operand);
break;
+ // XOR A, #imm8
case 0x36:
- // util::stream_format(stream, "XOR A, #$%02x", operand);
+ m_tmp8 = read_8((m_pcb<<16) | (m_pc+1));
+ m_tmp16 = m_acc & 0xffff;
+ m_acc <<= 16;
+ m_acc |= m_tmp16;
+ m_acc ^= m_tmp8;
+ setNZ_8(m_acc & 0xff);
+ m_ps &= ~F_V;
+ m_pc += 2;
+ m_icount -= 2;
break;
case 0x37:
@@ -552,8 +608,21 @@ void f2mc16_device::execute_run()
// util::stream_format(stream, "SUBW A, #$%04x", opcodes.r16(pc+1));
break;
+ // CWBNE A, #imm16, disp8
case 0x3a:
- // util::stream_format(stream, "CWBNE A, #$%04X, $%04X", opcodes.r16(pc+1), (s8)opcodes.r8(pc+3) + (pc & 0xffff) + 4);
+ m_tmp16 = read_16((m_pcb<<16) | (m_pc+1));
+ m_tmp8 = read_8((m_pcb<<16) | (m_pc+3));
+ doCMP_16(m_acc & 0xffff, m_tmp16);
+ if (m_ps & F_Z)
+ {
+ m_pc += 4;
+ m_icount -= 4;
+ }
+ else
+ {
+ m_pc = m_pc + 4 + (s8)m_tmp8;
+ m_icount -= 5;
+ }
break;
// CMPW A, #imm16
@@ -564,7 +633,7 @@ void f2mc16_device::execute_run()
m_icount -= 2;
break;
- // ANDW A, #imm16 fc4eb1
+ // ANDW A, #imm16
case 0x3c:
m_tmp32 = read_16((m_pcb<<16) | (m_pc+1));
m_tmp32 |= 0xffff0000;
@@ -575,10 +644,30 @@ void f2mc16_device::execute_run()
m_icount -= 2;
break;
+ // ORW A, #imm16
+ case 0x3d:
+ m_tmp16 = read_16((m_pcb<<16) | (m_pc+1));
+ m_acc |= m_tmp16;
+ setNZ_16(m_acc & 0xffff);
+ m_ps &= ~F_V;
+ m_pc += 3;
+ m_icount -= 2;
+ break;
+
case 0x3f:
// stream << "NOTW A";
break;
+ // MOV dir, A
+ case 0x41:
+ m_tmp32 = read_8((m_pcb<<16) | (m_pc+1));
+ m_tmp32 |= (m_dpr<<8) | (m_dtb<<8);
+ write_8(m_tmp32, m_acc & 0xff);
+ setNZ_8(m_acc & 0xff);
+ m_pc += 2;
+ m_icount -= 3;
+ break;
+
// MOV A, #imm8
case 0x42:
m_tmp8 = read_8((m_pcb<<16) | (m_pc+1));
@@ -589,6 +678,16 @@ void f2mc16_device::execute_run()
m_icount -= 2;
break;
+ // MOV dir, #imm8
+ case 0x44:
+ m_tmp32 = read_8((m_pcb<<16) | (m_pc+1));
+ m_tmp8 = read_8((m_pcb<<16) | (m_pc+2));
+ m_tmp32 |= (m_dpr<<8) | (m_dtb<<8);
+ write_8(m_tmp32, m_tmp8);
+ m_pc += 3;
+ m_icount -= 5;
+ break;
+
case 0x46:
// util::stream_format(stream, "MOVW A, SP");
break;
@@ -607,6 +706,16 @@ void f2mc16_device::execute_run()
m_pc += 1;
break;
+ // MOVW dir, A
+ case 0x49:
+ m_tmp32 = read_8((m_pcb<<16) | (m_pc+1));
+ m_tmp32 |= (m_dpr<<8) | (m_dtb<<8);
+ write_16(m_tmp32, m_acc & 0xffff);
+ setNZ_16(m_acc & 0xffff);
+ m_pc += 2;
+ m_icount -= 3;
+ break;
+
// MOVW A, #imm16
case 0x4a:
m_tmp16 = read_16((m_pcb<<16) | (m_pc+1));
@@ -668,24 +777,78 @@ void f2mc16_device::execute_run()
}
break;
+ // MOV A, adr16
case 0x52:
- // util::stream_format(stream, "MOV A, $%04x", opcodes.r16(pc+1));
+ m_tmp16 = read_16((m_pcb<<16) | (m_pc+1));
+ m_acc <<= 16;
+ if (m_prefix_valid)
+ {
+ m_prefix_valid = false;
+ m_acc |= read_8((m_prefix<<16) | m_tmp16);
+ }
+ else
+ {
+ m_acc |= read_8((m_dtb<<16) | m_tmp16);
+ }
+ setNZ_8(m_acc & 0xff);
+ m_pc += 3;
+ m_icount -= 4;
break;
+ // MOV adr16, A
case 0x53:
- // util::stream_format(stream, "MOV $%04x, A", opcodes.r16(pc+1));
+ m_tmp16 = read_16((m_pcb<<16) | (m_pc+1));
+ if (m_prefix_valid)
+ {
+ m_prefix_valid = false;
+ write_8((m_prefix<<16) | m_tmp16, m_acc & 0xff);
+ }
+ else
+ {
+ write_8((m_dtb<<16) | m_tmp16, m_acc & 0xff);
+ }
+ setNZ_8(m_acc & 0xff);
+ m_pc += 3;
+ m_icount -= 4;
break;
case 0x57:
// util::stream_format(stream, "MOVX A, $%04x", opcodes.r16(pc+1));
break;
+ // MOVW A, adr16
case 0x5a:
- // util::stream_format(stream, "MOVW A, $%04x", opcodes.r16(pc+1));
+ m_tmp16 = read_16((m_pcb<<16) | (m_pc+1));
+ m_acc <<= 16;
+ if (m_prefix_valid)
+ {
+ m_prefix_valid = false;
+ m_acc |= read_16((m_prefix<<16) | m_tmp16);
+ }
+ else
+ {
+ m_acc |= read_16((m_dtb<<16) | m_tmp16);
+ }
+ setNZ_16(m_acc & 0xffff);
+ m_pc += 3;
+ m_icount -= 4;
break;
+ // MOVW adr16, A
case 0x5b:
- // util::stream_format(stream, "MOVW $%04x, A", opcodes.r16(pc+1));
+ m_tmp16 = read_16((m_pcb<<16) | (m_pc+1));
+ if (m_prefix_valid)
+ {
+ m_prefix_valid = false;
+ write_16((m_prefix<<16) | m_tmp16, m_acc & 0xffff);
+ }
+ else
+ {
+ write_16((m_dtb<<16) | m_tmp16, m_acc & 0xffff);
+ }
+ setNZ_16(m_acc & 0xfff);
+ m_pc += 3;
+ m_icount -= 4;
break;
// POPW A
@@ -778,6 +941,10 @@ void f2mc16_device::execute_run()
// stream << "RETI";
break;
+ case 0x6c: // bit operation instructions
+ opcodes_bo6c(read_8((m_pcb<<16) | (m_pc+1)));
+ break;
+
case 0x6e: // string instructions
opcodes_str6e(read_8((m_pcb<<16) | (m_pc+1)));
break;
@@ -1149,7 +1316,7 @@ void f2mc16_device::execute_run()
break;
default:
- fatalerror("Unknown F2MC opcode %02x\n", opcode);
+ fatalerror("Unknown F2MC opcode %02x, PC=%02x%04x\n", opcode, m_pcb, m_pc);
break;
}
@@ -1187,10 +1354,137 @@ void f2mc16_device::opcodes_str6e(u8 operand)
}
}
+void f2mc16_device::opcodes_bo6c(u8 operand)
+{
+ switch (operand)
+ {
+ // CLRB adr16, bit
+ case 0x58: case 0x59: case 0x5a: case 0x5b: case 0x5c: case 0x5d: case 0x5e: case 0x5f:
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 2));
+ if (m_prefix_valid)
+ {
+ m_prefix_valid = false;
+ m_tmp8 = read_8((m_prefix<<16) | m_tmp16);
+ m_tmp8 |= (1 << (operand & 7));
+ write_8((m_prefix<<16) | m_tmp16, m_tmp8);
+ }
+ else
+ {
+ m_tmp8= read_8((m_dtb<<16) | m_tmp16);
+ m_tmp8 |= (1 << (operand & 7));
+ write_8((m_dtb<<16) | m_tmp16, m_tmp8);
+ }
+ m_pc += 2;
+ m_icount -= 7;
+ break;
+
+ // SETB adr16, bit
+ case 0x78: case 0x79: case 0x7a: case 0x7b: case 0x7c: case 0x7d: case 0x7e: case 0x7f:
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 2));
+ if (m_prefix_valid)
+ {
+ m_prefix_valid = false;
+ m_tmp8 = read_8((m_prefix<<16) | m_tmp16);
+ m_tmp8 |= (1 << (operand & 7));
+ write_8((m_prefix<<16) | m_tmp16, m_tmp8);
+ }
+ else
+ {
+ m_tmp8= read_8((m_dtb<<16) | m_tmp16);
+ m_tmp8 |= (1 << (operand & 7));
+ write_8((m_dtb<<16) | m_tmp16, m_tmp8);
+ }
+ m_pc += 2;
+ m_icount -= 7;
+ break;
+
+ // BBC adr16, bit, disp8
+ case 0x98: case 0x99: case 0x9a: case 0x9b: case 0x9c: case 0x9d: case 0x9e: case 0x9f:
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 2));
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 4));
+ m_ps &= ~F_Z;
+ m_pc += 5;
+ if (m_prefix_valid)
+ {
+ m_prefix_valid = false;
+ m_tmp32 = (m_prefix<<16) | m_tmp16;
+ }
+ else
+ {
+ m_tmp32 = (m_dtb<<16) | m_tmp16;
+ }
+
+ if (!(read_8(m_tmp32) & (1 << (operand & 7))))
+ {
+ m_ps |= F_Z;
+ m_pc += (s8)m_tmp8;
+ m_icount--;
+ }
+ m_icount -= 7;
+ break;
+
+ // BBS adr16, bit, disp8
+ case 0xb8: case 0xb9: case 0xba: case 0xbb: case 0xbc: case 0xbd: case 0xbe: case 0xbf:
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 2));
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 4));
+ m_ps &= ~F_Z;
+ m_pc += 5;
+ if (m_prefix_valid)
+ {
+ m_prefix_valid = false;
+ m_tmp32 = (m_prefix<<16) | m_tmp16;
+ }
+ else
+ {
+ m_tmp32 = (m_dtb<<16) | m_tmp16;
+ }
+
+ if (read_8(m_tmp32) & (1 << (operand & 7)))
+ {
+ m_pc += (s8)m_tmp8;
+ m_icount--;
+ }
+ else
+ {
+ m_ps |= F_Z;
+ }
+ m_icount -= 7;
+ break;
+
+ default:
+ fatalerror("Unknown F2MC 6C bit-op opcode %02x (PC=%x)\n", operand, (m_pcb<<16) | m_pc);
+ break;
+ }
+}
+
void f2mc16_device::opcodes_2b6f(u8 operand)
{
switch (operand)
{
+ // LSLW A, R0
+ case 0x0c:
+ m_tmp8 = read_rX(0);
+ if (m_tmp8 == 0)
+ {
+ m_icount -= 6;
+ }
+ else
+ {
+ m_tmp16 = m_acc & 0xffff;
+ for (u8 count = 0; count < m_tmp8; count++)
+ {
+ m_ps &= ~F_C;
+ m_ps |= (m_tmp16 & 0x8000) ? F_C : 0;
+ m_tmp16 <<= 1;
+ m_icount -= 5;
+ }
+ setNZ_16(m_tmp16);
+ m_acc &= 0xffff0000;
+ m_acc |= m_tmp16;
+ }
+ m_pc += 2;
+ break;
+
// ASRW A, R0
case 0x0e:
m_tmp8 = read_rX(0);
@@ -1222,7 +1516,7 @@ void f2mc16_device::opcodes_2b6f(u8 operand)
if (m_tmp16 & 0x8000)
{
m_tmp16 >>= 1;
- m_tmp16 |= 1;
+ m_tmp16 |= 0x8000;
}
else
{
@@ -1239,6 +1533,45 @@ void f2mc16_device::opcodes_2b6f(u8 operand)
}
break;
+ // LSRW A, R0
+ case 0xf:
+ m_tmp8 = read_rX(0);
+ if (m_tmp8 == 0)
+ {
+ // docs don't say if N is cleared in this case or not
+ m_ps &= ~(F_C|F_T);
+ m_ps |= F_Z;
+ m_pc += 2;
+ m_icount -= 6;
+ }
+ else
+ {
+ m_tmp16 = m_acc & 0xffff;
+ for (u8 count = 0; count < m_tmp8; count++)
+ {
+ // T is set if either carry or T are set beforehand
+ if ((m_ps & F_C) || (m_ps & F_T))
+ {
+ m_ps |= F_T;
+ }
+ // C becomes the previous LSB
+ m_ps &= ~F_C;
+ if (m_tmp16 & 1)
+ {
+ m_ps |= F_C;
+ }
+
+ m_tmp16 >>= 1;
+ setNZ_16(m_tmp16);
+ m_icount -= 5;
+ }
+
+ m_acc &= 0xffff0000;
+ m_acc |= m_tmp16;
+ m_pc += 2;
+ }
+ break;
+
// MOV DTB, A
case 0x10:
m_dtb = m_acc & 0xff;
@@ -1274,22 +1607,22 @@ void f2mc16_device::opcodes_2b6f(u8 operand)
m_icount -= 1;
break;
- // MOV @RWx + #disp8, A
+ // MOV @RLx + #disp8, A
case 0x30: case 0x32: case 0x34: case 0x36:
m_tmp8 = read_8((m_pcb<<16) | (m_pc+2));
- m_tmp16 = read_rwX((operand>>1) & 0x3) + (s8)m_tmp8;
- write_8(getRWbank((operand>>1) & 0x3, m_tmp16), m_acc & 0xff);
+ m_tmp32 = read_rlX((operand>>1) & 0x3) + (s8)m_tmp8;
+ write_8(m_tmp32, m_acc & 0xff);
setNZ_8(m_acc & 0xff);
m_pc += 3;
m_icount -= 10;
break;
- // MOV A, @RWx + disp8
+ // MOV A, @RLx + disp8
case 0x40: case 0x42: case 0x44: case 0x46:
m_tmp8 = read_8((m_pcb<<16) | (m_pc+2));
- m_tmp16 = read_rwX((operand>>1) & 0x3) + (s8)m_tmp8;
+ m_tmp32 = read_rlX((operand>>1) & 0x3) + (s8)m_tmp8;
m_acc <<= 16;
- m_acc |= read_8(getRWbank((operand>>1) & 0x3, m_tmp16));
+ m_acc |= read_8(m_tmp32);
setNZ_8(m_acc & 0xff);
m_pc += 3;
m_icount -= 10;
@@ -1305,6 +1638,13 @@ void f2mc16_device::opcodes_ea70(u8 operand)
{
switch (operand)
{
+ // ADDL A, RLx
+ case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07:
+ m_acc = doADD_32(m_acc, read_rlX((operand>>1) & 3));
+ m_pc += 3;
+ m_icount -= 7;
+ break;
+
// SUBL A, @RWx + disp8
case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x35: case 0x36: case 0x37:
m_tmp8 = read_32((m_pcb<<16) | (m_pc+2));
@@ -1331,7 +1671,6 @@ void f2mc16_device::opcodes_ea71(u8 operand)
push_16(m_pc+4);
m_tmp8 = read_8((m_pcb << 16) | (m_pc + 2));
m_tmp16 = read_rwX(operand & 7) + (s8)m_tmp8;
- printf("CALLP EAR = %04x\n", m_tmp16);
m_tmp32 = read_32(getRWbank(operand & 7, m_tmp16));
m_pc = m_tmp32 & 0xffff;
m_pcb = (m_tmp32 >> 16) & 0xff;
@@ -1347,7 +1686,7 @@ void f2mc16_device::opcodes_ea71(u8 operand)
write_32(getRWbank(operand & 7, m_tmp16), m_tmp64 & 0xffffffff);
setNZ_32(m_tmp64 & 0xffffffff);
m_ps &= ~F_V;
- if (m_tmp32 & 0x100000000)
+ if (m_tmp64 & 0x100000000)
{
m_ps |= F_V;
}
@@ -1393,6 +1732,23 @@ void f2mc16_device::opcodes_ea71(u8 operand)
m_icount -= 4;
break;
+ // MOVL addr16, A
+ case 0xbf:
+ m_tmp16 = read_16((m_pcb<<16) | (m_pc+2));
+ if (m_prefix_valid)
+ {
+ m_prefix_valid = false;
+ write_32((m_prefix<<16) | m_tmp16, m_acc);
+ }
+ else
+ {
+ write_32((m_dtb<<16) | m_tmp16, m_acc);
+ }
+ setNZ_32(m_acc);
+ m_pc += 4;
+ m_icount -= 5;
+ break;
+
// MOV @RWx, #imm8
case 0xc8: case 0xc9: case 0xca: case 0xcb:
m_tmp8 = read_8((m_pcb<<16) | (m_pc+2));
@@ -1413,13 +1769,30 @@ void f2mc16_device::opcodes_ea72(u8 operand)
{
switch (operand)
{
- // MOVW A, @RWx + disp8
+ // INC @RWx + disp8
+ case 0x50: case 0x51: case 0x52: case 0x53: case 0x54: case 0x55: case 0x56: case 0x57:
+ m_tmp8 = read_8((m_pcb<<16) | (m_pc+2));
+ m_tmp16 = read_rwX(operand & 7) + (s8)m_tmp8;
+ m_tmp32 = read_16(getRWbank(operand & 7, m_tmp16));
+ m_tmp32++;
+ write_8(getRWbank(operand & 7, m_tmp16), m_tmp32 & 0xff);
+ setNZ_8(m_tmp32 & 0xff);
+ m_ps &= ~F_V;
+ if (m_tmp32 & 0x100)
+ {
+ m_ps |= F_V;
+ }
+ m_pc += 3;
+ m_icount -= 5;
+ break;
+
+ // MOV A, @RWx + disp8
case 0x90: case 0x91: case 0x92: case 0x93: case 0x94: case 0x95: case 0x96: case 0x97:
m_tmp8 = read_8((m_pcb<<16) | (m_pc+2));
m_tmp16 = read_rwX(operand & 7) + (s8)m_tmp8;
m_acc <<= 16;
- m_acc |= read_16(getRWbank(operand & 7, m_tmp16));
- setNZ_16(m_acc & 0xffff);
+ m_acc |= read_8(getRWbank(operand & 7, m_tmp16));
+ setNZ_8(m_acc & 0xff);
m_pc += 3;
m_icount -= 5;
break;
@@ -1461,6 +1834,33 @@ void f2mc16_device::opcodes_ea73(u8 operand)
m_icount -= 5;
break;
+ // MOVW @RWx + disp16, #imm16
+ case 0xd8: case 0xd9: case 0xda: case 0xdb:
+ m_tmp16 = read_16((m_pcb<<16) | (m_pc+2));
+ m_tmp32 = read_16((m_pcb<<16) | (m_pc+4));
+ m_tmpea = read_rwX(operand & 7) + (s16)m_tmp16;
+ write_16(getRWbank(operand & 7, m_tmpea), m_tmp32 & 0xffff);
+ m_pc += 6;
+ m_icount -= 4;
+ break;
+
+ // MOVW addr16, #imm16
+ case 0xdf:
+ m_tmp32 = read_16((m_pcb<<16) | (m_pc+2));
+ m_tmp16 = read_16((m_pcb<<16) | (m_pc+4));
+ if (m_prefix_valid)
+ {
+ m_prefix_valid = false;
+ write_16((m_prefix<<16) | m_tmp32, m_tmp16);
+ }
+ else
+ {
+ write_16((m_dtb<<16) | m_tmp32, m_tmp16);
+ }
+ m_pc += 6;
+ m_icount -= 4;
+ break;
+
default:
fatalerror("Unknown F2MC EA73 opcode %02x (PC=%x)\n", operand, (m_pcb<<16) | m_pc);
break;
@@ -1511,6 +1911,17 @@ void f2mc16_device::opcodes_ea76(u8 operand)
m_icount -= 10;
break;
+ // ORW A, @RWx
+ case 0xa0: case 0xa1: case 0xa2: case 0xa3: case 0xa4: case 0xa5: case 0xa6: case 0xa7:
+ m_tmp16 = read_rwX(operand & 7);
+ m_tmp16 = read_16(getRWbank(operand & 7, m_tmp16));
+ m_acc |= m_tmp16;
+ setNZ_16(m_acc & 0xffff);
+ m_ps &= ~F_V;
+ m_pc += 2;
+ m_icount -= 4;
+ break;
+
default:
fatalerror("Unknown F2MC EA76 opcode %02x (PC=%x)\n", operand, (m_pcb<<16) | m_pc);
break;