diff options
Diffstat (limited to 'src/devices/cpu/arm7/arm7ops.cpp')
-rw-r--r-- | src/devices/cpu/arm7/arm7ops.cpp | 19 |
1 files changed, 9 insertions, 10 deletions
diff --git a/src/devices/cpu/arm7/arm7ops.cpp b/src/devices/cpu/arm7/arm7ops.cpp index ea10a36be4d..8e52635ecea 100644 --- a/src/devices/cpu/arm7/arm7ops.cpp +++ b/src/devices/cpu/arm7/arm7ops.cpp @@ -262,22 +262,21 @@ int arm7_cpu_device::storeInc(uint32_t pat, uint32_t rbv, int mode) int arm7_cpu_device::storeDec(uint32_t pat, uint32_t rbv, int mode) { - int i, result = 0, cnt; - // pre-count the # of registers being stored - for (i = 15; i >= 0; i--) + // TODO[RH]: This is just a popcnt. Consider eminline intrinsic. + int result = 0; + for (int i = 15; i >= 0; i--) { if ((pat >> i) & 1) { result++; - - // starting address - rbv -= 4; } } - cnt = 0; - for (i = 0; i <= 15; i++) + // adjust starting address + rbv -= (result << 2); + + for (int i = 0; i <= 15; i++) { if ((pat >> i) & 1) { @@ -285,8 +284,8 @@ int arm7_cpu_device::storeDec(uint32_t pat, uint32_t rbv, int mode) if (i == 15) /* R15 is plus 12 from address of STM */ LOG(("%08x: StoreDec on R15\n", R15)); #endif - WRITE32(rbv + (cnt * 4), GetModeRegister(mode, i)); - cnt++; + WRITE32(rbv, GetModeRegister(mode, i)); + rbv += 4; } } return result; |