diff options
Diffstat (limited to 'src/devices/cpu/arm7/arm7core.h')
-rw-r--r-- | src/devices/cpu/arm7/arm7core.h | 22 |
1 files changed, 21 insertions, 1 deletions
diff --git a/src/devices/cpu/arm7/arm7core.h b/src/devices/cpu/arm7/arm7core.h index 076f30047fb..32043c57d4c 100644 --- a/src/devices/cpu/arm7/arm7core.h +++ b/src/devices/cpu/arm7/arm7core.h @@ -48,7 +48,7 @@ enum ARM7_R8, ARM7_R9, ARM7_R10, ARM7_R11, ARM7_R12, ARM7_R13, ARM7_R14, ARM7_R15, ARM7_FR8, ARM7_FR9, ARM7_FR10, ARM7_FR11, ARM7_FR12, ARM7_FR13, ARM7_FR14, ARM7_IR13, ARM7_IR14, ARM7_SR13, ARM7_SR14, ARM7_FSPSR, ARM7_ISPSR, ARM7_SSPSR, - ARM7_CPSR, ARM7_AR13, ARM7_AR14, ARM7_ASPSR, ARM7_UR13, ARM7_UR14, ARM7_USPSR + ARM7_CPSR, ARM7_AR13, ARM7_AR14, ARM7_ASPSR, ARM7_UR13, ARM7_UR14, ARM7_USPSR, ARM7_LOGTLB }; /* There are 36 Unique - 32 bit processor registers */ @@ -83,6 +83,19 @@ enum }; /* Coprocessor-related macros */ +#define COPRO_DOMAIN_NO_ACCESS 0 +#define COPRO_DOMAIN_CLIENT 1 +#define COPRO_DOMAIN_RESV 2 +#define COPRO_DOMAIN_MANAGER 3 + +#define COPRO_FAULT_NONE 0 +#define COPRO_FAULT_TRANSLATE_SECTION 5 +#define COPRO_FAULT_TRANSLATE_PAGE 7 +#define COPRO_FAULT_DOMAIN_SECTION 9 +#define COPRO_FAULT_DOMAIN_PAGE 11 +#define COPRO_FAULT_PERM_SECTION 13 +#define COPRO_FAULT_PERM_PAGE 15 + #define COPRO_TLB_BASE m_tlbBase #define COPRO_TLB_BASE_MASK 0xffffc000 #define COPRO_TLB_VADDR_FLTI_MASK 0xfff00000 @@ -99,6 +112,9 @@ enum #define COPRO_TLB_LARGE_PAGE_MASK 0xffff0000 #define COPRO_TLB_SMALL_PAGE_MASK 0xfffff000 #define COPRO_TLB_TINY_PAGE_MASK 0xfffffc00 +#define COPRO_TLB_STABLE_MASK 0xfff00000 +#define COPRO_TLB_LSTABLE_MASK 0xfffff000 +#define COPRO_TLB_TTABLE_MASK 0xfffffc00 #define COPRO_TLB_UNMAPPED 0 #define COPRO_TLB_LARGE_PAGE 1 #define COPRO_TLB_SMALL_PAGE 2 @@ -106,6 +122,10 @@ enum #define COPRO_TLB_COARSE_TABLE 1 #define COPRO_TLB_SECTION_TABLE 2 #define COPRO_TLB_FINE_TABLE 3 +#define COPRO_TLB_TYPE_SECTION 0 +#define COPRO_TLB_TYPE_LARGE 1 +#define COPRO_TLB_TYPE_SMALL 2 +#define COPRO_TLB_TYPE_TINY 3 #define COPRO_CTRL m_control #define COPRO_CTRL_MMU_EN 0x00000001 |