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Diffstat (limited to 'src/devices/bus/lpci/i82371sb.cpp')
-rw-r--r--src/devices/bus/lpci/i82371sb.cpp56
1 files changed, 37 insertions, 19 deletions
diff --git a/src/devices/bus/lpci/i82371sb.cpp b/src/devices/bus/lpci/i82371sb.cpp
index 6fd7308a922..e30640440e8 100644
--- a/src/devices/bus/lpci/i82371sb.cpp
+++ b/src/devices/bus/lpci/i82371sb.cpp
@@ -19,6 +19,7 @@
#include "emu.h"
#include "i82371sb.h"
+//#define VERBOSE
/***************************************************************************
IMPLEMENTATION
@@ -38,24 +39,28 @@ uint32_t i82371sb_device::pci_isa_r(device_t *busdevice,int offset, uint32_t mem
{
uint32_t result = m_regs[0][offset];
- //logerror("i82371sb_pci_isa_r, offset = %02x, mem_mask = %08x\n", offset, mem_mask);
+#ifdef VERBOSE
+ logerror("i82371sb_pci_isa_r, offset = %02x, mem_mask = %08x\n", offset, mem_mask);
+#endif
return result;
}
void i82371sb_device::pci_isa_w(device_t *busdevice, int offset, uint32_t data, uint32_t mem_mask)
{
- //logerror("i82371sb_pci_isa_w, offset = %02x, data = %08x, mem_mask = %08x\n", offset, data, mem_mask);
+#ifdef VERBOSE
+ logerror("i82371sb_pci_isa_w, offset = %02x, data = %08x, mem_mask = %08x\n", offset, data, mem_mask);
+#endif
switch (offset)
{
case 0x04:
COMBINE_DATA(&m_regs[0][offset]);
- /* clear reserved bits */
+ // clear reserved bits
m_regs[0][offset] &= 0x00000005;
- /* set new status */
+ // set new status
m_regs[0][offset] |= 0x02800000;
break;
@@ -64,24 +69,30 @@ void i82371sb_device::pci_isa_w(device_t *busdevice, int offset, uint32_t data,
uint32_t i82371sb_device::pci_ide_r(device_t *busdevice, int offset, uint32_t mem_mask)
{
- //logerror("i82371sb_pci_ide_r, offset = %02x, mem_mask = %08x\n", offset, mem_mask);
uint32_t result = m_regs[1][offset];
+
+#ifdef VERBOSE
+ logerror("i82371sb_pci_ide_r, offset = %02x, mem_mask = %08x\n", offset, mem_mask);
+#endif
+
return result;
}
void i82371sb_device::pci_ide_w(device_t *busdevice, int offset, uint32_t data, uint32_t mem_mask)
{
- //logerror("i82371sb_pci_ide_w, offset = %02x, data = %08x, mem_mask = %08x\n", offset, data, mem_mask);
+#ifdef VERBOSE
+ logerror("i82371sb_pci_ide_w, offset = %02x, data = %08x, mem_mask = %08x\n", offset, data, mem_mask);
+#endif
switch (offset)
{
case 0x04:
COMBINE_DATA(&m_regs[1][offset]);
- /* clear reserved bits */
+ // clear reserved bits
m_regs[1][offset] &= 0x00000005;
- /* set new status */
+ // set new status
m_regs[1][offset] |= 0x02800000;
break;
@@ -92,24 +103,28 @@ uint32_t i82371sb_device::pci_usb_r(device_t *busdevice, int offset, uint32_t me
{
uint32_t result = m_regs[2][offset];
- //logerror("i82371sb_pci_usb_r, offset = %02x, mem_mask = %08x\n", offset, mem_mask);
+#ifdef VERBOSE
+ logerror("i82371sb_pci_usb_r, offset = %02x, mem_mask = %08x\n", offset, mem_mask);
+#endif
return result;
}
void i82371sb_device::pci_usb_w(device_t *busdevice, int offset, uint32_t data, uint32_t mem_mask)
{
- //logerror("i82371sb_pci_usb_w, offset = %02x, data = %08x, mem_mask = %08x\n", offset, data, mem_mask);
+#ifdef VERBOSE
+ logerror("i82371sb_pci_usb_w, offset = %02x, data = %08x, mem_mask = %08x\n", offset, data, mem_mask);
+#endif
switch (offset)
{
case 0x04:
COMBINE_DATA(&m_regs[2][offset]);
- /* clear reserved bits */
+ // clear reserved bits
m_regs[2][offset] &= 0x00000005;
- /* set new status */
+ // set new status
m_regs[2][offset] |= 0x02800000;
break;
@@ -124,8 +139,9 @@ uint32_t i82371sb_device::pci_read(pci_bus_device *pcibus, int function, int off
case 1: return pci_ide_r(pcibus, offset, mem_mask);
case 2: return pci_usb_r(pcibus, offset, mem_mask);
}
-
- //logerror("i82371sb_pci_read: read from undefined function %d\n", function);
+#ifdef VERBOSE
+ logerror("i82371sb_pci_read: read from undefined function %d offset %08X mask %08X\n", function,offset,mem_mask);
+#endif
return 0;
}
@@ -138,7 +154,9 @@ void i82371sb_device::pci_write(pci_bus_device *pcibus, int function, int offset
case 1: pci_ide_w(pcibus, offset, data, mem_mask); break;
case 2: pci_usb_w(pcibus, offset, data, mem_mask); break;
}
- //logerror("i82371sb_pci_write: write to undefined function %d\n", function);
+#ifdef VERBOSE
+ logerror("i82371sb_pci_write: write to undefined function %d offset %08X mask %08X data %08X\n", function, offset, mem_mask, data);
+#endif
}
//-------------------------------------------------
@@ -149,7 +167,7 @@ void i82371sb_device::device_start()
{
southbridge_device::device_start();
m_boot_state_hook.resolve_safe();
- /* setup save states */
+ // setup save states
save_item(NAME(m_regs));
}
@@ -163,19 +181,19 @@ void i82371sb_device::device_reset()
memset(m_regs, 0, sizeof(m_regs));
- /* isa */
+ // isa
m_regs[0][0x00] = 0x70008086;
m_regs[0][0x04] = 0x00000000;
m_regs[0][0x08] = 0x06010000;
m_regs[0][0x0c] = 0x00800000;
- /* ide */
+ // ide
m_regs[1][0x00] = 0x70108086;
m_regs[1][0x04] = 0x02800000;
m_regs[1][0x08] = 0x01018000;
m_regs[1][0x0c] = 0x00000000;
- /* usb */
+ // usb
m_regs[2][0x00] = 0x70208086;
m_regs[2][0x04] = 0x02800000;
m_regs[2][0x08] = 0x0c030000;