diff options
Diffstat (limited to 'nl_examples/cmos_inverter_clk.cpp')
-rw-r--r-- | nl_examples/cmos_inverter_clk.cpp | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/nl_examples/cmos_inverter_clk.cpp b/nl_examples/cmos_inverter_clk.cpp index 09064a59d19..95dba92bb79 100644 --- a/nl_examples/cmos_inverter_clk.cpp +++ b/nl_examples/cmos_inverter_clk.cpp @@ -17,18 +17,18 @@ NETLIST_START(cmos_inverter_clk) //SOLVER(Solver, 480000) SOLVER(Solver, 1e5) //SOLVER(Solver, 100000000000) - PARAM(Solver.ACCURACY, 1e-7 ) + PARAM(Solver.ACCURACY, 1e-6 ) PARAM(Solver.NR_LOOPS, 500000) - PARAM(Solver.DYNAMIC_TS, 0) + PARAM(Solver.DYNAMIC_TS, 1) PARAM(Solver.DYNAMIC_LTE, 1e-5) - PARAM(Solver.DYNAMIC_MIN_TIMESTEP, 2e-8) + PARAM(Solver.DYNAMIC_MIN_TIMESTEP, 2e-9) ANALOG_INPUT(V5, 5) // CLOCK(clk, 0.5e6) #if (USE_CLOCK) CLOCK(V, 5000) - PARAM(NETLIST.DEFAULT_MOS_CAPMODEL, 0) // Disable capacitance modeling + PARAM(NETLIST.DEFAULT_MOS_CAPMODEL, 2) // Disable capacitance modeling //CLOCK(V, 500000) #else VS(V, 5) @@ -56,7 +56,7 @@ NETLIST_START(cmos_inverter_clk) NET_C(M.D, C.1) NET_C(M.S, C.2) #endif -#if 0 +#if 1 LOG(log_G, M.G) LOG(log_D, M.D) LOGD(log_X, RG.1, RG.2) |