diff options
author | angelosa <salese_corp_ltd@email.it> | 2016-02-09 03:00:35 +0100 |
---|---|---|
committer | angelosa <salese_corp_ltd@email.it> | 2016-02-09 03:00:35 +0100 |
commit | e5d240d4e70a26c422a9ce3d74f19f2ee28de877 (patch) | |
tree | 5e5d6dd7d370e59fb2fd4009b73838e743fd5764 | |
parent | f9f0e40b8ddfc5a736adb6afb54aed4a19557d2f (diff) |
Improved opcode $bb, added extra protection ports
-rw-r--r-- | src/devices/cpu/m6800/6800ops.inc | 11 | ||||
-rw-r--r-- | src/mame/drivers/nightgal.cpp | 41 |
2 files changed, 41 insertions, 11 deletions
diff --git a/src/devices/cpu/m6800/6800ops.inc b/src/devices/cpu/m6800/6800ops.inc index c0147b6acee..4e92e401be7 100644 --- a/src/devices/cpu/m6800/6800ops.inc +++ b/src/devices/cpu/m6800/6800ops.inc @@ -2288,10 +2288,10 @@ OP_HANDLER( stx_ex ) // $bb - load A from [X + $0] OP_HANDLER( ldax_imm ) { - EA=X; - A=RM(EAD); - CLR_NZV; - SET_NZ8(A); + UINT8 val; + {EA=X+((M_RDOP_ARG(PCD)<<8) | M_RDOP_ARG((PCD+1)&0xffff));PC+=2;} + val = RM(EAD); + CLR_NZVC; SET_NZ8(val); } // $b2 - assuming correct, store first byte to (X + $disp8) @@ -2301,7 +2301,8 @@ OP_HANDLER( nsc_unk ) UINT8 val = RM(EAD); IMM8; EA = X + RM(EAD); - + CLR_NZV; + SET_NZ8(val); WM(EAD,val); } diff --git a/src/mame/drivers/nightgal.cpp b/src/mame/drivers/nightgal.cpp index 33b46f8ea5b..bb602aafdf9 100644 --- a/src/mame/drivers/nightgal.cpp +++ b/src/mame/drivers/nightgal.cpp @@ -10,12 +10,10 @@ driver by David Haywood & Angelo Salese many thanks to Charles MacDonald for the schematics / documentation of this HW. TODO: - - Night Gal Summer trips illegal opcodes on the NCS side, needs to check if bit-rotted or encrypted ROM; - - Fix Sweet Gal/Sexy Gal gfxs if necessary (i.e. if the bugs aren't all caused by irq/nmi wrong firing); + - is opcode $bb right for Night Gal Summer? + - extra protection for Night Gal Summer (ports 0x6000-3 for z80 and 0x8000-0x8020-1 for MCU); + - Fix Sweet Gal/Sexy Gal layer clearances; - unemulated WAIT pin for Z80, MCU asserts it when accessing communication RAM - - Abstract the video chip to a proper video file and get the name of that chip; - - Minor graphic glitches in Royal Queen (cross hatch test, some little glitches during gameplay), - presumably due of the unemulated wait states on the comms. *******************************************************************************************/ @@ -88,6 +86,9 @@ public: DECLARE_WRITE8_MEMBER(output_w); DECLARE_DRIVER_INIT(ngalsumr); DECLARE_DRIVER_INIT(royalqn); + DECLARE_READ8_MEMBER(ngalsumr_unk_r); + DECLARE_WRITE8_MEMBER(ngalsumr_unk_w); + DECLARE_READ8_MEMBER(ngalsumr_color_r); virtual void machine_start() override; virtual void machine_reset() override; virtual void video_start() override; @@ -431,6 +432,7 @@ ADDRESS_MAP_END * Royal Queen ********************************/ + static ADDRESS_MAP_START( royalqn_map, AS_PROGRAM, 8, nightgal_state ) AM_RANGE(0x0000, 0x7fff) AM_ROM AM_RANGE(0x8000, 0xbfff) AM_NOP @@ -453,13 +455,14 @@ static ADDRESS_MAP_START( royalqn_io, AS_IO, 8, nightgal_state ) ADDRESS_MAP_END static ADDRESS_MAP_START( royalqn_nsc_map, AS_PROGRAM, 8, nightgal_state ) - AM_RANGE(0x0000, 0x007f) AM_RAM + AM_RANGE(0x0000, 0x007f) AM_RAM AM_SHARE("xx") AM_RANGE(0x0080, 0x0080) AM_READ(blitter_status_r) AM_RANGE(0x0081, 0x0083) AM_READ(royalqn_nsc_blit_r) AM_RANGE(0x0080, 0x0086) AM_DEVWRITE("blitter", jangou_blitter_device, blitter_process_w) AM_RANGE(0x00a0, 0x00af) AM_DEVWRITE("blitter", jangou_blitter_device, blitter_vregs_w) AM_RANGE(0x00b0, 0x00b0) AM_WRITENOP // bltflip register + AM_RANGE(0x1000, 0x1007) AM_RAM AM_SHARE("xx") AM_RANGE(0x1000, 0x13ff) AM_MIRROR(0x2c00) AM_READWRITE(royalqn_comm_r,royalqn_comm_w) AM_RANGE(0x4000, 0x4000) AM_NOP AM_RANGE(0x8000, 0x8000) AM_NOP //open bus or protection check @@ -1092,8 +1095,34 @@ DRIVER_INIT_MEMBER(nightgal_state,royalqn) ROM[0x027f] = 0x02; } +// returns flipped gfxs if active? +READ8_MEMBER(nightgal_state::ngalsumr_unk_r) +{ + return 0; +} + +WRITE8_MEMBER(nightgal_state::ngalsumr_unk_w) +{ + //m_z80_latch = data; +} + +// check with the unknown opcode, wants currently active color for 1bpp gfxs? +READ8_MEMBER(nightgal_state::ngalsumr_color_r) +{ + if(offset == 0xc) + return 1; + + + return 0; +} + DRIVER_INIT_MEMBER(nightgal_state,ngalsumr) { + m_maincpu->space(AS_PROGRAM).install_write_handler(0x6000, 0x6000, write8_delegate(FUNC(nightgal_state::ngalsumr_unk_w), this) ); + // 0x6003 some kind of f/f state + m_subcpu->space(AS_PROGRAM).install_read_handler(0x9020, 0x9021, read8_delegate(FUNC(nightgal_state::ngalsumr_unk_r), this) ); + m_subcpu->space(AS_PROGRAM).install_read_handler(0x9030, 0x903f, read8_delegate(FUNC(nightgal_state::ngalsumr_color_r),this) ); + #if 0 UINT8 *ROM = memregion("subrom")->base(); |