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author angelosa <salese_corp_ltd@email.it>2015-07-08 00:04:48 +0200
committer angelosa <salese_corp_ltd@email.it>2015-07-08 00:04:48 +0200
commit9651bab283d3c1197d7bc1dd2f0b4e7d2a3012cb (patch)
tree33ba595514ac614468ccb081f4318cb467a93ba0
parentfeb09026c6fa1223173440d37757c9e9e2bdd63f (diff)
Added SH-2A flavour, which is SH-2 + SH7021 used by Casio Loopy.
-rw-r--r--src/emu/cpu/sh2/sh2.c30
-rw-r--r--src/emu/cpu/sh2/sh2.h26
-rw-r--r--src/emu/cpu/sh2/sh2comn.c54
-rw-r--r--src/mess/drivers/casloopy.c4
4 files changed, 108 insertions, 6 deletions
diff --git a/src/emu/cpu/sh2/sh2.c b/src/emu/cpu/sh2/sh2.c
index 92e10e1db6f..420be31c5fa 100644
--- a/src/emu/cpu/sh2/sh2.c
+++ b/src/emu/cpu/sh2/sh2.c
@@ -124,7 +124,7 @@
const device_type SH1 = &device_creator<sh1_device>;
const device_type SH2 = &device_creator<sh2_device>;
-
+const device_type SH2A = &device_creator<sh2a_device>;
/*-------------------------------------------------
sh2_internal_a5 - read handler for
@@ -141,19 +141,36 @@ READ32_MEMBER(sh2_device::sh2_internal_a5)
sh2_internal_map - maps SH2 built-ins
-------------------------------------------------*/
-static ADDRESS_MAP_START( sh2_internal_map, AS_PROGRAM, 32, sh2_device )
+static ADDRESS_MAP_START( sh7604_map, AS_PROGRAM, 32, sh2_device )
AM_RANGE(0x40000000, 0xbfffffff) AM_READ(sh2_internal_a5)
- AM_RANGE(0xc0000000, 0xc0000fff) AM_RAM // cache data array
+/*!
+ @todo: cps3boot breaks with this enabled. Needs customization ...
+ */
+// AM_RANGE(0xc0000000, 0xc0000fff) AM_RAM // cache data array
AM_RANGE(0xe0000000, 0xe00001ff) AM_MIRROR(0x1ffffe00) AM_READWRITE(sh7604_r, sh7604_w)
ADDRESS_MAP_END
+static ADDRESS_MAP_START( sh7021_map, AS_PROGRAM, 32, sh2a_device )
+// overrides
+ AM_RANGE(0x05ffff40, 0x05ffff43) AM_READWRITE(dma_sar0_r, dma_sar0_w)
+ AM_RANGE(0x05ffff44, 0x05ffff47) AM_READWRITE(dma_dar0_r, dma_dar0_w)
+ AM_RANGE(0x05ffff48, 0x05ffff4b) AM_READWRITE16(dma_tcr0_r, dma_tcr0_w,0x0000ffff)
+// fall-back
+ AM_RANGE(0x05fffe00, 0x05ffffff) AM_READWRITE16(sh7021_r,sh7021_w,0xffffffff) // SH-7032H internal i/o
+// AM_RANGE(0x07000000, 0x070003ff) AM_RAM AM_SHARE("oram")// on-chip RAM, actually at 0xf000000 (1 kb)
+// AM_RANGE(0x0f000000, 0x0f0003ff) AM_RAM AM_SHARE("oram")// on-chip RAM, actually at 0xf000000 (1 kb)
+ADDRESS_MAP_END
+
static ADDRESS_MAP_START( sh7032_map, AS_PROGRAM, 32, sh1_device )
+// fall-back
AM_RANGE(0x05fffe00, 0x05ffffff) AM_READWRITE16(sh7032_r,sh7032_w,0xffffffff) // SH-7032H internal i/o
+// AM_RANGE(0x07000000, 0x070003ff) AM_RAM AM_SHARE("oram")// on-chip RAM, actually at 0xf000000 (1 kb)
+// AM_RANGE(0x0f000000, 0x0f0003ff) AM_RAM AM_SHARE("oram")// on-chip RAM, actually at 0xf000000 (1 kb)
ADDRESS_MAP_END
sh2_device::sh2_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: cpu_device(mconfig, SH2, "SH-2", tag, owner, clock, "sh2", __FILE__)
- , m_program_config("program", ENDIANNESS_BIG, 32, 32, 0, ADDRESS_MAP_NAME(sh2_internal_map))
+ , m_program_config("program", ENDIANNESS_BIG, 32, 32, 0, ADDRESS_MAP_NAME(sh7604_map))
, m_decrypted_program_config("decrypted_opcodes", ENDIANNESS_BIG, 32, 32, 0)
, m_is_slave(0)
, m_cpu_type(CPU_TYPE_SH2)
@@ -215,6 +232,11 @@ sh2_device::sh2_device(const machine_config &mconfig, device_type type, const ch
m_isdrc = (mconfig.options().drc() && !mconfig.m_force_no_drc) ? true : false;
}
+sh2a_device::sh2a_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+ : sh2_device(mconfig, SH1, "SH-2A", tag, owner, clock, "sh2a", __FILE__, CPU_TYPE_SH2, ADDRESS_MAP_NAME(sh7021_map), 28 )
+{
+}
+
sh1_device::sh1_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: sh2_device(mconfig, SH1, "SH-1", tag, owner, clock, "sh1", __FILE__, CPU_TYPE_SH1, ADDRESS_MAP_NAME(sh7032_map), 28 )
{
diff --git a/src/emu/cpu/sh2/sh2.h b/src/emu/cpu/sh2/sh2.h
index 1dfbafc0e10..38b772f2e58 100644
--- a/src/emu/cpu/sh2/sh2.h
+++ b/src/emu/cpu/sh2/sh2.h
@@ -494,6 +494,31 @@ public:
void func_SUBV();
};
+class sh2a_device : public sh2_device
+{
+public:
+ // construction/destruction
+ sh2a_device(const machine_config &mconfig, const char *_tag, device_t *_owner, UINT32 _clock);
+
+ DECLARE_READ32_MEMBER(dma_sar0_r);
+ DECLARE_WRITE32_MEMBER(dma_sar0_w);
+ DECLARE_READ32_MEMBER(dma_dar0_r);
+ DECLARE_WRITE32_MEMBER(dma_dar0_w);
+ DECLARE_READ16_MEMBER(dma_tcr0_r);
+ DECLARE_WRITE16_MEMBER(dma_tcr0_w);
+
+ DECLARE_READ16_MEMBER(sh7021_r);
+ DECLARE_WRITE16_MEMBER(sh7021_w);
+private:
+ UINT16 m_sh7021_regs[0x200];
+ struct
+ {
+ UINT32 sar; /**< Source Address Register */
+ UINT32 dar; /**< Destination Address Register */
+ UINT16 tcr; /**< Transfer Count Register */
+ } m_dma[4];
+
+};
class sh1_device : public sh2_device
{
@@ -531,6 +556,7 @@ private:
extern const device_type SH1;
extern const device_type SH2;
+extern const device_type SH2A;
#endif /* __SH2_H__ */
diff --git a/src/emu/cpu/sh2/sh2comn.c b/src/emu/cpu/sh2/sh2comn.c
index fdd96a4996d..be0be0f01d2 100644
--- a/src/emu/cpu/sh2/sh2comn.c
+++ b/src/emu/cpu/sh2/sh2comn.c
@@ -882,12 +882,66 @@ void sh2_device::sh2_exception(const char *message, int irqline)
if(m_sh2_state->sleep_mode == 1) { m_sh2_state->sleep_mode = 2; }
}
+/*
+ SH-7021 on-chip device
+ */
+
+READ32_MEMBER(sh2a_device::dma_sar0_r)
+{
+ return m_dma[0].sar;
+}
+
+WRITE32_MEMBER(sh2a_device::dma_sar0_w)
+{
+ COMBINE_DATA(&m_dma[0].sar);
+}
+
+READ32_MEMBER(sh2a_device::dma_dar0_r)
+{
+ return m_dma[0].dar;
+}
+
+WRITE32_MEMBER(sh2a_device::dma_dar0_w)
+{
+ COMBINE_DATA(&m_dma[0].dar);
+}
+
+READ16_MEMBER(sh2a_device::dma_tcr0_r)
+{
+ return m_dma[0].tcr;
+}
+
+WRITE16_MEMBER(sh2a_device::dma_tcr0_w)
+{
+ printf("%04x\n",data);
+ COMBINE_DATA(&m_dma[0].tcr);
+}
+
+/*!
+ @brief Dummy debug interface
+ */
READ16_MEMBER(sh1_device::sh7032_r)
{
return m_sh7032_regs[offset];
}
+/*!
+ @brief Dummy debug interface
+ */
WRITE16_MEMBER(sh1_device::sh7032_w)
{
COMBINE_DATA(&m_sh7032_regs[offset]);
}
+
+READ16_MEMBER(sh2a_device::sh7021_r)
+{
+ return m_sh7021_regs[offset];
+}
+
+/*!
+ @brief Dummy debug interface
+ */
+WRITE16_MEMBER(sh2a_device::sh7021_w)
+{
+ COMBINE_DATA(&m_sh7021_regs[offset]);
+}
diff --git a/src/mess/drivers/casloopy.c b/src/mess/drivers/casloopy.c
index 0c6919de688..d2a957c5a96 100644
--- a/src/mess/drivers/casloopy.c
+++ b/src/mess/drivers/casloopy.c
@@ -420,7 +420,7 @@ static ADDRESS_MAP_START( casloopy_map, AS_PROGRAM, 32, casloopy_state )
AM_RANGE(0x04051000, 0x040511ff) AM_READWRITE16(pal_r, pal_w, 0xffffffff)
AM_RANGE(0x04058000, 0x04058007) AM_READWRITE16(vregs_r, vregs_w, 0xffffffff)
AM_RANGE(0x0405b000, 0x0405b00f) AM_RAM AM_SHARE("vregs") // RGB555 brightness control plus scrolling
- AM_RANGE(0x05ffff00, 0x05ffffff) AM_READWRITE16(sh7021_r, sh7021_w, 0xffffffff)
+// AM_RANGE(0x05ffff00, 0x05ffffff) AM_READWRITE16(sh7021_r, sh7021_w, 0xffffffff)
// AM_RANGE(0x05ffff00, 0x05ffffff) - SH7021 internal i/o
AM_RANGE(0x06000000, 0x061fffff) AM_READ(cart_r)
AM_RANGE(0x07000000, 0x070003ff) AM_RAM AM_SHARE("oram")// on-chip RAM, actually at 0xf000000 (1 kb)
@@ -504,7 +504,7 @@ DEVICE_IMAGE_LOAD_MEMBER( casloopy_state, loopy_cart )
static MACHINE_CONFIG_START( casloopy, casloopy_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu",SH2,8000000)
+ MCFG_CPU_ADD("maincpu",SH2A,8000000)
MCFG_CPU_PROGRAM_MAP(casloopy_map)
// MCFG_CPU_ADD("subcpu",V60,8000000)