diff options
author | Miodrag Milanovic <mmicko@gmail.com> | 2014-12-15 11:15:53 +0100 |
---|---|---|
committer | Miodrag Milanovic <mmicko@gmail.com> | 2014-12-15 11:15:53 +0100 |
commit | 79b0c6b800bce07438e45b1a1c0615f9131db3a5 (patch) | |
tree | 4c33efab7cd4666834ebcc288060b0de0f9ea37b | |
parent | e51894d529e076688106414c9b1290f242e2a1b8 (diff) | |
parent | cde3ed788508e26d1b07d0c11e52e531814f1a78 (diff) |
Merge branch 'master' of https://github.com/mamedev/mame
-rw-r--r-- | src/emu/machine/i6300esb.c | 10 | ||||
-rw-r--r-- | src/emu/machine/i6300esb.h | 8 | ||||
-rw-r--r-- | src/emu/machine/i82875p.c | 90 | ||||
-rw-r--r-- | src/emu/machine/i82875p.h | 34 | ||||
-rw-r--r-- | src/emu/machine/pci.c | 68 | ||||
-rw-r--r-- | src/emu/machine/pci.h | 5 | ||||
-rw-r--r-- | src/mame/drivers/lindbergh.c | 1 |
7 files changed, 170 insertions, 46 deletions
diff --git a/src/emu/machine/i6300esb.c b/src/emu/machine/i6300esb.c index 6b923cca5f2..04592dccf1b 100644 --- a/src/emu/machine/i6300esb.c +++ b/src/emu/machine/i6300esb.c @@ -40,7 +40,7 @@ DEVICE_ADDRESS_MAP_START(config_map, 32, i6300esb_lpc_device) AM_RANGE(0x88, 0x8b) AM_READWRITE8 (d31_err_sts_r, d31_err_sts_w, 0x00ff0000) AM_RANGE(0x90, 0x93) AM_READWRITE16(pci_dma_cfg_r, pci_dma_cfg_w, 0x0000ffff) AM_RANGE(0xa0, 0xa3) AM_READWRITE16(gen_pmcon_1_r, gen_pmcon_1_w, 0x0000ffff) - AM_RANGE(0xa0, 0xa3) AM_READWRITE16(gen_pmcon_2_r, gen_pmcon_2_w, 0xffff0000) + AM_RANGE(0xa0, 0xa3) AM_READWRITE8 (gen_pmcon_2_r, gen_pmcon_2_w, 0x00ff0000) AM_RANGE(0xa4, 0xa7) AM_READWRITE8 (gen_pmcon_3_r, gen_pmcon_3_w, 0x000000ff) AM_RANGE(0xac, 0xaf) AM_READWRITE (rst_cnt2_r, rst_cnt2_w) AM_RANGE(0xb0, 0xb3) AM_READWRITE8 (apm_cnt_r, apm_cnt_w, 0x00ff0000) @@ -294,15 +294,15 @@ WRITE16_MEMBER(i6300esb_lpc_device::gen_pmcon_1_w) logerror("%s: gen_pmcon_1 = %04x\n", tag(), gen_pmcon_1); } -READ16_MEMBER (i6300esb_lpc_device::gen_pmcon_2_r) +READ8_MEMBER (i6300esb_lpc_device::gen_pmcon_2_r) { return gen_pmcon_2; } -WRITE16_MEMBER(i6300esb_lpc_device::gen_pmcon_2_w) +WRITE8_MEMBER (i6300esb_lpc_device::gen_pmcon_2_w) { - COMBINE_DATA(&gen_pmcon_2); - logerror("%s: gen_pmcon_2 = %04x\n", tag(), gen_pmcon_2); + gen_pmcon_2 = data; + logerror("%s: gen_pmcon_2 = %02x\n", tag(), gen_pmcon_2); } READ8_MEMBER (i6300esb_lpc_device::gen_pmcon_3_r) diff --git a/src/emu/machine/i6300esb.h b/src/emu/machine/i6300esb.h index 912b3eb4780..78c807fbce3 100644 --- a/src/emu/machine/i6300esb.h +++ b/src/emu/machine/i6300esb.h @@ -37,12 +37,12 @@ private: DECLARE_ADDRESS_MAP(internal_io_map, 32); UINT32 pmbase, gpio_base, fwh_sel1, gen_cntl, etr1, rst_cnt2, gpi_rout; - UINT16 bios_cntl, pci_dma_cfg, gen1_dec, lpc_en, gen2_dec, fwh_sel2, func_dis, gen_pmcon_1, gen_pmcon_2; + UINT16 bios_cntl, pci_dma_cfg, gen1_dec, lpc_en, gen2_dec, fwh_sel2, func_dis, gen_pmcon_1; UINT16 mon_trp_rng[4], mon_trp_msk; UINT8 pirq_rout[8]; UINT8 acpi_cntl, tco_cntl, gpio_cntl, serirq_cntl, d31_err_cfg, d31_err_sts, gen_sta, back_cntl, rtc_conf; UINT8 lpc_if_com_range, lpc_if_fdd_lpt_range, lpc_if_sound_range, fwh_dec_en1, fwh_dec_en2, siu_config_port; - UINT8 gen_pmcon_3, apm_cnt, apm_sts, mon_fwd_en, nmi_sc; + UINT8 gen_pmcon_2, gen_pmcon_3, apm_cnt, apm_sts, mon_fwd_en, nmi_sc; int siu_config_state; DECLARE_WRITE8_MEMBER (nop_w); @@ -74,8 +74,8 @@ private: DECLARE_WRITE16_MEMBER(pci_dma_cfg_w); DECLARE_READ16_MEMBER (gen_pmcon_1_r); // a0 DECLARE_WRITE16_MEMBER(gen_pmcon_1_w); - DECLARE_READ16_MEMBER (gen_pmcon_2_r); // a2 - DECLARE_WRITE16_MEMBER(gen_pmcon_2_w); + DECLARE_READ8_MEMBER (gen_pmcon_2_r); // a2 + DECLARE_WRITE8_MEMBER(gen_pmcon_2_w); DECLARE_READ8_MEMBER (gen_pmcon_3_r); // a4 DECLARE_WRITE8_MEMBER (gen_pmcon_3_w); DECLARE_READ32_MEMBER (rst_cnt2_r); // ac diff --git a/src/emu/machine/i82875p.c b/src/emu/machine/i82875p.c index 485dc2b03b3..43696082ced 100644 --- a/src/emu/machine/i82875p.c +++ b/src/emu/machine/i82875p.c @@ -1,7 +1,8 @@ #include "i82875p.h" -const device_type I82875P_HOST = &device_creator<i82875p_host_device>; -const device_type I82875P_AGP = &device_creator<i82875p_agp_device>; +const device_type I82875P_HOST = &device_creator<i82875p_host_device>; +const device_type I82875P_AGP = &device_creator<i82875p_agp_device>; +const device_type I82875P_OVERFLOW = &device_creator<i82875p_overflow_device>; DEVICE_ADDRESS_MAP_START(agp_translation_map, 32, i82875p_host_device) ADDRESS_MAP_END @@ -237,12 +238,15 @@ READ16_MEMBER( i82875p_host_device::toud_r) return toud; } +#include "debugger.h" + WRITE16_MEMBER(i82875p_host_device::toud_w) { COMBINE_DATA(&toud); toud &= ~7; logerror("%s: toud = %08x\n", tag(), toud << 16); remap_cb(); + debugger_break(machine()); } READ16_MEMBER( i82875p_host_device::mchcfg_r) @@ -344,6 +348,13 @@ void i82875p_host_device::map_extra(UINT64 memory_window_start, UINT64 memory_wi io_space->install_device(0, 0xffff, *static_cast<pci_host_device *>(this), &pci_host_device::io_configuration_access_map); UINT32 top = toud << 16; + if(esmramc & 1) { + switch((esmramc >> 1) & 3) { + case 2: top += 512*1024; break; + case 3: top += 1024*1024; break; + } + } + if(top > ram_size) top = ram_size; @@ -416,8 +427,6 @@ void i82875p_host_device::map_extra(UINT64 memory_window_start, UINT64 memory_wi } - - i82875p_agp_device::i82875p_agp_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) : agp_bridge_device(mconfig, I82875P_AGP, "i82875p AGP bridge", tag, owner, clock, "i82875p_agp", __FILE__) { @@ -432,3 +441,76 @@ void i82875p_agp_device::device_reset() { agp_bridge_device::device_reset(); } + +DEVICE_ADDRESS_MAP_START(overflow_map, 32, i82875p_overflow_device) + AM_RANGE(0x000, 0x007) AM_READWRITE8(dram_row_boundary_r, dram_row_boundary_w, 0xffffffff) + AM_RANGE(0x010, 0x013) AM_READWRITE8(dram_row_attribute_r, dram_row_attribute_w, 0xffffffff) + AM_RANGE(0x060, 0x064) AM_READWRITE (dram_timing_r, dram_timing_w) + AM_RANGE(0x068, 0x06b) AM_READWRITE (dram_controller_mode_r, dram_controller_mode_w) +ADDRESS_MAP_END + + +i82875p_overflow_device::i82875p_overflow_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) + : pci_device(mconfig, I82875P_OVERFLOW, "i82875p configuration overflow", tag, owner, clock, "i82875p_overflow", __FILE__) +{ +} + +void i82875p_overflow_device::device_start() +{ + pci_device::device_start(); + + add_map(4*1024, M_MEM, FUNC(i82875p_overflow_device::overflow_map)); +} + +void i82875p_overflow_device::device_reset() +{ + pci_device::device_reset(); + memset(dram_row_boundary, 1, sizeof(dram_row_boundary)); + memset(dram_row_attribute, 0, sizeof(dram_row_attribute)); + dram_timing = 0; + dram_controller_mode = 0x00010001; +} + +READ8_MEMBER (i82875p_overflow_device::dram_row_boundary_r) +{ + return dram_row_boundary[offset]; +} + +WRITE8_MEMBER (i82875p_overflow_device::dram_row_boundary_w) +{ + dram_row_boundary[offset] = data; + logerror("%s: dram_row_boundary_w %d, %02x\n", tag(), offset, data); +} + +READ8_MEMBER (i82875p_overflow_device::dram_row_attribute_r) +{ + return dram_row_attribute[offset]; +} + +WRITE8_MEMBER (i82875p_overflow_device::dram_row_attribute_w) +{ + dram_row_attribute[offset] = data; + logerror("%s: dram_row_attribute_w %d, %02x\n", tag(), offset, data); +} + +READ32_MEMBER (i82875p_overflow_device::dram_timing_r) +{ + return dram_timing; +} + +WRITE32_MEMBER(i82875p_overflow_device::dram_timing_w) +{ + COMBINE_DATA(&dram_timing); + logerror("%s: dram_timing_w %08x\n", tag(), dram_timing); +} + +READ32_MEMBER (i82875p_overflow_device::dram_controller_mode_r) +{ + return dram_controller_mode; +} + +WRITE32_MEMBER(i82875p_overflow_device::dram_controller_mode_w) +{ + COMBINE_DATA(&dram_controller_mode); + logerror("%s: dram_controller_mode_w %08x\n", tag(), dram_controller_mode); +} diff --git a/src/emu/machine/i82875p.h b/src/emu/machine/i82875p.h index 9ee8d8acfcf..bf8c8f841ba 100644 --- a/src/emu/machine/i82875p.h +++ b/src/emu/machine/i82875p.h @@ -5,14 +5,17 @@ #include "pci.h" -#define MCFG_I82875P_HOST_ADD(_tag, _subdevice_id, _cpu_tag, _ram_size) \ +#define MCFG_I82875P_HOST_ADD(_tag, _subdevice_id, _cpu_tag, _ram_size) \ MCFG_PCI_HOST_ADD(_tag, I82875P_HOST, 0x80862578, 0x02, _subdevice_id) \ - downcast<i82875p_host_device *>(device)->set_cpu_tag(_cpu_tag); \ + downcast<i82875p_host_device *>(device)->set_cpu_tag(_cpu_tag); \ downcast<i82875p_host_device *>(device)->set_ram_size(_ram_size); #define MCFG_I82875P_AGP_ADD(_tag) \ MCFG_AGP_BRIDGE_ADD(_tag, I82875P_AGP, 0x80862579, 0x02) +#define MCFG_I82875P_OVERFLOW_ADD(_tag, _subdevice_id) \ + MCFG_PCI_DEVICE_ADD(_tag, I82875P_OVERFLOW, 0x8086257e, 0x02, 0x088000, _subdevice_id) + class i82875p_host_device : public pci_host_device { public: i82875p_host_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); @@ -100,8 +103,35 @@ protected: virtual void device_reset(); }; +class i82875p_overflow_device : public pci_device { +public: + i82875p_overflow_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); + + + DECLARE_READ8_MEMBER (dram_row_boundary_r); + DECLARE_WRITE8_MEMBER (dram_row_boundary_w); + DECLARE_READ8_MEMBER (dram_row_attribute_r); + DECLARE_WRITE8_MEMBER (dram_row_attribute_w); + DECLARE_READ32_MEMBER (dram_timing_r); + DECLARE_WRITE32_MEMBER(dram_timing_w); + DECLARE_READ32_MEMBER (dram_controller_mode_r); + DECLARE_WRITE32_MEMBER(dram_controller_mode_w); + +protected: + + virtual void device_start(); + virtual void device_reset(); + +private: + DECLARE_ADDRESS_MAP(overflow_map, 32); + + UINT8 dram_row_boundary[8], dram_row_attribute[4]; + UINT32 dram_timing, dram_controller_mode; +}; + extern const device_type I82875P_HOST; extern const device_type I82875P_AGP; +extern const device_type I82875P_OVERFLOW; #endif diff --git a/src/emu/machine/pci.c b/src/emu/machine/pci.c index abb9a574ca7..04d217d41f0 100644 --- a/src/emu/machine/pci.c +++ b/src/emu/machine/pci.c @@ -459,6 +459,17 @@ void pci_bridge_device::reset_all_mappings() for(int i=0; i != all_devices.count(); i++) if(all_devices[i] != this) all_devices[i]->reset_all_mappings(); + + prefetch_baseu = 0; + prefetch_limitu = 0; + memory_base = 0; + memory_limit = 0; + prefetch_base = 0; + prefetch_limit = 0; + iobaseu = 0; + iolimitu = 0; + iobase = 0; + iolimit = 0; } void pci_bridge_device::map_device(UINT64 memory_window_start, UINT64 memory_window_end, UINT64 memory_offset, address_space *memory_space, @@ -595,23 +606,23 @@ WRITE8_MEMBER (pci_bridge_device::secondary_latency_w) READ8_MEMBER (pci_bridge_device::iobase_r) { - logerror("%s: iobase_r\n", tag()); - return 0xff; + return iobase; } WRITE8_MEMBER (pci_bridge_device::iobase_w) { + iobase = data; logerror("%s: iobase_w %02x\n", tag(), data); } READ8_MEMBER (pci_bridge_device::iolimit_r) { - logerror("%s: iolimit_r\n", tag()); - return 0xff; + return iolimit; } WRITE8_MEMBER (pci_bridge_device::iolimit_w) { + iolimit = data; logerror("%s: iolimit_w %02x\n", tag(), data); } @@ -628,90 +639,90 @@ WRITE16_MEMBER(pci_bridge_device::secondary_status_w) READ16_MEMBER (pci_bridge_device::memory_base_r) { - logerror("%s: memory_base_r\n", tag()); - return 0xffff; + return memory_base; } WRITE16_MEMBER(pci_bridge_device::memory_base_w) { - logerror("%s: memory_base_w %04x\n", tag(), data); + COMBINE_DATA(&memory_base); + logerror("%s: memory_base_w %04x\n", tag(), memory_base); } READ16_MEMBER (pci_bridge_device::memory_limit_r) { - logerror("%s: memory_limit_r\n", tag()); - return 0xffff; + return memory_limit; } WRITE16_MEMBER(pci_bridge_device::memory_limit_w) { - logerror("%s: memory_limit_w %04x\n", tag(), data); + COMBINE_DATA(&memory_limit); + logerror("%s: memory_limit_w %04x\n", tag(), memory_limit); } READ16_MEMBER (pci_bridge_device::prefetch_base_r) { - logerror("%s: prefetch_base_r\n", tag()); - return 0xffff; + return prefetch_base; } WRITE16_MEMBER(pci_bridge_device::prefetch_base_w) { - logerror("%s: prefetch_base_w %04x\n", tag(), data); + COMBINE_DATA(&prefetch_base); + logerror("%s: prefetch_base_w %04x\n", tag(), prefetch_base); } READ16_MEMBER (pci_bridge_device::prefetch_limit_r) { - logerror("%s: prefetch_limit_r\n", tag()); - return 0xffff; + return prefetch_limit; } WRITE16_MEMBER(pci_bridge_device::prefetch_limit_w) { - logerror("%s: prefetch_limit_w %04x\n", tag(), data); + COMBINE_DATA(&prefetch_limit); + logerror("%s: prefetch_limit_w %04x\n", tag(), prefetch_limit); } READ32_MEMBER (pci_bridge_device::prefetch_baseu_r) { - logerror("%s: prefetch_baseu_r\n", tag()); - return 0xffffffff; + return prefetch_baseu; } WRITE32_MEMBER(pci_bridge_device::prefetch_baseu_w) { - logerror("%s: prefetch_baseu_w %08x\n", tag(), data); + COMBINE_DATA(&prefetch_baseu); + logerror("%s: prefetch_baseu_w %08x\n", tag(), prefetch_baseu); } READ32_MEMBER (pci_bridge_device::prefetch_limitu_r) { - logerror("%s: prefetch_limitu_r\n", tag()); - return 0xffffffff; + return prefetch_limitu; } WRITE32_MEMBER(pci_bridge_device::prefetch_limitu_w) { - logerror("%s: prefetch_limitu_w %08x\n", tag(), data); + COMBINE_DATA(&prefetch_limitu); + logerror("%s: prefetch_limitu_w %08x\n", tag(), prefetch_limitu); } READ16_MEMBER (pci_bridge_device::iobaseu_r) { - logerror("%s: iobaseu_r\n", tag()); - return 0xffff; + return iobaseu; } WRITE16_MEMBER(pci_bridge_device::iobaseu_w) { - logerror("%s: iobaseu_w %04x\n", tag(), data); + COMBINE_DATA(&iobaseu); + logerror("%s: iobaseu_w %04x\n", tag(), iobaseu); } READ16_MEMBER (pci_bridge_device::iolimitu_r) { - logerror("%s: iolimitu_r\n", tag()); - return 0xffff; + return iolimitu; } WRITE16_MEMBER(pci_bridge_device::iolimitu_w) { - logerror("%s: iolimitu_w %04x\n", tag(), data); + COMBINE_DATA(&iolimitu); + logerror("%s: iolimitu_w %04x\n", tag(), iolimitu); } READ8_MEMBER (pci_bridge_device::interrupt_line_r) @@ -738,7 +749,6 @@ WRITE8_MEMBER (pci_bridge_device::interrupt_pin_w) READ16_MEMBER (pci_bridge_device::bridge_control_r) { - logerror("%s: bridge_control_r\n", tag()); return bridge_control; } diff --git a/src/emu/machine/pci.h b/src/emu/machine/pci.h index b8f29ba175c..f14cb87a891 100644 --- a/src/emu/machine/pci.h +++ b/src/emu/machine/pci.h @@ -193,8 +193,9 @@ protected: dynamic_array<pci_device *> all_devices; dynamic_array<pci_bridge_device *> all_bridges; - UINT8 primary_bus, secondary_bus, subordinate_bus; - UINT16 bridge_control; + UINT32 prefetch_baseu, prefetch_limitu; + UINT16 bridge_control, memory_base, memory_limit, prefetch_base, prefetch_limit, iobaseu, iolimitu; + UINT8 primary_bus, secondary_bus, subordinate_bus, iobase, iolimit; virtual void device_start(); virtual void device_reset(); diff --git a/src/mame/drivers/lindbergh.c b/src/mame/drivers/lindbergh.c index 617a4bf6606..0083f3e5974 100644 --- a/src/mame/drivers/lindbergh.c +++ b/src/mame/drivers/lindbergh.c @@ -353,6 +353,7 @@ static MACHINE_CONFIG_START(lindbergh, lindbergh_state) MCFG_I82875P_HOST_ADD( ":pci:00.0", 0x103382c0, ":maincpu", 512*1024*1024) MCFG_I82875P_AGP_ADD( ":pci:01.0") MCFG_GEFORCE_7600GS_ADD( ":pci:01.0:00.0", 0x10de02e1) + MCFG_I82875P_OVERFLOW_ADD( ":pci:06.0", 0x103382c0) MCFG_PCI_BRIDGE_ADD( ":pci:1c.0", 0x808625ae, 0x02) MCFG_I82541PI_ADD( ":pci:1c.0:00.0", 0x103382c0) MCFG_USB_UHCI_ADD( ":pci:1d.0", 0x808625a9, 0x02, 0x103382c0) |