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author mamehaze <mamehaze@users.noreply.github.com>2015-01-26 00:44:32 +0000
committer mamehaze <mamehaze@users.noreply.github.com>2015-01-26 00:44:32 +0000
commit518147d7adc0b1fee9b0d499552710489872e509 (patch)
treeb82d9af1114cbbc5731cf88b7b57d3d44b95165c
parent86b12e10d804bc2613b7535f3d9ed33c97c1078a (diff)
fix some driver notes, it was calling the sound program the main program in a few places (nw)
-rw-r--r--src/mame/drivers/funkball.c14
1 files changed, 7 insertions, 7 deletions
diff --git a/src/mame/drivers/funkball.c b/src/mame/drivers/funkball.c
index b5fc7b1cdf7..b0b811f3387 100644
--- a/src/mame/drivers/funkball.c
+++ b/src/mame/drivers/funkball.c
@@ -53,8 +53,8 @@ Notes:
Cyrix GXm233 - Main CPU; Cyrix GX Media running at 233MHz. Clock is generated by the Cyrix CX5520
and a 14.31818MHz xtal. That gives a 66.6MHz bus clock with a 3.5X multiplier for 233MHz
Cyrix CX5520 - CPU-support chipset (BGA IC)
- FLASH.U29/30 - Intel Strata-Flash DA28F320J5 SSOP56 contained on a plug-in daughterboard; graphics ROMs
- FLASH.U3 - Intel Strata-Flash DA28F320J5 SSOP56 contained on a plug-in daughterboard; main program
+ FLASH.U29/30 - Intel Strata-Flash DA28F320J5 SSOP56 contained on a plug-in daughterboard; main program / gfx
+ FLASH.U3 - Intel Strata-Flash DA28F320J5 SSOP56 contained on a plug-in daughterboard; sound program
KS0164 - Samsung Electronics KS0164 General Midi compliant 32-voice Wavetable Synthesizer chip
with built-in 16bit CPU and MPU-401 compatibility (QFP100)
512K-EPR - 512k EPROM, boot-loader program. EPROM is tied to the KS0164 and the XCS05
@@ -354,9 +354,9 @@ static ADDRESS_MAP_START(funkball_map, AS_PROGRAM, 32, funkball_state)
ADDRESS_MAP_END
static ADDRESS_MAP_START( flashbank_map, AS_PROGRAM, 32, funkball_state )
- AM_RANGE(0x00000000, 0x003fffff) AM_DEVREADWRITE16("u29", intel_28f320j5_device, read, write, 0xffffffff )
- AM_RANGE(0x00400000, 0x007fffff) AM_DEVREADWRITE16("u30", intel_28f320j5_device, read, write, 0xffffffff )
- AM_RANGE(0x00800000, 0x00bfffff) AM_DEVREADWRITE16("u3", intel_28f320j5_device, read, write, 0xffffffff )
+ AM_RANGE(0x00000000, 0x003fffff) AM_DEVREADWRITE16("u29", intel_28f320j5_device, read, write, 0xffffffff ) // needed to boot
+ AM_RANGE(0x00400000, 0x007fffff) AM_DEVREADWRITE16("u30", intel_28f320j5_device, read, write, 0xffffffff ) // i assume it maps directly after
+// AM_RANGE(0x02000000, 0x023fffff) AM_DEVREADWRITE16("u3", intel_28f320j5_device, read, write, 0xffffffff ) // sound program, don't think it matters where we map it, might not even be visible in this space
/* it checks for 64MBit chips at 0x80000000 the way things are set up, they must return an intel Flash ID of 0x15 */
ADDRESS_MAP_END
@@ -854,10 +854,10 @@ ROM_START( funkball )
ROM_REGION32_LE(0x20000, "bios", ROMREGION_ERASEFF)
ROM_LOAD( "512k-epr.u62", 0x010000, 0x010000, CRC(cced894a) SHA1(298c81716e375da4b7215f3e588a45ca3ea7e35c) )
- ROM_REGION(0x4000000, "u3", ROMREGION_ERASE00)
+ ROM_REGION(0x4000000, "u3", ROMREGION_ERASE00) // Sound Program / Samples
ROM_LOAD16_WORD_SWAP( "flash.u3", 0x0000000, 0x400000, CRC(fb376abc) SHA1(ea4c48bb6cd2055431a33f5c426e52c7af6997eb) )
- ROM_REGION(0x8000000, "u29", ROMREGION_ERASE00)
+ ROM_REGION(0x8000000, "u29", ROMREGION_ERASE00) // Main Program
ROM_LOAD16_WORD_SWAP( "flash.u29",0x0000000, 0x400000, CRC(7cf6ff4b) SHA1(4ccdd4864ad92cc218998f3923997119a1a9dd1d) )
ROM_REGION(0x4000000, "u30", ROMREGION_ERASE00)