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author mamehaze <mamehaze@users.noreply.github.com>2014-12-15 12:27:59 +0000
committer mamehaze <mamehaze@users.noreply.github.com>2014-12-15 12:27:59 +0000
commit00eeff4aded4aad7162906f08c95576799c0b61f (patch)
treebf5ebde50ead355bae361bec5bc971347397cdeb
parent5535f4c3d7ef3914b615b86407b88f6fd5911d03 (diff)
arcompact wip (nw)
(also fix -validate for hikaru.c)
-rw-r--r--src/emu/cpu/arcompact/arcompactdasm_ops.c371
-rw-r--r--src/mame/drivers/hikaru.c4
2 files changed, 223 insertions, 152 deletions
diff --git a/src/emu/cpu/arcompact/arcompactdasm_ops.c b/src/emu/cpu/arcompact/arcompactdasm_ops.c
index 7f4f0f31a77..4134ba6b122 100644
--- a/src/emu/cpu/arcompact/arcompactdasm_ops.c
+++ b/src/emu/cpu/arcompact/arcompactdasm_ops.c
@@ -59,6 +59,142 @@ static const char *conditions[0x20] =
};
+//#define EXPLICIT_EXTENSIONS
+
+static const char *datasize[0x4] =
+{
+#ifdef EXPLICIT_EXTENSIONS
+ /* 00 */ ".L", // Dword (default) (can use no extension, using .L to be explicit)
+#else
+ /* 00 */ "",// Dword (default)
+#endif
+ /* 01 */ ".B", // Byte
+ /* 02 */ ".W", // Word
+ /* 03 */ ".<illegal data size>"
+};
+
+static const char *dataextend[0x2] =
+{
+#ifdef EXPLICIT_EXTENSIONS
+ /* 00 */ ".ZX", // Zero Extend (can use no extension, using .ZX to be explicit)
+else
+ /* 00 */ "", // Zero Extend
+#endif
+ /* 01 */ ".X" // Sign Extend
+};
+
+static const char *addressmode[0x4] =
+{
+#ifdef EXPLICIT_EXTENSIONS
+ /* 00 */ ".AN", // No Writeback (can use no extension, using .AN to be explicit)
+#else
+ /* 00 */ "", // No Writeback
+#endif
+ /* 01 */ ".AW", // Writeback pre memory access
+ /* 02 */ ".AB", // Writeback post memory access
+ /* 03 */ ".AS" // scaled
+};
+
+static const char *cachebit[0x2] =
+{
+#ifdef EXPLICIT_EXTENSIONS
+ /* 00 */ ".EN", // Data Cache Enabled (can use no extension, using .EN to be explicit)
+#else
+ /* 00 */ "", // Data Cache Enabled
+#endif
+ /* 01 */ ".DI" // Direct to Memory (Cache Bypass)
+};
+
+static const char *flagbit[0x2] =
+{
+#ifdef EXPLICIT_EXTENSIONS
+ /* 00 */ ".NF", // Don't Set Flags (can use no extension, using .NF to be explicit)
+#else
+ /* 00 */ "", // Don't Set Flags
+#endif
+ /* 01 */ ".F" // Set Flags
+};
+
+static const char *delaybit[0x2] =
+{
+ /* 00 */ ".ND", // Don't execute opcode in delay slot
+ /* 01 */ ".D" // Execute Opcode in delay slot
+};
+
+
+static const char *regnames[0x40] =
+{
+ /* 00 */ "r0",
+ /* 01 */ "r1",
+ /* 02 */ "r2",
+ /* 03 */ "r3",
+ /* 04 */ "r4",
+ /* 05 */ "r5",
+ /* 06 */ "r6",
+ /* 07 */ "r7",
+ /* 08 */ "r8",
+ /* 09 */ "r9",
+ /* 0a */ "r10",
+ /* 0b */ "r11",
+ /* 0c */ "r12",
+ /* 0d */ "r13",
+ /* 0e */ "r14",
+ /* 0f */ "r15",
+
+ /* 10 */ "r16",
+ /* 11 */ "r17",
+ /* 12 */ "r18",
+ /* 13 */ "r19",
+ /* 14 */ "r20",
+ /* 15 */ "r21",
+ /* 16 */ "r22",
+ /* 17 */ "r23",
+ /* 18 */ "r24",
+ /* 19 */ "r25",
+ /* 1a */ "r26(GP)",
+ /* 1b */ "r27(FP)",
+ /* 1c */ "r28(SP)",
+ /* 1d */ "r29(ILINK1)",
+ /* 1e */ "r30(ILINK2)",
+ /* 1f */ "r31(BLINK)",
+
+ /* 20 */ "r32(ext)",
+ /* 21 */ "r33(ext)",
+ /* 22 */ "r34(ext)",
+ /* 23 */ "r35(ext)",
+ /* 24 */ "r36(ext)",
+ /* 25 */ "r37(ext)",
+ /* 26 */ "r38(ext)",
+ /* 27 */ "r39(ext)",
+ /* 28 */ "r40(ext)",
+ /* 29 */ "r41(ext)",
+ /* 2a */ "r42(ext)",
+ /* 2b */ "r43(ext)",
+ /* 2c */ "r44(ext)",
+ /* 2d */ "r45(ext)",
+ /* 2e */ "r46(ext)",
+ /* 2f */ "r47(ext)",
+
+ /* 30 */ "r48(ext)",
+ /* 31 */ "r49(ext)",
+ /* 32 */ "r50(ext)",
+ /* 33 */ "r51(ext)",
+ /* 34 */ "r52(ext)",
+ /* 35 */ "r53(ext)",
+ /* 36 */ "r54(ext)",
+ /* 37 */ "r55(ext)",
+ /* 38 */ "r56(ext)",
+ /* 39 */ "r57(ext)", // MLO (result registers for optional multply functions)
+ /* 3a */ "r58(ext)", // MMID
+ /* 3b */ "r59(ext)", // MHI
+ /* 3c */ "r60(LP_COUNT)",
+ /* 3d */ "r61(reserved)",
+ /* 3e */ "r62(LIMM)", // use Long Immediate Data instead of register
+ /* 3f */ "r63(PCL)"
+};
+
+
+
int arcompact_01_01_00_helper(char *output, offs_t pc, UINT32 op, const UINT8* oprom, const char* optext)
{
int size = 4;
@@ -72,12 +208,13 @@ int arcompact_01_01_00_helper(char *output, offs_t pc, UINT32 op, const UINT8* o
int c = (op & 0x00000fc0) >> 6;
int b = (op & 0x07000000) >> 24;
b |= ((op & 0x00007000) >> 12) << 3;
+ int n = (op & 0x00000020) >> 5; op &= ~0x00000020;
op &= ~0x07007fe0;
if ((b != LIMM_REG) && (c != LIMM_REG))
{
- print("%s (r%d) (r%d) %08x (%08x)", optext, b, c, pc + (address * 2) + 4, op & ~0xf8fe800f);
+ print("%s%s (r%d) (r%d) %08x (%08x)", optext, delaybit[n], b, c, pc + (address * 2) + 4, op & ~0xf8fe800f);
}
else
{
@@ -87,16 +224,16 @@ int arcompact_01_01_00_helper(char *output, offs_t pc, UINT32 op, const UINT8* o
if ((b == LIMM_REG) && (c != LIMM_REG))
{
- print("%s (%08x) (r%d) %08x (%08x)", optext, limm, c, pc + (address * 2) + 4, op & ~0xf8fe800f);
+ print("%s%s (%08x) (r%d) %08x (%08x)", optext, delaybit[n], limm, c, pc + (address * 2) + 4, op & ~0xf8fe800f);
}
else if ((c == LIMM_REG) && (b != LIMM_REG))
{
- print("%s (r%d) (%08x) %08x (%08x)", optext, b, limm, pc + (address * 2) + 4, op & ~0xf8fe800f);
+ print("%s%s (r%d) (%08x) %08x (%08x)", optext, delaybit[n], b, limm, pc + (address * 2) + 4, op & ~0xf8fe800f);
}
else
{
// b and c are LIMM? invalid??
- print("%s (%08x) (%08x) (illegal?) %08x (%08x)", optext, limm, limm, pc + (address * 2) + 4, op & ~0xf8fe800f);
+ print("%s%s (%08x) (%08x) (illegal?) %08x (%08x)", optext, delaybit[n], limm, limm, pc + (address * 2) + 4, op & ~0xf8fe800f);
}
}
@@ -136,10 +273,10 @@ int arcompact_handle00_00_dasm(DASM_OPS_32)
INT32 address = (op & 0x07fe0000) >> 17;
address |= ((op & 0x0000ffc0) >> 6) << 10;
if (address & 0x800000) address = -(address & 0x7fffff);
-
+ int n = (op & 0x00000020) >> 5; op &= ~0x00000020;
UINT8 condition = op & 0x0000001f;
- print("B(%s) %08x (%08x)", conditions[condition], pc + (address * 2), op & ~0xffffffdf);
+ output += sprintf( output, "B%s(%s) %08x", delaybit[n], conditions[condition], pc + (address * 2));
return size;
}
@@ -152,8 +289,12 @@ int arcompact_handle00_01_dasm(DASM_OPS_32)
address |= ((op & 0x0000ffc0) >> 6) << 10;
address |= ((op & 0x0000000f) >> 0) << 20;
if (address & 0x800000) address = -(address & 0x7fffff);
+ int n = (op & 0x00000020) >> 5; op &= ~0x00000020;
+ int res = (op & 0x00000010) >> 4; op &= ~0x00000010;
+
+ output += sprintf( output, "B%s %08x", delaybit[n], pc + (address * 2) );
+ if (res) output += sprintf(output, "(reserved bit set)");
- print("B %08x (%08x)", pc + (address * 2), op & ~0xffffffcf);
return size;
}
@@ -166,10 +307,11 @@ int arcompact_handle01_00_00dasm(DASM_OPS_32)
INT32 address = (op & 0x07fc0000) >> 17;
address |= ((op & 0x0000ffc0) >> 6) << 10;
if (address & 0x800000) address = -(address&0x7fffff);
+ int n = (op & 0x00000020) >> 5; op &= ~0x00000020;
UINT8 condition = op & 0x0000001f;
- print("BL(%s) %08x (%08x)", conditions[condition], pc + (address *2), op & ~0xffffffdf );
+ output += sprintf( output, "BL%s(%s) %08x", delaybit[n], conditions[condition], pc + (address *2) );
return size;
}
@@ -182,8 +324,12 @@ int arcompact_handle01_00_01dasm(DASM_OPS_32)
address |= ((op & 0x0000ffc0) >> 6) << 10;
address |= ((op & 0x0000000f) >> 0) << 20;
if (address & 0x800000) address = -(address&0x7fffff);
+ int n = (op & 0x00000020) >> 5; op &= ~0x00000020;
+ int res = (op & 0x00000010) >> 4; op &= ~0x00000010;
+
+ output += sprintf( output, "BL%s %08x", delaybit[n], pc + (address *2) );
+ if (res) output += sprintf(output, "(reserved bit set)");
- print("BL %08x (%08x)", pc + (address *2), op & ~0xffffffcf );
return size;
}
@@ -209,134 +355,6 @@ int arcompact_handle01_01_01_0e_dasm(DASM_OPS_32) { GET_01_01_01_BRANCH_ADDR;
int arcompact_handle01_01_01_0f_dasm(DASM_OPS_32) { GET_01_01_01_BRANCH_ADDR; print("BBIT1 (b & 1<<u6) != 0 (dst %08x) (%08x)", pc + (address * 2) + 4, op); return 4; }
-//#define EXPLICIT_EXTENSIONS
-
-static const char *datasize[0x4] =
-{
-#ifdef EXPLICIT_EXTENSIONS
- /* 00 */ ".L", // Dword (default) (can use no extension, using .L to be explicit)
-#else
- /* 00 */ "",// Dword (default)
-#endif
- /* 01 */ ".B", // Byte
- /* 02 */ ".W", // Word
- /* 03 */ ".<illegal data size>"
-};
-
-static const char *dataextend[0x2] =
-{
-#ifdef EXPLICIT_EXTENSIONS
- /* 00 */ ".ZX", // Zero Extend (can use no extension, using .ZX to be explicit)
-else
- /* 00 */ "", // Zero Extend
-#endif
- /* 01 */ ".X" // Sign Extend
-};
-
-static const char *addressmode[0x4] =
-{
-#ifdef EXPLICIT_EXTENSIONS
- /* 00 */ ".AN", // No Writeback (can use no extension, using .AN to be explicit)
-#else
- /* 00 */ "", // No Writeback
-#endif
- /* 01 */ ".AW", // Writeback pre memory access
- /* 02 */ ".AB", // Writeback post memory access
- /* 03 */ ".AS" // scaled
-};
-
-static const char *cachebit[0x2] =
-{
-#ifdef EXPLICIT_EXTENSIONS
- /* 00 */ ".EN", // Data Cache Enabled (can use no extension, using .EN to be explicit)
-#else
- /* 00 */ "", // Data Cache Enabled
-#endif
- /* 01 */ ".DI" // Direct to Memory (Cache Bypass)
-};
-
-static const char *flagbit[0x2] =
-{
-#ifdef EXPLICIT_EXTENSIONS
- /* 00 */ ".NF", // Don't Set Flags (can use no extension, using .NF to be explicit)
-#else
- /* 00 */ "", // Don't Set Flags
-#endif
- /* 01 */ ".F" // Set Flags
-};
-
-static const char *regnames[0x40] =
-{
- /* 00 */ "r0",
- /* 01 */ "r1",
- /* 02 */ "r2",
- /* 03 */ "r3",
- /* 04 */ "r4",
- /* 05 */ "r5",
- /* 06 */ "r6",
- /* 07 */ "r7",
- /* 08 */ "r8",
- /* 09 */ "r9",
- /* 0a */ "r10",
- /* 0b */ "r11",
- /* 0c */ "r12",
- /* 0d */ "r13",
- /* 0e */ "r14",
- /* 0f */ "r15",
-
- /* 10 */ "r16",
- /* 11 */ "r17",
- /* 12 */ "r18",
- /* 13 */ "r19",
- /* 14 */ "r20",
- /* 15 */ "r21",
- /* 16 */ "r22",
- /* 17 */ "r23",
- /* 18 */ "r24",
- /* 19 */ "r25",
- /* 1a */ "r26(GP)",
- /* 1b */ "r27(FP)",
- /* 1c */ "r28(SP)",
- /* 1d */ "r29(ILINK1)",
- /* 1e */ "r30(ILINK2)",
- /* 1f */ "r31(BLINK)",
-
- /* 20 */ "r32(ext)",
- /* 21 */ "r33(ext)",
- /* 22 */ "r34(ext)",
- /* 23 */ "r35(ext)",
- /* 24 */ "r36(ext)",
- /* 25 */ "r37(ext)",
- /* 26 */ "r38(ext)",
- /* 27 */ "r39(ext)",
- /* 28 */ "r40(ext)",
- /* 29 */ "r41(ext)",
- /* 2a */ "r42(ext)",
- /* 2b */ "r43(ext)",
- /* 2c */ "r44(ext)",
- /* 2d */ "r45(ext)",
- /* 2e */ "r46(ext)",
- /* 2f */ "r47(ext)",
-
- /* 30 */ "r48(ext)",
- /* 31 */ "r49(ext)",
- /* 32 */ "r50(ext)",
- /* 33 */ "r51(ext)",
- /* 34 */ "r52(ext)",
- /* 35 */ "r53(ext)",
- /* 36 */ "r54(ext)",
- /* 37 */ "r55(ext)",
- /* 38 */ "r56(ext)",
- /* 39 */ "r57(ext)", // MLO (result registers for optional multply functions)
- /* 3a */ "r58(ext)", // MMID
- /* 3b */ "r59(ext)", // MHI
- /* 3c */ "r60(LP_COUNT)",
- /* 3d */ "r61(reserved)",
- /* 3e */ "r62(LIMM)", // use Long Immediate Data instead of register
- /* 3f */ "r63(PCL)"
-};
-
-
int arcompact_handle02_dasm(DASM_OPS_32)
{
// bitpos
@@ -716,20 +734,73 @@ int arcompact_handle04_2a_dasm(DASM_OPS_32) { print("LR (%08x)", op); return 4;
int arcompact_handle04_2b_dasm(DASM_OPS_32) { print("SR (%08x)", op); return 4;}
+int arcompact_handle04_2f_helper_dasm(char *output, offs_t pc, UINT32 op, const UINT8* oprom, const char* optext)
+{
+ //
+ // 0010 0bbb pp10 1111 FBBB CCCC CCII IIII
+ int size = 4;
+
+ int p = (op & 0x00c00000) >> 22; op &= ~0x00c00000;
+ int b = (op & 0x07000000) >> 24; op &= ~0x07000000;
+ int B = (op & 0x00007000) >> 12; op &= ~0x00007000;
+ int breg = b | (B << 3);
+ int F = (op & 0x00008000) >> 15;op &= ~0x00008000;
+
+ output += sprintf( output, "%s", optext);
+ output += sprintf( output, "%s", flagbit[F]);
+// output += sprintf( output, " p(%d)", p);
+
+
+ output += sprintf(output, " %s, ", regnames[breg]);
+
+
+ if (p == 0)
+ {
+ int C = (op & 0x00000fc0) >> 6; op &= ~0x00000fc0;
+
+ if (C == LIMM_REG)
+ {
+ UINT32 limm;
+ GET_LIMM_32;
+ size = 8;
+ output += sprintf( output, "(%08x) ", limm );
+
+ }
+ else
+ {
+ output += sprintf( output, "C(%s) ", regnames[C]);
+ }
+ }
+ else if (p == 1)
+ {
+ output += sprintf( output, "<04_2f illegal p=01>");
+ }
+ else if (p == 2)
+ {
+ output += sprintf( output, "<04_2f illegal p=10>");
+ }
+ else if (p == 3)
+ {
+ output += sprintf( output, "<04_2f illegal p=11>");
+ }
+
+ return size;
+}
+
-int arcompact_handle04_2f_00_dasm(DASM_OPS_32) { print("ASL (%08x)", op); return 4;} // ASL
-int arcompact_handle04_2f_01_dasm(DASM_OPS_32) { print("ASR (%08x)", op); return 4;} // ASR
-int arcompact_handle04_2f_02_dasm(DASM_OPS_32) { print("LSR (%08x)", op); return 4;} // LSR
-int arcompact_handle04_2f_03_dasm(DASM_OPS_32) { print("ROR (%08x)", op); return 4;} // ROR
-int arcompact_handle04_2f_04_dasm(DASM_OPS_32) { print("RCC (%08x)", op); return 4;} // RCC
-int arcompact_handle04_2f_05_dasm(DASM_OPS_32) { print("SEXB (%08x)", op); return 4;} // SEXB
-int arcompact_handle04_2f_06_dasm(DASM_OPS_32) { print("SEXW (%08x)", op); return 4;} // SEXW
-int arcompact_handle04_2f_07_dasm(DASM_OPS_32) { print("EXTB (%08x)", op); return 4;} // EXTB
-int arcompact_handle04_2f_08_dasm(DASM_OPS_32) { print("EXTW (%08x)", op); return 4;} // EXTW
-int arcompact_handle04_2f_09_dasm(DASM_OPS_32) { print("ABS (%08x)", op); return 4;} // ABS
-int arcompact_handle04_2f_0a_dasm(DASM_OPS_32) { print("NOT (%08x)", op); return 4;} // NOT
-int arcompact_handle04_2f_0b_dasm(DASM_OPS_32) { print("RLC (%08x)", op); return 4;} // RLC
-int arcompact_handle04_2f_0c_dasm(DASM_OPS_32) { print("EX (%08x)", op); return 4;} // EX
+int arcompact_handle04_2f_00_dasm(DASM_OPS_32) { return arcompact_handle04_2f_helper_dasm(output, pc, op, oprom, "ASL"); } // ASL
+int arcompact_handle04_2f_01_dasm(DASM_OPS_32) { return arcompact_handle04_2f_helper_dasm(output, pc, op, oprom, "ASR"); } // ASR
+int arcompact_handle04_2f_02_dasm(DASM_OPS_32) { return arcompact_handle04_2f_helper_dasm(output, pc, op, oprom, "LSR"); } // LSR
+int arcompact_handle04_2f_03_dasm(DASM_OPS_32) { return arcompact_handle04_2f_helper_dasm(output, pc, op, oprom, "ROR"); } // ROR
+int arcompact_handle04_2f_04_dasm(DASM_OPS_32) { return arcompact_handle04_2f_helper_dasm(output, pc, op, oprom, "RCC"); } // RCC
+int arcompact_handle04_2f_05_dasm(DASM_OPS_32) { return arcompact_handle04_2f_helper_dasm(output, pc, op, oprom, "SEXB"); } // SEXB
+int arcompact_handle04_2f_06_dasm(DASM_OPS_32) { return arcompact_handle04_2f_helper_dasm(output, pc, op, oprom, "SEXW"); } // SEXW
+int arcompact_handle04_2f_07_dasm(DASM_OPS_32) { return arcompact_handle04_2f_helper_dasm(output, pc, op, oprom, "EXTB"); } // EXTB
+int arcompact_handle04_2f_08_dasm(DASM_OPS_32) { return arcompact_handle04_2f_helper_dasm(output, pc, op, oprom, "EXTW"); } // EXTW
+int arcompact_handle04_2f_09_dasm(DASM_OPS_32) { return arcompact_handle04_2f_helper_dasm(output, pc, op, oprom, "ABS"); } // ABS
+int arcompact_handle04_2f_0a_dasm(DASM_OPS_32) { return arcompact_handle04_2f_helper_dasm(output, pc, op, oprom, "NOT"); } // NOT
+int arcompact_handle04_2f_0b_dasm(DASM_OPS_32) { return arcompact_handle04_2f_helper_dasm(output, pc, op, oprom, "RCL"); } // RLC
+int arcompact_handle04_2f_0c_dasm(DASM_OPS_32) { return arcompact_handle04_2f_helper_dasm(output, pc, op, oprom, "EX"); } // EX
int arcompact_handle04_2f_3f_01_dasm(DASM_OPS_32) { print("SLEEP (%08x)", op); return 4;}
diff --git a/src/mame/drivers/hikaru.c b/src/mame/drivers/hikaru.c
index b7dbc2f01d3..d7199755e6f 100644
--- a/src/mame/drivers/hikaru.c
+++ b/src/mame/drivers/hikaru.c
@@ -664,7 +664,7 @@ ROM_START( podrace )
ROM_LOAD32_WORD("mpr-23117.ic68s" , 0xf000002, 0x0800000, CRC(9d4d3529) SHA1(66008445629681ebf2f26b3f181d8524a8576d2f))
// current 315-5881 decryption simulation code can't produce valid output data with any of keys
- ROM_REGION( 4, "rom_key", 0 )
+ ROM_REGION( 4, "rom_key", ROMREGION_ERASE00 )
ROM_END
ROM_START( braveff )
@@ -709,7 +709,7 @@ ROM_START( braveff )
ROM_LOAD32_WORD( "mpr-22023.ic60s", 0xb000002, 0x800000, CRC(07f00869) SHA1(92282d09d72d3e65a91128e06bb0d4426bb90be5) )
// 315-5881 not populated
- ROM_REGION( 4, "rom_key", 0 )
+ ROM_REGION( 4, "rom_key", ROMREGION_ERASE00 )
ROM_END
ROM_START( sgnascar )